Enable MBUS bridge configuration in mv_rtc driver
This patch fixes sporadic problems with updating time with mv_rtc driver by configuring access to it via MBUS. For this purpose already existing second set of resources in rtc@3800 node of Armada 38x DT is used. Submitted by: Dominik Ermel <der@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D10901
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=319704
@ -69,17 +69,30 @@ __FBSDID("$FreeBSD$");
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#define RTC_STATUS_ALARM1_MASK 0x1
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#define RTC_STATUS_ALARM2_MASK 0x2
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#define MV_RTC_LOCK(sc) mtx_lock(&(sc)->mutex)
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#define MV_RTC_UNLOCK(sc) mtx_unlock(&(sc)->mutex)
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#define MV_RTC_LOCK(sc) mtx_lock_spin(&(sc)->mutex)
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#define MV_RTC_UNLOCK(sc) mtx_unlock_spin(&(sc)->mutex)
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#define RTC_BRIDGE_TIMING_CTRL 0x0
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#define RTC_WRCLK_PERIOD_SHIFT 0
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#define RTC_WRCLK_PERIOD_MASK 0x00000003FF
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#define RTC_WRCLK_PERIOD_MAX 0x3FF
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#define RTC_READ_OUTPUT_DELAY_SHIFT 26
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#define RTC_READ_OUTPUT_DELAY_MASK 0x007C000000
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#define RTC_READ_OUTPUT_DELAY_MAX 0x1F
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#define RTC_RES 0
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#define RTC_SOC_RES 1
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static struct resource_spec res_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_MEMORY, 1, RF_ACTIVE },
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{ -1, 0 }
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};
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struct mv_rtc_softc {
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device_t dev;
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struct resource *res;
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struct resource *res[2];
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struct mtx mutex;
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};
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@ -90,9 +103,11 @@ static int mv_rtc_detach(device_t dev);
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static int mv_rtc_gettime(device_t dev, struct timespec *ts);
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static int mv_rtc_settime(device_t dev, struct timespec *ts);
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static uint32_t mv_rtc_reg_read(struct mv_rtc_softc *sc, bus_size_t off);
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static int mv_rtc_reg_write(struct mv_rtc_softc *sc, bus_size_t off,
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static inline uint32_t mv_rtc_reg_read(struct mv_rtc_softc *sc,
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bus_size_t off);
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static inline int mv_rtc_reg_write(struct mv_rtc_softc *sc, bus_size_t off,
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uint32_t val);
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static inline void mv_rtc_configure_bus(struct mv_rtc_softc *sc);
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static device_method_t mv_rtc_methods[] = {
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DEVMETHOD(device_probe, mv_rtc_probe),
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@ -180,14 +195,16 @@ mv_rtc_attach(device_t dev)
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clock_register(dev, RTC_RES_US);
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mtx_init(&sc->mutex, device_get_nameunit(dev), NULL, MTX_DEF);
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mtx_init(&sc->mutex, device_get_nameunit(dev), NULL, MTX_SPIN);
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ret = bus_alloc_resources(dev, res_spec, sc->res);
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ret = bus_alloc_resources(dev, res_spec, &sc->res);
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if (ret != 0) {
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device_printf(dev, "could not allocate resources\n");
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mtx_destroy(&sc->mutex);
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return (ENXIO);
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}
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mv_rtc_configure_bus(sc);
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return (0);
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}
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@ -201,7 +218,7 @@ mv_rtc_detach(device_t dev)
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mtx_destroy(&sc->mutex);
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bus_release_resources(dev, res_spec, &sc->res);
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bus_release_resources(dev, res_spec, sc->res);
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return (0);
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}
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@ -267,11 +284,11 @@ mv_rtc_settime(device_t dev, struct timespec *ts)
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return (0);
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}
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static uint32_t
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static inline uint32_t
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mv_rtc_reg_read(struct mv_rtc_softc *sc, bus_size_t off)
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{
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return (bus_read_4(sc->res, off));
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return (bus_read_4(sc->res[RTC_RES], off));
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}
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/*
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@ -279,12 +296,24 @@ mv_rtc_reg_read(struct mv_rtc_softc *sc, bus_size_t off)
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* register write to the RTC hard macro so that the required update
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* can occur without holding off the system bus
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*/
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static int
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static inline int
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mv_rtc_reg_write(struct mv_rtc_softc *sc, bus_size_t off, uint32_t val)
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{
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bus_write_4(sc->res, off, val);
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bus_write_4(sc->res[RTC_RES], off, val);
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DELAY(5);
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return (0);
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}
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static inline void
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mv_rtc_configure_bus(struct mv_rtc_softc *sc)
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{
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int val;
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val = bus_read_4(sc->res[RTC_SOC_RES], RTC_BRIDGE_TIMING_CTRL);
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val &= ~(RTC_WRCLK_PERIOD_MASK | RTC_READ_OUTPUT_DELAY_MASK);
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val |= RTC_WRCLK_PERIOD_MAX << RTC_WRCLK_PERIOD_SHIFT;
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val |= RTC_READ_OUTPUT_DELAY_MAX << RTC_READ_OUTPUT_DELAY_SHIFT;
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bus_write_4(sc->res[RTC_SOC_RES], RTC_BRIDGE_TIMING_CTRL, val);
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}
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