Add uath(4) wireless USB driver for Atheros AR5005UG and AR5005UX
chipsets. Reviewed by: sam
This commit is contained in:
parent
27457a80e2
commit
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=190688
186
share/man/man4/uath.4
Normal file
186
share/man/man4/uath.4
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@ -0,0 +1,186 @@
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.\"
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.\" Copyright (c) 2006
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.\" Damien Bergamini <damien.bergamini@free.fr>
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.\"
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.\" Permission to use, copy, modify, and distribute this software for any
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.\" purpose with or without fee is hereby granted, provided that the above
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.\" copyright notice and this permission notice appear in all copies.
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.\"
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.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd March 31, 2009
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.Dt UATH 4
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.Os
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.Sh NAME
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.Nm uath
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.Nd Atheros USB IEEE 802.11a/b/g wireless network device
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.Sh SYNOPSIS
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To compile this driver into the kernel,
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place the following lines in your
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kernel configuration file:
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.Bd -ragged -offset indent
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.Cd "device ehci"
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.Cd "device uhci"
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.Cd "device ohci"
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.Cd "device usb"
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.Cd "device uath"
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.Cd "device wlan"
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.Ed
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.Pp
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Alternatively, to load the driver as a
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module at boot time, place the following line in
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.Xr loader.conf 5 :
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.Bd -literal -offset indent
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if_uath_load="YES"
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.Ed
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.Sh DESCRIPTION
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The
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.Nm
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driver supports USB 2.0 wireless network devices based on Atheros
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Communications fifth generation AR5005UG and AR5005UX chipsets.
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.Pp
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The AR5005UG chipset is made of an AR5523 multiprotocol MAC/baseband processor
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and an AR2112 Radio-on-a-Chip that can operate between 2300 and 2500 MHz
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(802.11b/g).
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.Pp
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The AR5005UX chipset is made of an AR5523 multiprotocol MAC/baseband processor
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and an AR5112 dual band Radio-on-a-Chip that can operate between 2300 and
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2500 MHz (802.11b/g) or 4900 and 5850 MHz (802.11a).
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.Pp
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The AR5005UG and AR5005UX chipsets both have an integrated 32-bit MIPS
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R4000-class processor that runs a firmware and manages, among other things,
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the automatic control of the transmit rate and the calibration of the radio.
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.Pp
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.Nm
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supports
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.Cm station ,
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and
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.Cm monitor
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mode operation.
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Only one virtual interface may be configured at any time.
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For more information on configuring this device, see
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.Xr ifconfig 8 .
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.Sh FIRMWARE
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.Nm
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requires firmware that is downloaded to the device.
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This is normally done by the
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.Xr uathload 8
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utility that is launched by
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.Xr devd 8
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when the device is inserted.
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.Xr uathload
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includes the firmware in the binary program.
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This firmware is licensed for general use and is included in the base system.
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.Sh HARDWARE
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The following adapters should work:
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.Pp
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.Bl -column -compact "TRENDware International TEW-444UB" "AR5005UX" -offset 6n
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.It Em "Adapter Chipset"
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.\".It Belkin F6D3050 AR5005UX
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.It Li "Compex WLU108AG" Ta AR5005UX
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.It Li "Compex WLU108G" Ta AR5005UG
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.\".It Li "D-Link DWL-AG132" Ta AR5005UX
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.It Li "D-Link DWL-G132" Ta AR5005UG
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.\".It Li "Edimax EW-7315Ug" Ta AR5005UG (AR2414???)
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.\".It Li "Lancom USB-54ag" Ta AR5005UX
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.\".It Li "NEC WL54TU" Ta AR5005UX
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.It Li "IODATA WN-G54/US" Ta AR5005UG
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.It Li "MELCO WLI-U2-KAMG54" Ta AR5005UX
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.It Li "Netgear WG111T" Ta AR5005UG
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.It Li "Netgear WG111U" Ta AR5005UX
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.It Li "Netgear WPN111" Ta AR5005UG
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.It Li "Olitec 000544" Ta AR5005UG
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.It Li "PLANET WDL-U357" Ta AR5005UX
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.\".It Li "Senao WUB-8004" Ta AR5005UX
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.It Li "Siemens Gigaset 108" Ta AR5005UG
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.It Li "SMC SMCWUSBT-G" Ta AR5005UG
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.It Li "SMC SMCWUSBT-G2" Ta AR5005UG
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.\".It Li "SparkLAN WL-685GS" Ta AR5005UG
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.It Li "SparkLAN WL-785A" Ta AR5005UX
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.It Li "TP-Link TL-WN620G" Ta AR5005UG
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.It Li "TRENDware International TEW-444UB" Ta AR5005UG
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.It Li "TRENDware International TEW-504UB" Ta AR5005UX
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.It Li "Unex Technology UR054ag" Ta AR5005UX
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.\".It Li "Wistron NeWeb DCUA-81" Ta AR5005UX
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.\".It Li "Wistron NeWeb DRUA-81" Ta AR5005UG
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.\".It Li "Wistron NeWeb DRUA-82" Ta AR5005UX
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.\".It Li "ZyXEL G-200 v2" Ta AR5005UG
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.It Li "ZyXEL XtremeMIMO M-202" Ta AR5005UX
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.El
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.Pp
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An up to date list can be found at
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.Pa http://customerproducts.atheros.com/customerproducts/default.asp .
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.Sh EXAMPLES
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Join an existing BSS network (i.e., connect to an access point):
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.Pp
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.Bd -literal -offset indent
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ifconfig wlan create wlandev uath0 inet 192.168.0.20 \e
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netmask 0xffffff00
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.Ed
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.Pp
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Join a specific BSS network with network name
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.Dq Li my_net :
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.Pp
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.Dl "ifconfig wlan create wlandev uath0 ssid my_net up"
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.Pp
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Join a specific BSS network with 64-bit WEP encryption:
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.Bd -literal -offset indent
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ifconfig wlan create wlandev uath0 ssid my_net \e
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wepmode on wepkey 0x1234567890 weptxkey 1 up
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.Ed
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.Pp
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Join a specific BSS network with 128-bit WEP encryption:
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.Bd -literal -offset indent
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ifconfig wlan create wlandev uath0 wlanmode adhoc ssid my_net \e
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wepmode on wepkey 0x01020304050607080910111213 weptxkey 1
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.Ed
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.Sh DIAGNOSTICS
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.Bl -diag
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.It "uath%d: could not send command (error=%s)"
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An attempt to send a command to the firmware failed.
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.It "uath%d: timeout waiting for command reply"
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A read command was sent to the firmware but the firmware failed to reply in
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time.
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.It "uath%d: device timeout"
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A frame dispatched to the hardware for transmission did not complete in time.
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The driver will reset the hardware.
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This should not happen.
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.El
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.Sh SEE ALSO
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.Xr netintro 4 ,
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.Xr usb 4 ,
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.Xr wlan 4 ,
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.Xr wlan_ccmp 4 ,
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.Xr wlan_tkip 4 ,
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.Xr wlan_wep 4 ,
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.Xr devd 8 ,
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.Xr uathload 8 ,
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.Xr ifconfig 8 ,
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.Xr wpa_supplicant 8 .
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.Sh HISTORY
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The
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.Nm
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driver first appeared in
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.Ox 4.0 .
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.Sh AUTHORS
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The
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.Nm
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driver was written by
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.An Weongyo Jeong Aq weongyo@freebsd.org
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and
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.An Sam Leffler Aq sam@freebsd.org .
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It is distantly related to a driver written by
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.An Damien Bergamini Aq damien@openbsd.org .
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.Sh CAVEATS
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Atheros proprietary 108 Mbps mode (aka Super AG mode) is not supported.
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.Pp
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Dual-band adapters are presently not working;
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to workaround, restriction operation to 2.4GHz channels.
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3359
sys/contrib/dev/uath/ar5523.bin.uu
Normal file
3359
sys/contrib/dev/uath/ar5523.bin.uu
Normal file
File diff suppressed because it is too large
Load Diff
2862
sys/dev/usb/wlan/if_uath.c
Normal file
2862
sys/dev/usb/wlan/if_uath.c
Normal file
File diff suppressed because it is too large
Load Diff
601
sys/dev/usb/wlan/if_uathreg.h
Normal file
601
sys/dev/usb/wlan/if_uathreg.h
Normal file
@ -0,0 +1,601 @@
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/* $OpenBSD: if_uathreg.h,v 1.2 2006/09/18 16:34:23 damien Exp $ */
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/* $FreeBSD$ */
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/*-
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* Copyright (c) 2006
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* Damien Bergamini <damien.bergamini@free.fr>
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* Copyright (c) 2006 Sam Leffler, Errno Consulting
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#define UATH_CONFIG_INDEX 0
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#define UATH_IFACE_INDEX 0
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/* all fields are big endian */
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struct uath_fwblock {
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uint32_t flags;
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#define UATH_WRITE_BLOCK (1 << 4)
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uint32_t len;
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#define UATH_MAX_FWBLOCK_SIZE 2048
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uint32_t total;
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uint32_t remain;
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uint32_t rxtotal;
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uint32_t pad[123];
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} __packed;
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#define UATH_MAX_CMDSZ 512
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/*
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* Messages are passed in Target Endianness. All fixed-size
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* fields of a WDS Control Message are treated as 32-bit
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* values and Control Msgs are guaranteed to be 32-bit aligned.
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*
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* The format of a WDS Control Message is as follows:
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* Message Length 32 bits
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* Message Opcode 32 bits
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* Message ID 32 bits
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* parameter 1
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* parameter 2
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* ...
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*
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* A variable-length parameter, or a parmeter that is larger than
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* 32 bits is passed as <length, data> pair, where length is a
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* 32-bit quantity and data is padded to 32 bits.
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*/
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struct uath_cmd_hdr {
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uint32_t len; /* msg length including header */
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uint32_t code; /* operation code */
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/* NB: these are defined for rev 1.5 firmware; rev 1.6 is different */
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/* messages from Host -> Target */
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#define WDCMSG_HOST_AVAILABLE 0x01
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#define WDCMSG_BIND 0x02
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#define WDCMSG_TARGET_RESET 0x03
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#define WDCMSG_TARGET_GET_CAPABILITY 0x04
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#define WDCMSG_TARGET_SET_CONFIG 0x05
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#define WDCMSG_TARGET_GET_STATUS 0x06
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#define WDCMSG_TARGET_GET_STATS 0x07
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#define WDCMSG_TARGET_START 0x08
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#define WDCMSG_TARGET_STOP 0x09
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#define WDCMSG_TARGET_ENABLE 0x0a
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#define WDCMSG_TARGET_DISABLE 0x0b
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#define WDCMSG_CREATE_CONNECTION 0x0c
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#define WDCMSG_UPDATE_CONNECT_ATTR 0x0d
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#define WDCMSG_DELETE_CONNECT 0x0e
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#define WDCMSG_SEND 0x0f
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#define WDCMSG_FLUSH 0x10
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/* messages from Target -> Host */
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#define WDCMSG_STATS_UPDATE 0x11
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#define WDCMSG_BMISS 0x12
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#define WDCMSG_DEVICE_AVAIL 0x13
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#define WDCMSG_SEND_COMPLETE 0x14
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#define WDCMSG_DATA_AVAIL 0x15
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#define WDCMSG_SET_PWR_MODE 0x16
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#define WDCMSG_BMISS_ACK 0x17
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#define WDCMSG_SET_LED_STEADY 0x18
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#define WDCMSG_SET_LED_BLINK 0x19
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/* more messages */
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#define WDCMSG_SETUP_BEACON_DESC 0x1a
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#define WDCMSG_BEACON_INIT 0x1b
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#define WDCMSG_RESET_KEY_CACHE 0x1c
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#define WDCMSG_RESET_KEY_CACHE_ENTRY 0x1d
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#define WDCMSG_SET_KEY_CACHE_ENTRY 0x1e
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#define WDCMSG_SET_DECOMP_MASK 0x1f
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#define WDCMSG_SET_REGULATORY_DOMAIN 0x20
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#define WDCMSG_SET_LED_STATE 0x21
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#define WDCMSG_WRITE_ASSOCID 0x22
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#define WDCMSG_SET_STA_BEACON_TIMERS 0x23
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#define WDCMSG_GET_TSF 0x24
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#define WDCMSG_RESET_TSF 0x25
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#define WDCMSG_SET_ADHOC_MODE 0x26
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#define WDCMSG_SET_BASIC_RATE 0x27
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#define WDCMSG_MIB_CONTROL 0x28
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#define WDCMSG_GET_CHANNEL_DATA 0x29
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#define WDCMSG_GET_CUR_RSSI 0x2a
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#define WDCMSG_SET_ANTENNA_SWITCH 0x2b
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#define WDCMSG_USE_SHORT_SLOT_TIME 0x2f
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#define WDCMSG_SET_POWER_MODE 0x30
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#define WDCMSG_SETUP_PSPOLL_DESC 0x31
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#define WDCMSG_SET_RX_MULTICAST_FILTER 0x32
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#define WDCMSG_RX_FILTER 0x33
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#define WDCMSG_PER_CALIBRATION 0x34
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#define WDCMSG_RESET 0x35
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#define WDCMSG_DISABLE 0x36
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#define WDCMSG_PHY_DISABLE 0x37
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#define WDCMSG_SET_TX_POWER_LIMIT 0x38
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#define WDCMSG_SET_TX_QUEUE_PARAMS 0x39
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#define WDCMSG_SETUP_TX_QUEUE 0x3a
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#define WDCMSG_RELEASE_TX_QUEUE 0x3b
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#define WDCMSG_SET_DEFAULT_KEY 0x43
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uint32_t msgid; /* msg id (supplied by host) */
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uint32_t magic; /* response desired/target status */
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uint32_t debug[4]; /* debug data area */
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/* msg data follows */
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} __packed;
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struct uath_chunk {
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uint8_t seqnum; /* sequence number for ordering */
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uint8_t flags;
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#define UATH_CFLAGS_FINAL 0x01 /* final chunk of a msg */
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#define UATH_CFLAGS_RXMSG 0x02 /* chunk contains rx completion */
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#define UATH_CFLAGS_DEBUG 0x04 /* for debugging */
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uint16_t length; /* chunk size in bytes */
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/* chunk data follows */
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} __packed;
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#define UATH_RX_DUMMYSIZE 4
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/*
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* Message format for a WDCMSG_DATA_AVAIL message from Target to Host.
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*/
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struct uath_rx_desc {
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uint32_t len; /* msg length including header */
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uint32_t code; /* WDCMSG_DATA_AVAIL */
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uint32_t gennum; /* generation number */
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uint32_t status; /* start of RECEIVE_INFO */
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#define UATH_STATUS_OK 0
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#define UATH_STATUS_STOP_IN_PROGRESS 1
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#define UATH_STATUS_CRC_ERR 2
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#define UATH_STATUS_PHY_ERR 3
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#define UATH_STATUS_DECRYPT_CRC_ERR 4
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#define UATH_STATUS_DECRYPT_MIC_ERR 5
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#define UATH_STATUS_DECOMP_ERR 6
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#define UATH_STATUS_KEY_ERR 7
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#define UATH_STATUS_ERR 8
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uint32_t tstamp_low; /* low-order 32-bits of rx timestamp */
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uint32_t tstamp_high; /* high-order 32-bits of rx timestamp */
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uint32_t framelen; /* frame length */
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uint32_t rate; /* rx rate code */
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uint32_t antenna;
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int32_t rssi;
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uint32_t channel;
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uint32_t phyerror;
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uint32_t connix; /* key table ix for bss traffic */
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uint32_t decrypterror;
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uint32_t keycachemiss;
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uint32_t pad; /* XXX? */
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} __packed;
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struct uath_tx_desc {
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uint32_t msglen;
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uint32_t msgid; /* msg id (supplied by host) */
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uint32_t type; /* opcode: WDMSG_SEND or WDCMSG_FLUSH */
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uint32_t txqid; /* tx queue id and flags */
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#define UATH_TXQID_MASK 0x0f
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#define UATH_TXQID_MINRATE 0x10 /* use min tx rate */
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#define UATH_TXQID_FF 0x20 /* content is fast frame */
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uint32_t connid; /* tx connection id */
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#define UATH_ID_INVALID 0xffffffff /* for sending prior to connection */
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uint32_t flags; /* non-zero if response desired */
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#define UATH_TX_NOTIFY (1 << 24) /* f/w will send a UATH_NOTIF_TX */
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uint32_t buflen; /* payload length */
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} __packed;
|
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struct uath_cmd_host_available {
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uint32_t sw_ver_major;
|
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uint32_t sw_ver_minor;
|
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uint32_t sw_ver_patch;
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uint32_t sw_ver_build;
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} __packed;
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#define ATH_SW_VER_MAJOR 1
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#define ATH_SW_VER_MINOR 5
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#define ATH_SW_VER_PATCH 0
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#define ATH_SW_VER_BUILD 9999
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struct uath_cmd_bind {
|
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uint32_t targethandle;
|
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uint32_t hostapiversion;
|
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} __packed;
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/* structure for command WDCMSG_RESET */
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struct uath_cmd_reset {
|
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uint32_t flags; /* channel flags */
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#define UATH_CHAN_TURBO 0x0100
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#define UATH_CHAN_CCK 0x0200
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#define UATH_CHAN_OFDM 0x0400
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#define UATH_CHAN_2GHZ 0x1000
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#define UATH_CHAN_5GHZ 0x2000
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uint32_t freq; /* channel frequency */
|
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uint32_t maxrdpower;
|
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uint32_t cfgctl;
|
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uint32_t twiceantennareduction;
|
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uint32_t channelchange;
|
||||
uint32_t keeprccontent;
|
||||
} __packed;
|
||||
|
||||
/* structure for commands UATH_CMD_READ_MAC and UATH_CMD_READ_EEPROM */
|
||||
struct uath_read_mac {
|
||||
uint32_t len;
|
||||
uint8_t data[32];
|
||||
} __packed;
|
||||
|
||||
/* structure for command UATH_CMD_WRITE_MAC */
|
||||
struct uath_write_mac {
|
||||
uint32_t reg;
|
||||
uint32_t len;
|
||||
uint8_t data[32];
|
||||
} __packed;
|
||||
|
||||
/* structure for command UATH_CMD_STA_JOIN */
|
||||
struct uath_cmd_join_bss {
|
||||
uint32_t bssid; /* NB: use zero */
|
||||
uint32_t bssmac[2]; /* bssid mac address */
|
||||
uint32_t bsstype;
|
||||
uint32_t wlanmode;
|
||||
uint32_t beaconinterval;
|
||||
uint32_t dtiminterval;
|
||||
uint32_t cfpinterval;
|
||||
uint32_t atimwindow;
|
||||
uint32_t defaultrateix;
|
||||
uint32_t shortslottime11g;
|
||||
uint32_t sleepduration;
|
||||
uint32_t bmissthreshold;
|
||||
uint32_t tcppowerlimit;
|
||||
uint32_t quietduration;
|
||||
uint32_t quietoffset;
|
||||
uint32_t quietackctsallow;
|
||||
uint32_t bssdefaultkey; /* XXX? */
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_assoc_bss {
|
||||
uint32_t bssid;
|
||||
uint32_t associd;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_start_bss {
|
||||
uint32_t bssid;
|
||||
} __packed;
|
||||
|
||||
/* structure for command UATH_CMD_0C */
|
||||
struct uath_cmd_0c {
|
||||
uint32_t magic1;
|
||||
uint32_t magic2;
|
||||
uint32_t magic3;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_ledsteady { /* WDCMSG_SET_LED_STEADY */
|
||||
uint32_t lednum;
|
||||
#define UATH_LED_LINK 0
|
||||
#define UATH_LED_ACTIVITY 1
|
||||
uint32_t ledmode;
|
||||
#define UATH_LED_OFF 0
|
||||
#define UATH_LED_ON 1
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_ledblink { /* WDCMSG_SET_LED_BLINK */
|
||||
uint32_t lednum;
|
||||
uint32_t ledmode;
|
||||
uint32_t blinkrate;
|
||||
uint32_t slowmode;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_ledstate { /* WDCMSG_SET_LED_STATE */
|
||||
uint32_t connected;
|
||||
} __packed;
|
||||
|
||||
struct uath_connkey_rec {
|
||||
uint8_t bssid[IEEE80211_ADDR_LEN];
|
||||
uint32_t keyiv;
|
||||
uint32_t extkeyiv;
|
||||
uint16_t keyflags;
|
||||
uint16_t keylen;
|
||||
uint16_t keytype; /* WEP, TKIP or AES */
|
||||
/* As far as I know, MIPS 4Kp is 32-bit processor */
|
||||
uint32_t priv;
|
||||
uint8_t keyval[32];
|
||||
uint16_t aes_keylen;
|
||||
uint8_t aes_keyval[16];
|
||||
uint8_t mic_txkeyval[8];
|
||||
uint8_t mic_rxkeyval[8];
|
||||
int64_t keyrsc[17];
|
||||
int32_t keytsc[17];
|
||||
int32_t keyexttsc[17];
|
||||
} __packed;
|
||||
|
||||
/* structure for command UATH_CMD_CRYPTO */
|
||||
struct uath_cmd_crypto {
|
||||
uint32_t keyidx;
|
||||
#define UATH_DEFAULT_KEY 6
|
||||
uint32_t xorkey;
|
||||
uint32_t size;
|
||||
struct uath_connkey_rec rec;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_rateset {
|
||||
uint8_t length;
|
||||
#define UATH_MAX_NRATES 32
|
||||
uint8_t set[UATH_MAX_NRATES];
|
||||
};
|
||||
|
||||
/* structure for command WDCMSG_SET_BASIC_RATE */
|
||||
struct uath_cmd_rates {
|
||||
uint32_t connid;
|
||||
uint32_t keeprccontent;
|
||||
uint32_t size;
|
||||
struct uath_cmd_rateset rateset;
|
||||
} __packed;
|
||||
|
||||
enum {
|
||||
WLAN_MODE_NONE = 0,
|
||||
WLAN_MODE_11b,
|
||||
WLAN_MODE_11a,
|
||||
WLAN_MODE_11g,
|
||||
WLAN_MODE_11a_TURBO,
|
||||
WLAN_MODE_11g_TURBO,
|
||||
WLAN_MODE_11a_TURBO_PRIME,
|
||||
WLAN_MODE_11g_TURBO_PRIME,
|
||||
WLAN_MODE_11a_XR,
|
||||
WLAN_MODE_11g_XR,
|
||||
};
|
||||
|
||||
struct uath_cmd_connection_attr {
|
||||
uint32_t longpreambleonly;
|
||||
struct uath_cmd_rateset rateset;
|
||||
uint32_t wlanmode;
|
||||
} __packed;
|
||||
|
||||
/* structure for command WDCMSG_CREATE_CONNECTION */
|
||||
struct uath_cmd_create_connection {
|
||||
uint32_t connid;
|
||||
uint32_t bssid;
|
||||
uint32_t size;
|
||||
struct uath_cmd_connection_attr connattr;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_txq_setparams { /* WDCMSG_SET_TX_QUEUE_PARAMS */
|
||||
uint32_t qnum;
|
||||
uint32_t aifs;
|
||||
uint32_t logcwmin;
|
||||
uint32_t logcwmax;
|
||||
uint32_t bursttime;
|
||||
uint32_t qflags;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_txq_attr {
|
||||
uint32_t priority;
|
||||
uint32_t aifs;
|
||||
uint32_t logcwmin;
|
||||
uint32_t logcwmax;
|
||||
uint32_t bursttime;
|
||||
uint32_t mode;
|
||||
uint32_t qflags;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_txq_setup { /* WDCMSG_SETUP_TX_QUEUE */
|
||||
uint32_t qid;
|
||||
uint32_t len;
|
||||
struct uath_cmd_txq_attr attr;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_stoptxdma { /* WDCMSG_STOP_TX_DMA */
|
||||
uint32_t qnum;
|
||||
uint32_t msec;
|
||||
} __packed;
|
||||
|
||||
/* structure for command UATH_CMD_31 */
|
||||
struct uath_cmd_31 {
|
||||
uint32_t magic1;
|
||||
uint32_t magic2;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_rx_filter { /* WDCMSG_RX_FILTER */
|
||||
uint32_t bits;
|
||||
#define UATH_FILTER_RX_UCAST 0x00000001
|
||||
#define UATH_FILTER_RX_MCAST 0x00000002
|
||||
#define UATH_FILTER_RX_BCAST 0x00000004
|
||||
#define UATH_FILTER_RX_CONTROL 0x00000008
|
||||
#define UATH_FILTER_RX_BEACON 0x00000010 /* beacon frames */
|
||||
#define UATH_FILTER_RX_PROM 0x00000020 /* promiscuous mode */
|
||||
#define UATH_FILTER_RX_PHY_ERR 0x00000040 /* phy errors */
|
||||
#define UATH_FILTER_RX_PHY_RADAR 0x00000080 /* radar phy errors */
|
||||
#define UATH_FILTER_RX_XR_POOL 0x00000400 /* XR group polls */
|
||||
#define UATH_FILTER_RX_PROBE_REQ 0x00000800
|
||||
uint32_t op;
|
||||
#define UATH_FILTER_OP_INIT 0x0
|
||||
#define UATH_FILTER_OP_SET 0x1
|
||||
#define UATH_FILTER_OP_CLEAR 0x2
|
||||
#define UATH_FILTER_OP_TEMP 0x3
|
||||
#define UATH_FILTER_OP_RESTORE 0x4
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_rx_mcast_filter { /* WDCMSG_SET_RX_MCAST_FILTER */
|
||||
uint32_t filter0;
|
||||
uint32_t filter1;
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_set_associd { /* WDCMSG_WRITE_ASSOCID */
|
||||
uint32_t defaultrateix;
|
||||
uint32_t associd;
|
||||
uint32_t timoffset;
|
||||
uint32_t turboprime;
|
||||
uint32_t bssid[2];
|
||||
} __packed;
|
||||
|
||||
struct uath_cmd_set_stabeacon_timers { /* WDCMSG_SET_STA_BEACON_TIMERS */
|
||||
uint32_t nexttbtt;
|
||||
uint32_t nextdtim;
|
||||
uint32_t nextcfp;
|
||||
uint32_t beaconperiod;
|
||||
uint32_t dtimperiod;
|
||||
uint32_t cfpperiod;
|
||||
uint32_t cfpduration;
|
||||
uint32_t sleepduration;
|
||||
uint32_t bsmissthreshold;
|
||||
} __packed;
|
||||
|
||||
enum {
|
||||
CFG_NONE, /* Sentinal to indicate "no config" */
|
||||
CFG_REG_DOMAIN, /* Regulatory Domain */
|
||||
CFG_RATE_CONTROL_ENABLE,
|
||||
CFG_DEF_XMIT_DATA_RATE, /* NB: if rate control is not enabled */
|
||||
CFG_HW_TX_RETRIES,
|
||||
CFG_SW_TX_RETRIES,
|
||||
CFG_SLOW_CLOCK_ENABLE,
|
||||
CFG_COMP_PROC,
|
||||
CFG_USER_RTS_THRESHOLD,
|
||||
CFG_XR2NORM_RATE_THRESHOLD,
|
||||
CFG_XRMODE_SWITCH_COUNT,
|
||||
CFG_PROTECTION_TYPE,
|
||||
CFG_BURST_SEQ_THRESHOLD,
|
||||
CFG_ABOLT,
|
||||
CFG_IQ_LOG_COUNT_MAX,
|
||||
CFG_MODE_CTS,
|
||||
CFG_WME_ENABLED,
|
||||
CFG_GPRS_CBR_PERIOD,
|
||||
CFG_SERVICE_TYPE,
|
||||
/* MAC Address to use. Overrides EEPROM */
|
||||
CFG_MAC_ADDR,
|
||||
CFG_DEBUG_EAR,
|
||||
CFG_INIT_REGS,
|
||||
/* An ID for use in error & debug messages */
|
||||
CFG_DEBUG_ID,
|
||||
CFG_COMP_WIN_SZ,
|
||||
CFG_DIVERSITY_CTL,
|
||||
CFG_TP_SCALE,
|
||||
CFG_TPC_HALF_DBM5,
|
||||
CFG_TPC_HALF_DBM2,
|
||||
CFG_OVERRD_TX_POWER,
|
||||
CFG_USE_32KHZ_CLOCK,
|
||||
CFG_GMODE_PROTECTION,
|
||||
CFG_GMODE_PROTECT_RATE_INDEX,
|
||||
CFG_GMODE_NON_ERP_PREAMBLE,
|
||||
CFG_WDC_TRANSPORT_CHUNK_SIZE,
|
||||
};
|
||||
|
||||
enum {
|
||||
/* Sentinal to indicate "no capability" */
|
||||
CAP_NONE,
|
||||
CAP_ALL, /* ALL capabilities */
|
||||
CAP_TARGET_VERSION,
|
||||
CAP_TARGET_REVISION,
|
||||
CAP_MAC_VERSION,
|
||||
CAP_MAC_REVISION,
|
||||
CAP_PHY_REVISION,
|
||||
CAP_ANALOG_5GHz_REVISION,
|
||||
CAP_ANALOG_2GHz_REVISION,
|
||||
/* Target supports WDC message debug features */
|
||||
CAP_DEBUG_WDCMSG_SUPPORT,
|
||||
|
||||
CAP_REG_DOMAIN,
|
||||
CAP_COUNTRY_CODE,
|
||||
CAP_REG_CAP_BITS,
|
||||
|
||||
CAP_WIRELESS_MODES,
|
||||
CAP_CHAN_SPREAD_SUPPORT,
|
||||
CAP_SLEEP_AFTER_BEACON_BROKEN,
|
||||
CAP_COMPRESS_SUPPORT,
|
||||
CAP_BURST_SUPPORT,
|
||||
CAP_FAST_FRAMES_SUPPORT,
|
||||
CAP_CHAP_TUNING_SUPPORT,
|
||||
CAP_TURBOG_SUPPORT,
|
||||
CAP_TURBO_PRIME_SUPPORT,
|
||||
CAP_DEVICE_TYPE,
|
||||
CAP_XR_SUPPORT,
|
||||
CAP_WME_SUPPORT,
|
||||
CAP_TOTAL_QUEUES,
|
||||
CAP_CONNECTION_ID_MAX, /* Should absorb CAP_KEY_CACHE_SIZE */
|
||||
|
||||
CAP_LOW_5GHZ_CHAN,
|
||||
CAP_HIGH_5GHZ_CHAN,
|
||||
CAP_LOW_2GHZ_CHAN,
|
||||
CAP_HIGH_2GHZ_CHAN,
|
||||
|
||||
CAP_MIC_AES_CCM,
|
||||
CAP_MIC_CKIP,
|
||||
CAP_MIC_TKIP,
|
||||
CAP_MIC_TKIP_WME,
|
||||
CAP_CIPHER_AES_CCM,
|
||||
CAP_CIPHER_CKIP,
|
||||
CAP_CIPHER_TKIP,
|
||||
|
||||
CAP_TWICE_ANTENNAGAIN_5G,
|
||||
CAP_TWICE_ANTENNAGAIN_2G,
|
||||
};
|
||||
|
||||
enum {
|
||||
ST_NONE, /* Sentinal to indicate "no status" */
|
||||
ST_ALL,
|
||||
ST_SERVICE_TYPE,
|
||||
ST_WLAN_MODE,
|
||||
ST_FREQ,
|
||||
ST_BAND,
|
||||
ST_LAST_RSSI,
|
||||
ST_PS_FRAMES_DROPPED,
|
||||
ST_CACHED_DEF_ANT,
|
||||
ST_COUNT_OTHER_RX_ANT,
|
||||
ST_USE_FAST_DIVERSITY,
|
||||
ST_MAC_ADDR,
|
||||
ST_RX_GENERATION_NUM,
|
||||
ST_TX_QUEUE_DEPTH,
|
||||
ST_SERIAL_NUMBER,
|
||||
ST_WDC_TRANSPORT_CHUNK_SIZE,
|
||||
};
|
||||
|
||||
enum {
|
||||
BSS_ATTR_BEACON_INTERVAL,
|
||||
BSS_ATTR_DTIM_INTERVAL,
|
||||
BSS_ATTR_CFP_INTERVAL,
|
||||
BSS_ATTR_CFP_MAX_DURATION,
|
||||
BSS_ATTR_ATIM_WINDOW,
|
||||
BSS_ATTR_DEFAULT_RATE_INDEX,
|
||||
BSS_ATTR_SHORT_SLOT_TIME_11g,
|
||||
BSS_ATTR_SLEEP_DURATION,
|
||||
BSS_ATTR_BMISS_THRESHOLD,
|
||||
BSS_ATTR_TPC_POWER_LIMIT,
|
||||
BSS_ATTR_BSS_KEY_UPDATE,
|
||||
};
|
||||
|
||||
struct uath_cmd_update_bss_attribute {
|
||||
uint32_t bssid;
|
||||
uint32_t attribute; /* BSS_ATTR_BEACON_INTERVAL, et al. */
|
||||
uint32_t cfgsize; /* should be zero 0 */
|
||||
uint32_t cfgdata;
|
||||
};
|
||||
|
||||
struct uath_cmd_update_bss_attribute_key {
|
||||
uint32_t bssid;
|
||||
uint32_t attribute; /* BSS_ATTR_BSS_KEY_UPDATE */
|
||||
uint32_t cfgsize; /* size of remaining data */
|
||||
uint32_t bsskeyix;
|
||||
uint32_t isdefaultkey;
|
||||
uint32_t keyiv; /* IV generation control */
|
||||
uint32_t extkeyiv; /* extended IV for TKIP & CCM */
|
||||
uint32_t keyflags;
|
||||
uint32_t keytype;
|
||||
uint32_t initvalue; /* XXX */
|
||||
uint32_t keyval[4];
|
||||
uint32_t mictxkeyval[2];
|
||||
uint32_t micrxkeyval[2];
|
||||
uint32_t keyrsc[2];
|
||||
};
|
||||
|
||||
enum {
|
||||
TARGET_DEVICE_AWAKE,
|
||||
TARGET_DEVICE_SLEEP,
|
||||
TARGET_DEVICE_PWRDN,
|
||||
TARGET_DEVICE_PWRSAVE,
|
||||
TARGET_DEVICE_SUSPEND,
|
||||
TARGET_DEVICE_RESUME,
|
||||
};
|
||||
|
||||
#define UATH_MAX_TXBUFSZ \
|
||||
(sizeof(struct uath_chunk) + sizeof(struct uath_tx_desc) + \
|
||||
IEEE80211_MAX_LEN)
|
||||
|
||||
/*
|
||||
* it's not easy to measure how the chunk is passed into the host if the target
|
||||
* passed the multi-chunks so just we check a minimal size we can imagine.
|
||||
*/
|
||||
#define UATH_MIN_RXBUFSZ (sizeof(struct uath_chunk))
|
237
sys/dev/usb/wlan/if_uathvar.h
Normal file
237
sys/dev/usb/wlan/if_uathvar.h
Normal file
@ -0,0 +1,237 @@
|
||||
/* $OpenBSD: if_uathvar.h,v 1.3 2006/09/20 19:47:17 damien Exp $ */
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2006
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
* Copyright (c) 2006 Sam Leffler, Errno Consulting
|
||||
* Copyright (c) 2008-2009 Weongyo Jeong <weongyo@freebsd.org>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
enum {
|
||||
UATH_INTR_RX,
|
||||
UATH_INTR_TX,
|
||||
UATH_BULK_RX,
|
||||
UATH_BULK_TX,
|
||||
UATH_N_XFERS = 4,
|
||||
};
|
||||
|
||||
#define UATH_ID_BSS 2 /* Connection ID */
|
||||
|
||||
#define UATH_RX_DATA_LIST_COUNT 128
|
||||
#define UATH_TX_DATA_LIST_COUNT 16
|
||||
#define UATH_CMD_LIST_COUNT 60
|
||||
|
||||
#define UATH_DATA_TIMEOUT 10000
|
||||
#define UATH_CMD_TIMEOUT 1000
|
||||
|
||||
/* flags for sending firmware commands */
|
||||
#define UATH_CMD_FLAG_ASYNC (1 << 0)
|
||||
#define UATH_CMD_FLAG_READ (1 << 1)
|
||||
#define UATH_CMD_FLAG_MAGIC (1 << 2)
|
||||
|
||||
struct uath_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint8_t wr_flags;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
int8_t wr_dbm_antsignal;
|
||||
} __packed;
|
||||
|
||||
#define UATH_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL))
|
||||
|
||||
struct uath_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
} __packed;
|
||||
|
||||
#define UATH_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL))
|
||||
|
||||
struct uath_data {
|
||||
struct uath_softc *sc;
|
||||
uint8_t *buf;
|
||||
uint16_t buflen;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni; /* NB: tx only */
|
||||
STAILQ_ENTRY(uath_data) next;
|
||||
};
|
||||
typedef STAILQ_HEAD(, uath_data) uath_datahead;
|
||||
|
||||
struct uath_cmd {
|
||||
struct uath_softc *sc;
|
||||
uint32_t flags;
|
||||
uint32_t msgid;
|
||||
uint8_t *buf;
|
||||
uint16_t buflen;
|
||||
void *odata; /* NB: tx only */
|
||||
int olen; /* space in odata */
|
||||
STAILQ_ENTRY(uath_cmd) next;
|
||||
};
|
||||
typedef STAILQ_HEAD(, uath_cmd) uath_cmdhead;
|
||||
|
||||
struct uath_wme_settings {
|
||||
uint8_t aifsn;
|
||||
uint8_t logcwmin;
|
||||
uint8_t logcwmax;
|
||||
uint16_t txop;
|
||||
#define UATH_TXOP_TO_US(txop) ((txop) << 5)
|
||||
uint8_t acm;
|
||||
};
|
||||
|
||||
struct uath_devcap {
|
||||
uint32_t targetVersion;
|
||||
uint32_t targetRevision;
|
||||
uint32_t macVersion;
|
||||
uint32_t macRevision;
|
||||
uint32_t phyRevision;
|
||||
uint32_t analog5GhzRevision;
|
||||
uint32_t analog2GhzRevision;
|
||||
uint32_t regDomain;
|
||||
uint32_t regCapBits;
|
||||
uint32_t countryCode;
|
||||
uint32_t keyCacheSize;
|
||||
uint32_t numTxQueues;
|
||||
uint32_t connectionIdMax;
|
||||
uint32_t wirelessModes;
|
||||
#define UATH_WIRELESS_MODE_11A 0x01
|
||||
#define UATH_WIRELESS_MODE_TURBO 0x02
|
||||
#define UATH_WIRELESS_MODE_11B 0x04
|
||||
#define UATH_WIRELESS_MODE_11G 0x08
|
||||
#define UATH_WIRELESS_MODE_108G 0x10
|
||||
uint32_t chanSpreadSupport;
|
||||
uint32_t compressSupport;
|
||||
uint32_t burstSupport;
|
||||
uint32_t fastFramesSupport;
|
||||
uint32_t chapTuningSupport;
|
||||
uint32_t turboGSupport;
|
||||
uint32_t turboPrimeSupport;
|
||||
uint32_t deviceType;
|
||||
uint32_t wmeSupport;
|
||||
uint32_t low2GhzChan;
|
||||
uint32_t high2GhzChan;
|
||||
uint32_t low5GhzChan;
|
||||
uint32_t high5GhzChan;
|
||||
uint32_t supportCipherWEP;
|
||||
uint32_t supportCipherAES_CCM;
|
||||
uint32_t supportCipherTKIP;
|
||||
uint32_t supportCipherMicAES_CCM;
|
||||
uint32_t supportMicTKIP;
|
||||
uint32_t twiceAntennaGain5G;
|
||||
uint32_t twiceAntennaGain2G;
|
||||
};
|
||||
|
||||
struct uath_stat {
|
||||
uint32_t st_badchunkseqnum;
|
||||
uint32_t st_invalidlen;
|
||||
uint32_t st_multichunk;
|
||||
uint32_t st_toobigrxpkt;
|
||||
uint32_t st_stopinprogress;
|
||||
uint32_t st_crcerr;
|
||||
uint32_t st_phyerr;
|
||||
uint32_t st_decrypt_crcerr;
|
||||
uint32_t st_decrypt_micerr;
|
||||
uint32_t st_decomperr;
|
||||
uint32_t st_keyerr;
|
||||
uint32_t st_err;
|
||||
/* CMD/RX/TX queues */
|
||||
uint32_t st_cmd_active;
|
||||
uint32_t st_cmd_inactive;
|
||||
uint32_t st_cmd_pending;
|
||||
uint32_t st_cmd_waiting;
|
||||
uint32_t st_rx_active;
|
||||
uint32_t st_rx_inactive;
|
||||
uint32_t st_tx_active;
|
||||
uint32_t st_tx_inactive;
|
||||
uint32_t st_tx_pending;
|
||||
};
|
||||
#define UATH_STAT_INC(sc, var) (sc)->sc_stat.var++
|
||||
#define UATH_STAT_DEC(sc, var) (sc)->sc_stat.var--
|
||||
|
||||
struct uath_vap {
|
||||
struct ieee80211vap vap;
|
||||
int (*newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
};
|
||||
#define UATH_VAP(vap) ((struct uath_vap *)(vap))
|
||||
|
||||
struct uath_softc {
|
||||
struct ifnet *sc_ifp;
|
||||
device_t sc_dev;
|
||||
struct usb2_device *sc_udev;
|
||||
struct mtx sc_mtx;
|
||||
uint32_t sc_debug;
|
||||
|
||||
struct uath_stat sc_stat;
|
||||
int (*sc_newstate)(struct ieee80211com *,
|
||||
enum ieee80211_state, int);
|
||||
enum ieee80211_state sc_state;
|
||||
|
||||
struct usb2_xfer *sc_xfer[UATH_N_XFERS];
|
||||
struct uath_cmd sc_cmd[UATH_CMD_LIST_COUNT];
|
||||
uath_cmdhead sc_cmd_active;
|
||||
uath_cmdhead sc_cmd_inactive;
|
||||
uath_cmdhead sc_cmd_pending;
|
||||
uath_cmdhead sc_cmd_waiting;
|
||||
struct uath_data sc_rx[UATH_RX_DATA_LIST_COUNT];
|
||||
uath_datahead sc_rx_active;
|
||||
uath_datahead sc_rx_inactive;
|
||||
struct uath_data sc_tx[UATH_TX_DATA_LIST_COUNT];
|
||||
uath_datahead sc_tx_active;
|
||||
uath_datahead sc_tx_inactive;
|
||||
uath_datahead sc_tx_pending;
|
||||
|
||||
uint32_t sc_msgid;
|
||||
uint32_t sc_seqnum;
|
||||
int sc_tx_timer;
|
||||
struct callout watchdog_ch;
|
||||
struct callout stat_ch;
|
||||
/* multi-chunked support */
|
||||
struct mbuf *sc_intrx_head;
|
||||
struct mbuf *sc_intrx_tail;
|
||||
uint8_t sc_intrx_nextnum;
|
||||
uint32_t sc_intrx_len;
|
||||
#define UATH_MAX_INTRX_SIZE 3616
|
||||
|
||||
struct uath_devcap sc_devcap;
|
||||
uint8_t sc_serial[16];
|
||||
|
||||
/* unsorted */
|
||||
uint32_t sc_flags;
|
||||
#define UATH_FLAG_INVALID (1 << 1)
|
||||
#define UATH_FLAG_INITDONE (1 << 2)
|
||||
|
||||
struct uath_rx_radiotap_header sc_rxtap;
|
||||
int sc_rxtap_len;
|
||||
struct uath_tx_radiotap_header sc_txtap;
|
||||
int sc_txtap_len;
|
||||
};
|
||||
|
||||
#define UATH_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define UATH_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
||||
#define UATH_ASSERT_LOCKED(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED)
|
||||
|
||||
#define UATH_RESET_INTRX(sc) do { \
|
||||
(sc)->sc_intrx_head = NULL; \
|
||||
(sc)->sc_intrx_tail = NULL; \
|
||||
(sc)->sc_intrx_nextnum = 0; \
|
||||
(sc)->sc_intrx_len = 0; \
|
||||
} while (0)
|
10
sys/modules/usb/uath/Makefile
Normal file
10
sys/modules/usb/uath/Makefile
Normal file
@ -0,0 +1,10 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../../dev/usb/wlan
|
||||
|
||||
KMOD = if_uath
|
||||
SRCS = if_uath.c if_uathvar.h if_uathreg.h \
|
||||
bus_if.h device_if.h \
|
||||
opt_bus.h opt_usb.h usb_if.h usbdevs.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
18
usr.sbin/uathload/Makefile
Normal file
18
usr.sbin/uathload/Makefile
Normal file
@ -0,0 +1,18 @@
|
||||
# $FreeBSD$
|
||||
|
||||
PROG= uathload
|
||||
NO_MAN=
|
||||
|
||||
SRCS= uathload.c ar5523.bin
|
||||
|
||||
WARNS?= 4
|
||||
|
||||
CLEANFILES= ar5523.bin
|
||||
|
||||
ar5523.bin: ${.CURDIR}/../../sys/contrib/dev/uath/ar5523.bin.uu
|
||||
uudecode -p ${.CURDIR}/../../sys/contrib/dev/uath/ar5523.bin.uu > ${.TARGET}
|
||||
|
||||
ar5523.o: ar5523.bin
|
||||
${LD} -b binary -d -warn-common -r -d -o ${.TARGET} ar5523.bin
|
||||
|
||||
.include <bsd.prog.mk>
|
233
usr.sbin/uathload/uathload.c
Normal file
233
usr.sbin/uathload/uathload.c
Normal file
@ -0,0 +1,233 @@
|
||||
/*-
|
||||
* Copyright (c) 2006 Sam Leffler, Errno Consulting
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer,
|
||||
* without modification.
|
||||
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
|
||||
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
|
||||
* redistribution must be conditioned upon including a substantially
|
||||
* similar Disclaimer requirement for further binary redistribution.
|
||||
*
|
||||
* NO WARRANTY
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
|
||||
* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGES.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/*
|
||||
* Atheros AR5523 USB Station Firmware downloader.
|
||||
*
|
||||
* uathload -d ugen-device [firmware-file]
|
||||
*
|
||||
* Intended to be called from devd on device discovery.
|
||||
*/
|
||||
#include <sys/types.h>
|
||||
#include <sys/stat.h>
|
||||
#include <sys/endian.h>
|
||||
#include <sys/mman.h>
|
||||
|
||||
#include <sys/ioctl.h>
|
||||
#include <dev/usb/usb.h>
|
||||
#include <dev/usb/usb_ioctl.h>
|
||||
|
||||
#include <err.h>
|
||||
#include <fcntl.h>
|
||||
#include <libgen.h>
|
||||
#include <paths.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <strings.h>
|
||||
#include <unistd.h>
|
||||
|
||||
/* all fields are big endian */
|
||||
struct uath_fwmsg {
|
||||
uint32_t flags;
|
||||
#define UATH_WRITE_BLOCK (1 << 4)
|
||||
|
||||
uint32_t len;
|
||||
#define UATH_MAX_FWBLOCK_SIZE 2048
|
||||
|
||||
uint32_t total;
|
||||
uint32_t remain;
|
||||
uint32_t rxtotal;
|
||||
uint32_t pad[123];
|
||||
} __packed;
|
||||
|
||||
#define UATH_DATA_TIMEOUT 10000
|
||||
#define UATH_CMD_TIMEOUT 1000
|
||||
|
||||
#define VERBOSE(_fmt, ...) do { \
|
||||
if (verbose) { \
|
||||
printf(_fmt, __VA_ARGS__); \
|
||||
fflush(stdout); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
extern uint8_t _binary_ar5523_bin_start;
|
||||
extern uint8_t _binary_ar5523_bin_end;
|
||||
|
||||
static int
|
||||
getdevname(const char *devname, char *msgdev, char *datadev)
|
||||
{
|
||||
char *bn, *dn;
|
||||
|
||||
dn = dirname(devname);
|
||||
if (dn == NULL)
|
||||
return (-1);
|
||||
bn = basename(devname);
|
||||
if (bn == NULL || strncmp(bn, "ugen", 4))
|
||||
return (-1);
|
||||
bn += 4;
|
||||
|
||||
/* NB: pipes are hardcoded */
|
||||
snprintf(msgdev, 256, "%s/usb/%s.1", dn, bn);
|
||||
snprintf(datadev, 256, "%s/usb/%s.2", dn, bn);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
usage(void)
|
||||
{
|
||||
errx(-1, "usage: uathload [-v] -d devname [firmware]");
|
||||
}
|
||||
|
||||
int
|
||||
main(int argc, char *argv[])
|
||||
{
|
||||
const char *fwname, *devname;
|
||||
char msgdev[256], datadev[256];
|
||||
struct uath_fwmsg txmsg, rxmsg;
|
||||
char *txdata;
|
||||
struct stat sb;
|
||||
int msg, data, fw, timeout, b, c;
|
||||
int bufsize = 512, verbose = 0;
|
||||
ssize_t len;
|
||||
|
||||
devname = NULL;
|
||||
while ((c = getopt(argc, argv, "d:v")) != -1) {
|
||||
switch (c) {
|
||||
case 'd':
|
||||
devname = optarg;
|
||||
break;
|
||||
case 'v':
|
||||
verbose = 1;
|
||||
break;
|
||||
default:
|
||||
usage();
|
||||
/*NOTREACHED*/
|
||||
}
|
||||
}
|
||||
argc -= optind;
|
||||
argv += optind;
|
||||
|
||||
if (devname == NULL)
|
||||
errx(-1, "No device name; use -d to specify the ugen device");
|
||||
if (argc > 1)
|
||||
usage();
|
||||
|
||||
if (argc == 1) {
|
||||
fwname = argv[0];
|
||||
fw = open(fwname, O_RDONLY, 0);
|
||||
if (fw < 0)
|
||||
err(-1, "open(%s)", fwname);
|
||||
if (fstat(fw, &sb) < 0)
|
||||
err(-1, "fstat(%s)", fwname);
|
||||
txdata = mmap(NULL, sb.st_size, PROT_READ, MAP_PRIVATE, fw, 0);
|
||||
if (txdata == MAP_FAILED)
|
||||
err(-1, "mmap(%s)", fwname);
|
||||
len = sb.st_size;
|
||||
} else {
|
||||
fwname = "ar5523.bin (builtin)";
|
||||
fw = -1;
|
||||
txdata = &_binary_ar5523_bin_start;
|
||||
len = &_binary_ar5523_bin_end - &_binary_ar5523_bin_start;
|
||||
}
|
||||
/* XXX verify device is an AR5005 part */
|
||||
if (getdevname(devname, msgdev, datadev))
|
||||
err(-1, "getdevname error");
|
||||
|
||||
msg = open(msgdev, O_RDWR, 0);
|
||||
if (msg < 0)
|
||||
err(-1, "open(%s)", msgdev);
|
||||
timeout = UATH_DATA_TIMEOUT;
|
||||
if (ioctl(msg, USB_SET_RX_TIMEOUT, &timeout) < 0)
|
||||
err(-1, "%s: USB_SET_RX_TIMEOUT(%u)", msgdev, UATH_DATA_TIMEOUT);
|
||||
if (ioctl(msg, USB_SET_RX_BUFFER_SIZE, &bufsize) < 0)
|
||||
err(-1, "%s: USB_SET_RX_BUFFER_SIZE(%u)", msgdev, bufsize);
|
||||
|
||||
data = open(datadev, O_WRONLY, 0);
|
||||
if (data < 0)
|
||||
err(-1, "open(%s)", datadev);
|
||||
timeout = UATH_DATA_TIMEOUT;
|
||||
if (ioctl(data, USB_SET_TX_TIMEOUT, &timeout) < 0)
|
||||
err(-1, "%s: USB_SET_TX_TIMEOUT(%u)", datadev,
|
||||
UATH_DATA_TIMEOUT);
|
||||
|
||||
VERBOSE("Load firmware %s to %s\n", fwname, devname);
|
||||
|
||||
bzero(&txmsg, sizeof (struct uath_fwmsg));
|
||||
txmsg.flags = htobe32(UATH_WRITE_BLOCK);
|
||||
txmsg.total = htobe32(len);
|
||||
|
||||
b = 0;
|
||||
while (len > 0) {
|
||||
int mlen;
|
||||
|
||||
mlen = len;
|
||||
if (mlen > UATH_MAX_FWBLOCK_SIZE)
|
||||
mlen = UATH_MAX_FWBLOCK_SIZE;
|
||||
txmsg.remain = htobe32(len - mlen);
|
||||
txmsg.len = htobe32(mlen);
|
||||
|
||||
/* send firmware block meta-data */
|
||||
VERBOSE("send block %2u: %zd bytes remaining", b, len - mlen);
|
||||
if (write(msg, &txmsg, sizeof(txmsg)) != sizeof(txmsg)) {
|
||||
VERBOSE("%s", "\n");
|
||||
err(-1, "error sending msg (%s)", msgdev);
|
||||
break;
|
||||
}
|
||||
|
||||
/* send firmware block data */
|
||||
VERBOSE("%s", "\n : data...");
|
||||
if (write(data, txdata, mlen) != mlen) {
|
||||
VERBOSE("%s", "\n");
|
||||
err(-1, "error sending data (%s)", datadev);
|
||||
break;
|
||||
}
|
||||
|
||||
/* wait for ack from firmware */
|
||||
VERBOSE("%s", "\n : wait for ack...");
|
||||
bzero(&rxmsg, sizeof(rxmsg));
|
||||
if (read(msg, &rxmsg, sizeof(rxmsg)) != sizeof(rxmsg)) {
|
||||
VERBOSE("%s", "\n");
|
||||
err(-1, "error reading msg (%s)", msgdev);
|
||||
break;
|
||||
}
|
||||
|
||||
VERBOSE("flags=0x%x total=%d\n",
|
||||
be32toh(rxmsg.flags), be32toh(rxmsg.rxtotal));
|
||||
len -= mlen;
|
||||
txdata += mlen;
|
||||
b++;
|
||||
}
|
||||
sleep(1);
|
||||
close(fw);
|
||||
close(msg);
|
||||
close(data);
|
||||
return 0;
|
||||
}
|
Loading…
Reference in New Issue
Block a user