arm64: set FPEN if we're stuck with HCR_EL2.E2H
On Apple Silicon systems, E2H can't actually be cleared; we're stuck with it. Check it again when we're setting up CPTR_EL2 and set FPEN appropriately to avoid later trapping to EL2 on writes to SIMD registers. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D38819
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@ -263,6 +263,10 @@ LENTRY(drop_to_el1)
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ldr x2, =(HCR_RW | HCR_APK | HCR_API)
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ldr x2, =(HCR_RW | HCR_APK | HCR_API)
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msr hcr_el2, x2
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msr hcr_el2, x2
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/* Stash value of HCR_EL2 for later */
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isb
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mrs x4, hcr_el2
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/* Load the Virtualization Process ID Register */
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/* Load the Virtualization Process ID Register */
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mrs x2, midr_el1
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mrs x2, midr_el1
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msr vpidr_el2, x2
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msr vpidr_el2, x2
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@ -275,8 +279,15 @@ LENTRY(drop_to_el1)
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ldr x2, .Lsctlr_res1
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ldr x2, .Lsctlr_res1
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msr sctlr_el1, x2
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msr sctlr_el1, x2
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/* Don't trap to EL2 for exceptions */
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/*
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mov x2, #CPTR_RES1
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* On some hardware, e.g., Apple M1, we can't clear E2H, so make sure we
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* don't trap to EL2 for SIMD register usage to have at least a
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* minimally usable system.
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*/
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tst x4, #HCR_E2H
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mov x3, #CPTR_RES1 /* HCR_E2H == 0 */
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mov x4, #CPTR_FPEN /* HCR_E2H == 1 */
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csel x2, x3, x4, eq
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msr cptr_el2, x2
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msr cptr_el2, x2
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/* Don't trap to EL2 for CP15 traps */
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/* Don't trap to EL2 for CP15 traps */
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@ -45,9 +45,13 @@
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#define CNTHCTL_EL1PCTEN (1 << 0) /*Allow EL0/1 physical counter access*/
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#define CNTHCTL_EL1PCTEN (1 << 0) /*Allow EL0/1 physical counter access*/
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/* CPTR_EL2 - Architecture feature trap register */
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/* CPTR_EL2 - Architecture feature trap register */
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/* Valid if HCR_EL2.E2H == 0 */
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#define CPTR_RES0 0x7fefc800
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#define CPTR_RES0 0x7fefc800
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#define CPTR_RES1 0x000033ff
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#define CPTR_RES1 0x000033ff
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#define CPTR_TFP 0x00000400
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#define CPTR_TFP 0x00000400
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/* Valid if HCR_EL2.E2H == 1 */
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#define CPTR_FPEN 0x00300000
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/* Unconditionally valid */
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#define CPTR_TTA 0x00100000
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#define CPTR_TTA 0x00100000
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#define CPTR_TCPAC 0x80000000
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#define CPTR_TCPAC 0x80000000
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