jedec_dimm(4): report asset info and temperatures for DDR3 and DDR4 DIMMs
A super-set of the functionality of jedec_ts(4). jedec_dimm(4) reports asset information (Part Number, Serial Number) encoded in the "Serial Presence Detect" (SPD) data on JEDEC DDR3 and DDR4 DIMMs. It also calculates and reports the memory capacity of the DIMM, in megabytes. If the DIMM includes a "Thermal Sensor On DIMM" (TSOD), the temperature is also reported. Reviewed by: cem MFC after: 1 week Relnotes: yes Sponsored by: Panasas Differential Revision: https://reviews.freebsd.org/D14392 Discussed with: avg, cem Tested by: avg, cem (previous version, no semantic changes)
This commit is contained in:
Ravi Pokala
parent
363b2c7fd2
commit
dcd935dfd1
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=329843
@ -248,6 +248,7 @@ MAN= aac.4 \
|
||||
ixgbe.4 \
|
||||
ixl.4 \
|
||||
ixlv.4 \
|
||||
jedec_dimm.4 \
|
||||
jedec_ts.4 \
|
||||
jme.4 \
|
||||
joy.4 \
|
||||
|
||||
240
share/man/man4/jedec_dimm.4
Normal file
240
share/man/man4/jedec_dimm.4
Normal file
@ -0,0 +1,240 @@
|
||||
.\"
|
||||
.\" SPDX-License-Identifier: BSD-2-Clause-FreeBSD
|
||||
.\"
|
||||
.\" Copyright (c) 2016 Andriy Gapon <avg@FreeBSD.org>
|
||||
.\" Copyright (c) 2018 Ravi Pokala <rpokala@freebsd.org>
|
||||
.\" All rights reserved.
|
||||
.\"
|
||||
.\" Redistribution and use in source and binary forms, with or without
|
||||
.\" modification, are permitted provided that the following conditions
|
||||
.\" are met:
|
||||
.\" 1. Redistributions of source code must retain the above copyright
|
||||
.\" notice, this list of conditions and the following disclaimer.
|
||||
.\" 2. Redistributions in binary form must reproduce the above copyright
|
||||
.\" notice, this list of conditions and the following disclaimer in the
|
||||
.\" documentation and/or other materials provided with the distribution.
|
||||
.\"
|
||||
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
.\"
|
||||
.\" $FreeBSD$
|
||||
.\"
|
||||
.Dd February 22, 2018
|
||||
.Dt JEDEC_DIMM 4
|
||||
.Os
|
||||
.Sh NAME
|
||||
.Nm jedec_dimm
|
||||
.Nd report asset information and temperatures for JEDEC DDR3 / DDR4 DIMMs
|
||||
.Sh SYNOPSIS
|
||||
.Bd -ragged -offset indent
|
||||
.Cd "device jedec_dimm"
|
||||
.Cd "device smbus"
|
||||
.Ed
|
||||
.Pp
|
||||
Alternatively, to load the driver as a module at boot time, place the following
|
||||
line in
|
||||
.Xr loader.conf 5 :
|
||||
.Bd -literal -offset indent
|
||||
jedec_dimm_load="YES"
|
||||
.Ed
|
||||
.Pp
|
||||
Addressing information must be manually specified in
|
||||
.Pa /boot/device.hints :
|
||||
.Bd -literal -offset indent
|
||||
.Cd hint.jedec_dimm.0.at="smbus0"
|
||||
.Cd hint.jedec_dimm.0.addr="0xa0"
|
||||
.Cd hint.jedec_dimm.0.slotid="Silkscreen"
|
||||
.Ed
|
||||
.Sh DESCRIPTION
|
||||
The
|
||||
.Nm
|
||||
driver reports asset information (Part Number, Serial Number) encoded in the
|
||||
.Dq Serial Presence Detect
|
||||
(SPD) data on JEDEC DDR3 and DDR4 DIMMs.
|
||||
It also calculates and reports the memory capacity of the DIMM, in megabytes.
|
||||
If the DIMM includes a
|
||||
.Dq Thermal Sensor On DIMM
|
||||
(TSOD), the temperature is also reported.
|
||||
.Pp
|
||||
The
|
||||
.Nm
|
||||
driver accesses the SPD and TSOD over the
|
||||
.Xr smbus 4 .
|
||||
.Pp
|
||||
The data is reported via a
|
||||
.Xr sysctl 8
|
||||
interface; all values are read-only:
|
||||
.Bl -tag -width "dev.jedec_dimm.X.capacity"
|
||||
.It Va dev.jedec_dimm.X.%desc
|
||||
a string description of the DIMM, including TSOD and slotid info if present.
|
||||
.It Va dev.jedec_dimm.X.capacity
|
||||
the DIMM's memory capacity, in megabytes
|
||||
.It Va dev.jedec_dimm.X.part
|
||||
the manufacturer's part number of the DIMM
|
||||
.It Va dev.jedec_dimm.X.serial
|
||||
the manufacturer's serial number of the DIMM
|
||||
.It Va dev.jedec_dimm.X.slotid
|
||||
a copy of the corresponding hint, if set
|
||||
.It Va dev.jedec_dimm.X.temp
|
||||
if a TSOD is present, the reported temperature
|
||||
.It Va dev.jedec_dimm.X.type
|
||||
the DIMM type (DDR3 or DDR4)
|
||||
.El
|
||||
.Pp
|
||||
These values are configurable for
|
||||
.Nm
|
||||
via
|
||||
.Xr device.hints 5 :
|
||||
.Bl -tag -width "hint.jedec_dimm.X.slotid"
|
||||
.It Va hint.jedec_dimm.X.at
|
||||
the
|
||||
.Xr smbus 4
|
||||
to which the DIMM is connected
|
||||
.It Va hint.jedec_dimm.X.addr
|
||||
the SMBus address of the SPD.
|
||||
JEDEC specifies that the four most-significant bits of the address are the
|
||||
.Dq Device Type Identifier
|
||||
(DTI), and that the DTI of the SPD is 0xa.
|
||||
Since the least-significant bit of an SMBus address is the read/write bit, and
|
||||
is always written as 0, that means the four least-significant bits of the
|
||||
address must be even.
|
||||
.It Va hint.jedec_dimm.X.slotid
|
||||
optional slot identifier.
|
||||
If populated with the DIMM slot name silkscreened on the motherboard, this
|
||||
provides a mapping between the DIMM slot name and the DIMM serial number.
|
||||
That mapping is useful for detailed asset tracking, and makes it easier to
|
||||
physically locate a specific DIMM when doing a replacement.
|
||||
This is useful when assembling multiple identical systems, as might be done by
|
||||
a system vendor.
|
||||
The mapping between bus/address and DIMM slot must first be determined, either
|
||||
through motherboard documentation or trial-and-error.
|
||||
.El
|
||||
.Pp
|
||||
If the DIMMs are on an I2C bus behind an
|
||||
.Xr iicbus 4
|
||||
controller, then the
|
||||
.Xr iicsmb 4
|
||||
bridge driver can be used to attach the
|
||||
.Xr smbus 4 .
|
||||
.Sh EXAMPLES
|
||||
Consider two DDR4 DIMMs with the following hints:
|
||||
.Bd -literal -offset indent
|
||||
hint.jedec_dimm.0.at="smbus0"
|
||||
hint.jedec_dimm.0.addr="0xa0"
|
||||
hint.jedec_dimm.0.slotid="A1"
|
||||
|
||||
hint.jedec_dimm.6.at="smbus1"
|
||||
hint.jedec_dimm.6.addr="0xa8"
|
||||
.Ed
|
||||
.Pp
|
||||
Their
|
||||
.Xr sysctl 8
|
||||
output (sorted):
|
||||
.Bd -literal -offset indent
|
||||
dev.jedec_dimm.0.%desc: DDR4 DIMM w/ Atmel TSOD (A1)
|
||||
dev.jedec_dimm.0.%driver: jedec_dimm
|
||||
dev.jedec_dimm.0.%location: addr=0xa0
|
||||
dev.jedec_dimm.0.%parent: smbus0
|
||||
dev.jedec_dimm.0.%pnpinfo:
|
||||
dev.jedec_dimm.0.capacity: 16384
|
||||
dev.jedec_dimm.0.part: 36ASF2G72PZ-2G1A2
|
||||
dev.jedec_dimm.0.serial: 0ea815de
|
||||
dev.jedec_dimm.0.slotid: A1
|
||||
dev.jedec_dimm.0.temp: 32.7C
|
||||
dev.jedec_dimm.0.type: DDR4
|
||||
|
||||
dev.jedec_dimm.6.%desc: DDR4 DIMM w/ TSE2004av compliant TSOD
|
||||
dev.jedec_dimm.6.%driver: jedec_dimm
|
||||
dev.jedec_dimm.6.%location: addr=0xa8
|
||||
dev.jedec_dimm.6.%parent: smbus1
|
||||
dev.jedec_dimm.6.%pnpinfo:
|
||||
dev.jedec_dimm.6.capacity: 8192
|
||||
dev.jedec_dimm.6.part: VRA9MR8B2H1603
|
||||
dev.jedec_dimm.6.serial: 0c4c46ad
|
||||
dev.jedec_dimm.6.temp: 43.1C
|
||||
dev.jedec_dimm.6.type: DDR4
|
||||
.Ed
|
||||
.Sh COMPATIBILITY
|
||||
Hints for
|
||||
.Xr jedec_ts 4
|
||||
can be mechanically converted for use with
|
||||
.Nm .
|
||||
Two changes are required:
|
||||
.Bl -enum
|
||||
.It
|
||||
In all
|
||||
.Xr jedec_ts 4
|
||||
hints, replace
|
||||
.Dq jedec_ts
|
||||
with
|
||||
.Dq jedec_dimm
|
||||
.It
|
||||
In
|
||||
.Xr jedec_ts 4
|
||||
.Dq addr
|
||||
hints, replace the TSOD DTI
|
||||
.Dq 0x3
|
||||
with the SPD DTI
|
||||
.Dq 0xa
|
||||
.El
|
||||
.Pp
|
||||
The following
|
||||
.Xr sed 1
|
||||
script will perform the necessary changes:
|
||||
.Bd -literal -offset indent
|
||||
sed -i ".old" -e 's/jedec_ts/jedec_dimm/' \\
|
||||
-e '/jedec_dimm/s/addr="0x3/addr="0xa/' /boot/device.hints
|
||||
.Ed
|
||||
.Sh SEE ALSO
|
||||
.Xr iicbus 4 ,
|
||||
.Xr iicsmb 4 ,
|
||||
.Xr jedec_ts 4 ,
|
||||
.Xr smbus 4 ,
|
||||
.Xr sysctl 8
|
||||
.Sh STANDARDS
|
||||
.Rs
|
||||
(DDR3 SPD)
|
||||
.%A JEDEC
|
||||
.%T Standard 21-C, Annex K
|
||||
.Re
|
||||
.Pp
|
||||
.Rs
|
||||
(DDR3 TSOD)
|
||||
.%A JEDEC
|
||||
.%T Standard 21-C, TSE2002av
|
||||
.Re
|
||||
.Pp
|
||||
.Rs
|
||||
(DDR4 SPD)
|
||||
.%A JEDEC
|
||||
.%T Standard 21-C, Annex L
|
||||
.Re
|
||||
.Pp
|
||||
.Rs
|
||||
(DDR4 TSOD)
|
||||
.%A JEDEC
|
||||
.%T Standard 21-C, TSE2004av
|
||||
.Re
|
||||
.Sh HISTORY
|
||||
The
|
||||
.Nm
|
||||
driver first appeared in
|
||||
.Fx 12.0 .
|
||||
.Sh AUTHORS
|
||||
.An -nosplit
|
||||
The
|
||||
.Nm
|
||||
driver and this manual page were written by
|
||||
.An Ravi Pokala Aq Mt rpokala@freebsd.org .
|
||||
They are both based in part on the
|
||||
.Xr jedec_ts 4
|
||||
driver and manual page, written by
|
||||
.An Andriy Gapon Aq Mt avg@FreeBSD.org .
|
||||
@ -2490,8 +2490,10 @@ device smb
|
||||
|
||||
# SMBus peripheral devices
|
||||
#
|
||||
# jedec_dimm Asset and temperature reporting for DDR3 and DDR4 DIMMs
|
||||
# jedec_ts Temperature Sensor compliant with JEDEC Standard 21-C
|
||||
#
|
||||
device jedec_dimm
|
||||
device jedec_ts
|
||||
|
||||
# I2C Bus
|
||||
|
||||
@ -2274,6 +2274,7 @@ dev/ixgbe/ixgbe_dcb_82598.c optional ix inet | ixv inet \
|
||||
compile-with "${NORMAL_C} -I$S/dev/ixgbe"
|
||||
dev/ixgbe/ixgbe_dcb_82599.c optional ix inet | ixv inet \
|
||||
compile-with "${NORMAL_C} -I$S/dev/ixgbe"
|
||||
dev/jedec_dimm/jedec_dimm.c optional jedec_dimm smbus
|
||||
dev/jedec_ts/jedec_ts.c optional jedec_ts smbus
|
||||
dev/jme/if_jme.c optional jme pci
|
||||
dev/joy/joy.c optional joy
|
||||
|
||||
1010
sys/dev/jedec_dimm/jedec_dimm.c
Normal file
1010
sys/dev/jedec_dimm/jedec_dimm.c
Normal file
File diff suppressed because it is too large
Load Diff
147
sys/dev/jedec_dimm/jedec_dimm.h
Normal file
147
sys/dev/jedec_dimm/jedec_dimm.h
Normal file
@ -0,0 +1,147 @@
|
||||
/*-
|
||||
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
|
||||
*
|
||||
* Authors: Ravi Pokala (rpokala@freebsd.org)
|
||||
*
|
||||
* Copyright (c) 2018 Panasas
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _DEV__JEDEC_DIMM__JEDEC_DIMM_H_
|
||||
#define _DEV__JEDEC_DIMM__JEDEC_DIMM_H_
|
||||
|
||||
/* JEDEC DIMMs include one or more SMBus devices.
|
||||
*
|
||||
* At a minimum, they have an EEPROM containing either 256 bytes (DDR3) or 512
|
||||
* bytes (DDR4) of "Serial Presence Detect" (SPD) information. The SPD contains
|
||||
* data used by the memory controller to configure itself, and it also includes
|
||||
* asset information. The layout of SPD data is defined in:
|
||||
*
|
||||
* JEDEC Standard 21-C, Annex K (DDR3)
|
||||
* JEDEC Standard 21-C, Annex L (DDR4)
|
||||
*
|
||||
* DIMMs may also include a "Thermal Sensor on DIMM" (TSOD), which reports
|
||||
* temperature data. While not strictly required, the TSOD is so often included
|
||||
* that JEDEC defined standards for single chips which include both SPD and TSOD
|
||||
* functions. They respond on multiple SMBus addresses, depending on the
|
||||
* function.
|
||||
*
|
||||
* JEDEC Standard 21-C, TSE2002av (DDR3)
|
||||
* JEDEC Standard 21-C, TSE2004av (DDR4)
|
||||
*/
|
||||
|
||||
/* TSE2004av defines several Device Type Identifiers (DTIs), which are the high
|
||||
* nybble of the SMBus address. Addresses with DTIs of PROTECT (or PAGE, which
|
||||
* has the same value) are essentially "broadcast" addresses; all SPD devices
|
||||
* respond to them, changing their mode based on the Logical Serial Address
|
||||
* (LSA) encoded in bits [3:1]. For normal SPD access, bits [3:1] encode the
|
||||
* DIMM slot number.
|
||||
*/
|
||||
#define JEDEC_SPD_PAGE_SIZE 256
|
||||
#define JEDEC_DTI_SPD 0xa0
|
||||
#define JEDEC_DTI_TSOD 0x30
|
||||
#define JEDEC_DTI_PROTECT 0x60
|
||||
#define JEDEC_LSA_PROTECT_SET0 0x02
|
||||
#define JEDEC_LSA_PROTECT_SET1 0x08
|
||||
#define JEDEC_LSA_PROTECT_SET2 0x0a
|
||||
#define JEDEC_LSA_PROTECT_SET3 0x00
|
||||
#define JEDEC_LSA_PROTECT_CLR 0x06
|
||||
#define JEDEC_LSA_PROTECT_GET0 0x03
|
||||
#define JEDEC_LSA_PROTECT_GET1 0x09
|
||||
#define JEDEC_LSA_PROTECT_GET2 0x0b
|
||||
#define JEDEC_LSA_PROTECT_GET3 0x01
|
||||
#define JEDEC_DTI_PAGE 0x60
|
||||
#define JEDEC_LSA_PAGE_SET0 0x0c
|
||||
#define JEDEC_LSA_PAGE_SET1 0x0e
|
||||
#define JEDEC_LSA_PAGE_GET 0x0d
|
||||
|
||||
/* The offsets and lengths of various SPD bytes are defined in Annex K (DDR3)
|
||||
* and Annex L (DDR4). Conveniently, the DRAM type is at the same offset for
|
||||
* both versions.
|
||||
*
|
||||
* This list only includes information needed to get the asset information and
|
||||
* calculate the DIMM capacity.
|
||||
*/
|
||||
#define SPD_OFFSET_DRAM_TYPE 2
|
||||
#define SPD_OFFSET_DDR3_SDRAM_CAPACITY 4
|
||||
#define SPD_OFFSET_DDR3_DIMM_RANKS 7
|
||||
#define SPD_OFFSET_DDR3_SDRAM_WIDTH 7
|
||||
#define SPD_OFFSET_DDR3_BUS_WIDTH 8
|
||||
#define SPD_OFFSET_DDR3_TSOD_PRESENT 32
|
||||
#define SPD_OFFSET_DDR3_SERIAL 122
|
||||
#define SPD_LEN_DDR3_SERIAL 4
|
||||
#define SPD_OFFSET_DDR3_PARTNUM 128
|
||||
#define SPD_LEN_DDR3_PARTNUM 18
|
||||
#define SPD_OFFSET_DDR4_SDRAM_CAPACITY 4
|
||||
#define SPD_OFFSET_DDR4_SDRAM_PKG_TYPE 6
|
||||
#define SPD_OFFSET_DDR4_DIMM_RANKS 12
|
||||
#define SPD_OFFSET_DDR4_SDRAM_WIDTH 12
|
||||
#define SPD_OFFSET_DDR4_BUS_WIDTH 13
|
||||
#define SPD_OFFSET_DDR4_TSOD_PRESENT 14
|
||||
#define SPD_OFFSET_DDR4_SERIAL 325
|
||||
#define SPD_LEN_DDR4_SERIAL 4
|
||||
#define SPD_OFFSET_DDR4_PARTNUM 329
|
||||
#define SPD_LEN_DDR4_PARTNUM 20
|
||||
|
||||
/* The "DRAM Type" field of the SPD enumerates various memory technologies which
|
||||
* have been used over the years. The list is append-only, so we need only refer
|
||||
* to the latest SPD specification. In this case, Annex L for DDR4.
|
||||
*/
|
||||
enum dram_type {
|
||||
DRAM_TYPE_RESERVED = 0x00,
|
||||
DRAM_TYPE_FAST_PAGE_MODE = 0x01,
|
||||
DRAM_TYPE_EDO = 0x02,
|
||||
DRAM_TYPE_PIPLEINED_NYBBLE = 0x03,
|
||||
DRAM_TYPE_SDRAM = 0x04,
|
||||
DRAM_TYPE_ROM = 0x05,
|
||||
DRAM_TYPE_DDR_SGRAM = 0x06,
|
||||
DRAM_TYPE_DDR_SDRAM = 0x07,
|
||||
DRAM_TYPE_DDR2_SDRAM = 0x08,
|
||||
DRAM_TYPE_DDR2_SDRAM_FBDIMM = 0x09,
|
||||
DRAM_TYPE_DDR2_SDRAM_FBDIMM_PROBE = 0x0a,
|
||||
DRAM_TYPE_DDR3_SDRAM = 0x0b,
|
||||
DRAM_TYPE_DDR4_SDRAM = 0x0c,
|
||||
DRAM_TYPE_RESERVED_0D = 0x0d,
|
||||
DRAM_TYPE_DDR4E_SDRAM = 0x0e,
|
||||
DRAM_TYPE_LPDDR3_SDRAM = 0x0f,
|
||||
DRAM_TYPE_LPDDR4_SDRAM = 0x10,
|
||||
};
|
||||
|
||||
/* The TSOD is accessed using a simple word interface, which is identical
|
||||
* between TSE2002av (DDR3) and TSE2004av (DDR4).
|
||||
*/
|
||||
#define TSOD_REG_CAPABILITES 0
|
||||
#define TSOD_REG_CONFIG 1
|
||||
#define TSOD_REG_LIM_HIGH 2
|
||||
#define TSOD_REG_LIM_LOW 3
|
||||
#define TSOD_REG_LIM_CRIT 4
|
||||
#define TSOD_REG_TEMPERATURE 5
|
||||
#define TSOD_REG_MANUFACTURER 6
|
||||
#define TSOD_REG_DEV_REV 7
|
||||
|
||||
#endif /* _DEV__JEDEC_DIMM__JEDEC_DIMM_H_ */
|
||||
|
||||
/* vi: set ts=8 sw=4 sts=8 noet: */
|
||||
@ -14,6 +14,7 @@ SUBDIR = \
|
||||
iicsmb \
|
||||
isl \
|
||||
isl12xx \
|
||||
jedec_dimm \
|
||||
jedec_ts \
|
||||
nxprtc \
|
||||
s35390a \
|
||||
|
||||
7
sys/modules/i2c/jedec_dimm/Makefile
Normal file
7
sys/modules/i2c/jedec_dimm/Makefile
Normal file
@ -0,0 +1,7 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../../dev/jedec_dimm
|
||||
KMOD = jedec_dimm
|
||||
SRCS = jedec_dimm.c jedec_dimm.h bus_if.h device_if.h smbus_if.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
Loading…
Reference in New Issue
Block a user