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Import latest changes from the vendor. This also is reported to fix the

Browse Source 
driver at long last!
Many thanks to vaidas.damosevicius@if.lt for keeping this issue alive
and pursuing Intel for a fix, Intel/ICP for working on the driver, and
Sergey Osokin for bringing the original patches up to 5-CURRENT.
This commit is contained in:
scottl 2003-04-25 05:37:04 +00:00
parent 3cc75f1128
commit dcf9335021
4 changed files with 116 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

63
sys/dev/iir/iir.c
View File

@ -1,6 +1,6 @@
/* $FreeBSD$ */
/*
* Copyright (c) 2000-01 Intel Corporation
* Copyright (c) 2000-03 Intel Corporation
* All Rights Reserved
*
* Redistribution and use in source and binary forms, with or without
@ -41,7 +41,7 @@
* TODO:
*/
#ident "$Id: iir.c 1.2 2001/06/21 20:28:32 achim Exp $"
#ident "$Id: iir.c 1.3 2003/03/21 16:28:32 achim Exp $"
#define _IIR_C_
@ -206,7 +206,7 @@ iir_init(struct gdt_softc *gdt)
/* DMA tag for mapping buffers into device visible space. */
if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0,
/*lowaddr*/BUS_SPACE_MAXADDR,
/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
/*highaddr*/BUS_SPACE_MAXADDR,
/*filter*/NULL, /*filterarg*/NULL,
/*maxsize*/MAXBSIZE, /*nsegments*/GDT_MAXSG,
@ -220,11 +220,14 @@ iir_init(struct gdt_softc *gdt)
gdt->sc_init_level++;
/* DMA tag for our ccb structures */
if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0,
/*lowaddr*/BUS_SPACE_MAXADDR,
if (bus_dma_tag_create(gdt->sc_parent_dmat,
/*alignment*/1,
/*boundary*/0,
/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
/*highaddr*/BUS_SPACE_MAXADDR,
/*filter*/NULL, /*filterarg*/NULL,
GDT_MAXCMDS * sizeof(struct gdt_ccb),
/*filter*/NULL,
/*filterarg*/NULL,
GDT_MAXCMDS * sizeof(struct gdt_ccb), /* maxsize */
/*nsegments*/1,
/*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
/*flags*/0, &gdt->sc_gccb_dmat) != 0) {
@ -393,6 +396,23 @@ iir_init(struct gdt_softc *gdt)
}
}
/* OEM */
gdt_enc32(gccb->gc_scratch + GDT_OEM_VERSION, 0x01);
gdt_enc32(gccb->gc_scratch + GDT_OEM_BUFSIZE, sizeof(gdt_oem_record_t));
if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
GDT_OEM_STR_RECORD, GDT_INVALID_CHANNEL,
sizeof(gdt_oem_str_record_t))) {
strncpy(gdt->oem_name, ((gdt_oem_str_record_t *)
gccb->gc_scratch)->text.scsi_host_drive_inquiry_vendor_id, 7);
gdt->oem_name[7]='\0';
} else {
/* Old method, based on PCI ID */
if (gdt->sc_vendor == INTEL_VENDOR_ID)
strcpy(gdt->oem_name,"Intel ");
else
strcpy(gdt->oem_name,"ICP ");
}
/* Scan for cache devices */
for (i = 0; i < cdev_cnt && i < GDT_MAX_HDRIVES; i++) {
if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INFO,
@ -748,7 +768,7 @@ gdt_next(struct gdt_softc *gdt)
}
} else if (target >= GDT_MAX_HDRIVES ||
!gdt->sc_hdr[target].hd_present || lun != 0) {
ccbh->status = CAM_SEL_TIMEOUT;
ccbh->status = CAM_DEV_NOT_THERE;
--gdt_stat.io_count_act;
xpt_done(ccb);
} else {
@ -1180,7 +1200,7 @@ gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb)
inq->response_format = 2;
inq->additional_length = 32;
inq->flags = SID_CmdQue | SID_Sync;
strcpy(inq->vendor, "IIR ");
strcpy(inq->vendor, gdt->oem_name);
sprintf(inq->product, "Host Drive #%02d", t);
strcpy(inq->revision, " ");
break;
@ -1294,13 +1314,9 @@ gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
}
if (nseg != 0) {
int op;
if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
op = BUS_DMASYNC_PREREAD;
else
op = BUS_DMASYNC_PREWRITE;
bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, op);
bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap,
(ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
}
/* We must NOT abort the command here if CAM_REQ_INPROG is not set,
@ -1682,7 +1698,7 @@ iir_intr(void *arg)
}
}
static int
int
gdt_async_event(struct gdt_softc *gdt, int service)
{
struct gdt_ccb *gccb;
@ -1742,12 +1758,11 @@ gdt_async_event(struct gdt_softc *gdt, int service)
return (0);
}
static int
int
gdt_sync_event(struct gdt_softc *gdt, int service,
u_int8_t index, struct gdt_ccb *gccb)
{
union ccb *ccb;
int op;
GDT_DPRINTF(GDT_D_INTR,
("gdt_sync_event(%p, %d, %d, %p)\n", gdt,service,index,gccb));
@ -1854,11 +1869,9 @@ gdt_sync_event(struct gdt_softc *gdt, int service,
return (2);
}
if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
op = BUS_DMASYNC_POSTREAD;
else
op = BUS_DMASYNC_POSTWRITE;
bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, op);
bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap,
(ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
ccb->csio.resid = 0;
if (gdt->sc_status == GDT_S_OK) {
@ -1886,7 +1899,7 @@ gdt_sync_event(struct gdt_softc *gdt, int service,
} else {
/* raw service */
if (gdt->sc_status != GDT_S_RAW_SCSI || gdt->sc_info >= 0x100) {
ccb->ccb_h.status = CAM_SEL_TIMEOUT;
ccb->ccb_h.status = CAM_DEV_NOT_THERE;
} else {
ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR|CAM_AUTOSNS_VALID;
ccb->csio.scsi_status = gdt->sc_info;

63
sys/dev/iir/iir.h
View File

@ -1,6 +1,6 @@
/* $FreeBSD$ */
/*
* Copyright (c) 2000-01 Intel Corporation
* Copyright (c) 2000-03 Intel Corporation
* All Rights Reserved
*
* Redistribution and use in source and binary forms, with or without
@ -41,13 +41,13 @@
*/
#ident "$Id: iir.h 1.3 2001/07/03 11:28:57 achim Exp $"
#ident "$Id: iir.h 1.4 2003/03/21 16:28:57 achim Exp $"
#ifndef _IIR_H
#define _IIR_H
#define IIR_DRIVER_VERSION 1
#define IIR_DRIVER_SUBVERSION 1
#define IIR_DRIVER_SUBVERSION 3
#define IIR_CDEV_MAJOR 164
@ -142,6 +142,7 @@
#define GDT_CACHE_DRV_INFO 0x07 /* cache drive info */
#define GDT_BOARD_FEATURES 0x15 /* controller features */
#define GDT_BOARD_INFO 0x28 /* controller info */
#define GDT_OEM_STR_RECORD 0x84 /* OEM info */
#define GDT_HOST_GET 0x10001 /* get host drive list */
#define GDT_IO_CHANNEL 0x20000 /* default IO channel */
#define GDT_INVALID_CHANNEL 0xffff /* invalid channel */
@ -371,10 +372,6 @@ extern int ser_printf(const char *fmt, ...);
#define GDT_WATCH_TIMEOUT 10000000 /* 10000 * 1us = 10s */
#define GDT_SCRATCH_SZ 3072 /* 3KB scratch buffer */
/* macros */
#define letoh32(v) le32toh(v)
#define letoh16(v) le16toh(v)
/* Map minor numbers to device identity */
#define LUN_MASK 0x0007
#define TARGET_MASK 0x03f8
@ -458,6 +455,52 @@ typedef struct gdt_osv {
char name[64];
} gdt_osv_t;
/* OEM */
#define GDT_OEM_VERSION 0x00
#define GDT_OEM_BUFSIZE 0x0c
typedef struct {
u_int32_t ctl_version;
u_int32_t file_major_version;
u_int32_t file_minor_version;
u_int32_t buffer_size;
u_int32_t cpy_count;
u_int32_t ext_error;
u_int32_t oem_id;
u_int32_t board_id;
} gdt_oem_param_t;
typedef struct {
char product_0_1_name[16];
char product_4_5_name[16];
char product_cluster_name[16];
char product_reserved[16];
char scsi_cluster_target_vendor_id[16];
char cluster_raid_fw_name[16];
char oem_brand_name[16];
char oem_raid_type[16];
char bios_type[13];
char bios_title[50];
char oem_company_name[37];
u_int32_t pci_id_1;
u_int32_t pci_id_2;
char validation_status[80];
char reserved_1[4];
char scsi_host_drive_inquiry_vendor_id[16];
char library_file_template[32];
char tool_name_1[32];
char tool_name_2[32];
char tool_name_3[32];
char oem_contact_1[84];
char oem_contact_2[84];
char oem_contact_3[84];
} gdt_oem_record_t;
typedef struct {
gdt_oem_param_t parameters;
gdt_oem_record_t text;
} gdt_oem_str_record_t;
/* controller event structure */
#define GDT_ES_ASYNC 1
#define GDT_ES_DRIVER 2
@ -545,6 +588,7 @@ struct gdt_softc {
#define GDT_FC 0x10
#define GDT_CLASS(gdt) ((gdt)->sc_class & GDT_CLASS_MASK)
int sc_bus, sc_slot;
u_int16_t sc_vendor;
u_int16_t sc_device, sc_subdevice;
u_int16_t sc_fw_vers;
int sc_init_level;
@ -606,6 +650,7 @@ struct gdt_softc {
u_int16_t sc_cache_feat;
gdt_evt_data sc_dvr;
char oem_name[8];
struct cam_sim *sims[GDT_MAXBUS];
struct cam_path *paths[GDT_MAXBUS];
@ -676,14 +721,14 @@ static __inline__ u_int16_t
gdt_dec16(addr)
u_int8_t *addr;
{
return letoh16(*(u_int16_t *)addr);
return le16toh(*(u_int16_t *)addr);
}
static __inline__ u_int32_t
gdt_dec32(addr)
u_int8_t *addr;
{
return letoh32(*(u_int32_t *)addr);
return le32toh(*(u_int32_t *)addr);
}
#endif

25
sys/dev/iir/iir_ctrl.c
View File

@ -46,8 +46,9 @@
#include <sys/kernel.h>
#include <sys/uio.h>
#include <sys/conf.h>
#include <sys/disk.h>
#include <sys/stat.h>
#include <sys/ioccom.h>
#include <sys/disklabel.h>
#include <machine/bus.h>
#include <vm/vm.h>
#include <vm/vm_kern.h>
@ -78,6 +79,9 @@ static struct cdevsw iir_cdevsw = {
.d_maj = CDEV_MAJOR,
};
/*
static int iir_devsw_installed = 0;
*/
#ifndef SDEV_PER_HBA
static int sdev_made = 0;
#endif
@ -97,12 +101,12 @@ gdt_make_dev(int unit)
#ifdef SDEV_PER_HBA
dev = make_dev(&iir_cdevsw, hba2minor(unit), UID_ROOT, GID_OPERATOR,
S_IRUSR | S_IWUSR | S_IRGRP, "iir%d", unit);
S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH, "iir%d", unit);
#else
if (sdev_made)
return (0);
dev = make_dev(&iir_cdevsw, 0, UID_ROOT, GID_OPERATOR,
S_IRUSR | S_IWUSR | S_IRGRP, "iir");
S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH, "iir");
sdev_made = 1;
#endif
return (dev);
@ -348,3 +352,18 @@ iir_ioctl(dev_t dev, u_long cmd, caddr_t cmdarg, int flags, d_thread_t * p)
--gdt_stat.io_count_act;
return (0);
}
/*
static void
iir_drvinit(void *unused)
{
GDT_DPRINTF(GDT_D_DEBUG, ("iir_drvinit()\n"));
if (!iir_devsw_installed) {
cdevsw_add(&iir_cdevsw);
iir_devsw_installed = 1;
}
}
SYSINIT(iir_dev, SI_SUB_DRIVERS, SI_ORDER_MIDDLE + CDEV_MAJOR, iir_drvinit, NULL)
*/

3
sys/dev/iir/iir_pci.c
View File

@ -213,6 +213,7 @@ iir_pci_attach(device_t dev)
gdt->sc_hanum = device_get_unit(dev);
gdt->sc_bus = pci_get_bus(dev);
gdt->sc_slot = pci_get_slot(dev);
gdt->sc_vendor = pci_get_vendor(dev);
gdt->sc_device = pci_get_device(dev);
gdt->sc_subdevice = pci_get_subdevice(dev);
gdt->sc_class = GDT_MPR;
@ -263,7 +264,7 @@ iir_pci_attach(device_t dev)
DELAY(1);
}
protocol = (u_int8_t)letoh32(bus_space_read_4(gdt->sc_dpmemt, gdt->sc_dpmemh,
protocol = (uint8_t)le32toh(bus_space_read_4(gdt->sc_dpmemt, gdt->sc_dpmemh,
GDT_MPR_IC + GDT_S_INFO));
bus_space_write_1(gdt->sc_dpmemt, gdt->sc_dpmemh, GDT_MPR_IC + GDT_S_STATUS,
0);