Clear the channel after (re)selection instead of once we see the bus go
free. When we clear SCSIRATE, also clear the FAST20 bit in SXFRCTL0. This also allowed me to clean up some of the ULTRA code. ULTRAENB->FAST20 to follow the convention in the Adaptec data books. Fix the data-overrun code to set both stcnt and hcnt otherwise, the transfer will just hang until we get a timeout. Add implicit support for the NOOP message. I've never heard of the driver issueing a reject for one, but its silly to reject NOOP and who knows how a device might react. In the dma routine, check SDONE before cleaing SDMAEN. The data books mention SDONE possibly being cleared when SDMAEN is reset. Clients of dma now need to check if SINDEX is cleared to know if a phasemis occured. Fix some comments to be correct.
This commit is contained in:
Justin T. Gibbs
parent
f852c47b11
commit
de1dc306be
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=22451
@ -84,12 +84,12 @@ reset:
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clr SCSISIGO /* De-assert BSY */
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p_busfree:
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or SXFRCTL0, CLRCHN
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clr SCSIRATE /*
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* We don't know the target we will
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* connect to, so default to narrow
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* transfers to avoid parity problems.
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*/
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and SXFRCTL0, 0xdf /* ~FAST20*/
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mvi SCSISEQ,ENRSELI /* Always allow reselection */
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mvi LASTPHASE, P_BUSFREE
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and FLAGS,0x07 /* clear target specific flags */
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@ -290,6 +290,21 @@ select2:
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* the kernel driver if it
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* happens.
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*/
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/*
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* Initialize Ultra mode setting and clear the SCSI channel.
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*/
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or SXFRCTL0, 0x1a /* CLRSTCNT|SPIOEN|CLRCHN */
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ultra:
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mvi SINDEX, ULTRA_ENB_B
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test SAVED_TCL, 0x80 jnz ultra_2 /* Target ID > 7 */
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test SBLKCTL, SELBUSB jnz ultra_2 /* Second channel */
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dec SINDEX
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ultra_2:
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mov FUNCTION1,SAVED_TCL
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mov A,FUNCTION1
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test SINDIR, A jz ndx_dtr
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or SXFRCTL0, FAST20
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/*
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* Initialize SCSIRATE with the appropriate value for this target.
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* The SCSIRATE settings for each target are stored in an array
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@ -304,23 +319,6 @@ ndx_dtr_2:
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add SINDEX,TARG_SCRATCH,A
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mov SCSIRATE,SINDIR
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/*
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* Initialize Ultra mode setting and clear the SCSI channel.
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*/
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ultra:
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and DINDEX,0xdf,SXFRCTL0 /* default to Ultra disabled */
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mvi SINDEX, ULTRA_ENB_B
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test SAVED_TCL, 0x80 jnz ultra_2 /* Target ID > 7 */
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test SBLKCTL, SELBUSB jnz ultra_2 /* Second channel device */
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dec SINDEX
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ultra_2:
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mov FUNCTION1,SAVED_TCL
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mov A,FUNCTION1
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test SINDIR, A jz set_sxfrctl0
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or DINDEX, ULTRAEN
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set_sxfrctl0:
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mov SXFRCTL0,DINDEX
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/*
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* Main loop for information transfer phases. If BSY is false, then
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@ -330,8 +328,8 @@ set_sxfrctl0:
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*
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*/
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ITloop:
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test SSTAT1,0x9 jz ITloop /* REQINIT|BUSFREE */
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test SSTAT1,BUSFREE jnz p_busfree
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test SSTAT1,REQINIT jz ITloop
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and A,PHASE_MASK,SCSISIGI
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mov LASTPHASE,A
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@ -405,10 +403,10 @@ data_phase_loop:
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* had an overrun.
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*/
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or SXFRCTL1,BITBUCKET
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and DMAPARAMS, 0xf7 /* Turn off HDMAEN */
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mvi STCNT0,0xff
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mvi STCNT1,0xff
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mvi STCNT2,0xff
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mvi HCNT0, 0xff
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mvi HCNT1, 0xff
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mvi HCNT2, 0xff
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call set_stcnt_from_hcnt
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data_phase_inbounds:
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/* If we are the last SG block, ensure wideodd is off. */
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@ -420,8 +418,8 @@ data_phase_wideodd:
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/* Go tell the host about any overruns */
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test SXFRCTL1,BITBUCKET jnz data_phase_overrun
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/* Exit if we had an underrun */
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test SSTAT0,SDONE jz data_phase_finish /* underrun STCNT != 0 */
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/* Exit if we had an underrun. dma clears SINDEX in this case. */
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test SINDEX,0xff jz data_phase_finish
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/*
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* Advance the scatter-gather pointers if needed
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@ -588,6 +586,7 @@ p_mesgin:
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cmp A,MSG_RESTOREPOINTERS je mesgin_rdptrs
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cmp A,MSG_EXTENDED je mesgin_extended
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cmp A,MSG_MESSAGE_REJECT je mesgin_reject
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cmp A,MSG_NOOP je mesgin_done
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rej_mesgin:
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/*
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@ -600,7 +599,7 @@ rej_mesgin:
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mvi MSG_MESSAGE_REJECT call mk_mesg
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mesgin_done:
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call inb_last /*ack & turn auto PIO back on*/
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call inb_last
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jmp ITloop
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@ -911,6 +910,8 @@ dma:
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dma1:
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test SSTAT0,DMADONE jnz dma3
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test SSTAT1,PHASEMIS jz dma1 /* ie. underrun */
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test SSTAT0,SDONE jnz dma3
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mov SINDEX,ALLZEROS /* Notify caller of phasemiss */
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/*
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* We will be "done" DMAing when the transfer count goes to zero, or
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@ -921,7 +922,7 @@ dma1:
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* status.
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*/
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dma3:
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test SINDEX,DIRECTION jnz dma5
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test DFCNTRL,DIRECTION jnz dma5
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dma4:
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test DFSTATUS,FIFOEMP jz dma4
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@ -933,9 +934,9 @@ dma5:
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/* Don't clobber an inprogress host data transfer */
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test DFSTATUS, MREQPEND jnz dma5
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/* disable DMA */
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and DFCNTRL, 0xc7 /* ~(SCSIEN|SDMAEN|HDMAEN|DIRECTION) */
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and DFCNTRL, 0xc7 /* ~(SCSIEN|SDMAEN|HDMAEN) */
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dma6:
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test DFCNTRL, 0x38 jnz dma6 /* (SCSIEN|SDMAEN|HDMAEN|DIRECTION) */
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test DFCNTRL, 0x38 jnz dma6 /* (SCSIEN|SDMAEN|HDMAEN) */
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return:
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ret
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@ -59,7 +59,7 @@
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#define SXFRCTL0 0x001
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#define DFON 0x80
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#define DFPEXP 0x40
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#define ULTRAEN 0x20
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#define FAST20 0x20
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#define CLRSTCNT 0x10
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#define SPIOEN 0x08
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#define SCAMEN 0x04
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