Whether you can use mttb() or not is more complicated than whether PSL_HV
is set and the right thing to do may be platform-dependent (it requires firmware on PowerNV, for instance). Make it a new platform method called platform_smp_timebase_sync(). MFC after: 3 weeks
This commit is contained in:
parent
763864aa95
commit
de2dd83fb9
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=326205
@ -281,13 +281,8 @@ cpudep_ap_setup()
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vers = mfpvr() >> 16;
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/* The following is needed for restoring from sleep. */
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#ifdef __powerpc64__
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/* Writing to the time base register is hypervisor-privileged */
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if (mfmsr() & PSL_HV)
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mttb(0);
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#else
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mttb(0);
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#endif
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platform_smp_timebase_sync(0, 1);
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switch(vers) {
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case IBM970:
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case IBM970FX:
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@ -45,6 +45,8 @@ struct mem_region {
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uint64_t mr_size;
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};
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/* Documentation for these functions is in platform_if.m */
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void mem_regions(struct mem_region **, int *, struct mem_region **, int *);
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vm_offset_t platform_real_maxaddr(void);
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@ -54,6 +56,7 @@ int platform_smp_first_cpu(struct cpuref *);
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int platform_smp_next_cpu(struct cpuref *);
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int platform_smp_get_bsp(struct cpuref *);
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int platform_smp_start_cpu(struct pcpu *);
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void platform_smp_timebase_sync(u_long tb, int ap);
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void platform_smp_ap_init(void);
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const char *installed_platform(void);
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@ -92,6 +92,7 @@ static int mpc85xx_smp_first_cpu(platform_t, struct cpuref *cpuref);
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static int mpc85xx_smp_next_cpu(platform_t, struct cpuref *cpuref);
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static int mpc85xx_smp_get_bsp(platform_t, struct cpuref *cpuref);
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static int mpc85xx_smp_start_cpu(platform_t, struct pcpu *cpu);
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static void mpc85xx_smp_timebase_sync(platform_t, u_long tb, int ap);
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static void mpc85xx_idle(platform_t, int cpu);
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static int mpc85xx_idle_wakeup(platform_t plat, int cpu);
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@ -107,6 +108,7 @@ static platform_method_t mpc85xx_methods[] = {
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PLATFORMMETHOD(platform_smp_next_cpu, mpc85xx_smp_next_cpu),
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PLATFORMMETHOD(platform_smp_get_bsp, mpc85xx_smp_get_bsp),
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PLATFORMMETHOD(platform_smp_start_cpu, mpc85xx_smp_start_cpu),
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PLATFORMMETHOD(platform_smp_timebase_sync, mpc85xx_smp_timebase_sync),
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PLATFORMMETHOD(platform_reset, mpc85xx_reset),
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PLATFORMMETHOD(platform_idle, mpc85xx_idle),
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@ -528,6 +530,13 @@ mpc85xx_reset(platform_t plat)
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;
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}
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static void
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mpc85xx_smp_timebase_sync(platform_t plat, u_long tb, int ap)
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{
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mttb(tb);
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}
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static void
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mpc85xx_idle(platform_t plat, int cpu)
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{
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@ -64,6 +64,7 @@ static int powermac_smp_first_cpu(platform_t, struct cpuref *cpuref);
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static int powermac_smp_next_cpu(platform_t, struct cpuref *cpuref);
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static int powermac_smp_get_bsp(platform_t, struct cpuref *cpuref);
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static int powermac_smp_start_cpu(platform_t, struct pcpu *cpu);
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static void powermac_smp_timebase_sync(platform_t, u_long tb, int ap);
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static void powermac_reset(platform_t);
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static void powermac_sleep(platform_t);
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@ -77,6 +78,7 @@ static platform_method_t powermac_methods[] = {
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PLATFORMMETHOD(platform_smp_next_cpu, powermac_smp_next_cpu),
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PLATFORMMETHOD(platform_smp_get_bsp, powermac_smp_get_bsp),
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PLATFORMMETHOD(platform_smp_start_cpu, powermac_smp_start_cpu),
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PLATFORMMETHOD(platform_smp_timebase_sync, powermac_smp_timebase_sync),
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PLATFORMMETHOD(platform_reset, powermac_reset),
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PLATFORMMETHOD(platform_sleep, powermac_sleep),
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@ -389,6 +391,13 @@ powermac_smp_start_cpu(platform_t plat, struct pcpu *pc)
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#endif
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}
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static void
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powermac_smp_timebase_sync(platform_t plat, u_long tb, int ap)
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{
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mttb(tb);
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}
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static void
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powermac_reset(platform_t platform)
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{
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@ -81,13 +81,7 @@ machdep_ap_bootstrap(void)
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;
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/* Initialize DEC and TB, sync with the BSP values */
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#ifdef __powerpc64__
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/* Writing to the time base register is hypervisor-privileged */
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if (mfmsr() & PSL_HV)
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mttb(ap_timebase);
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#else
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mttb(ap_timebase);
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#endif
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platform_smp_timebase_sync(ap_timebase, 1);
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decr_ap_init();
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/* Give platform code a chance to do anything necessary */
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@ -144,7 +138,6 @@ cpu_mp_start(void)
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error = platform_smp_get_bsp(&bsp);
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KASSERT(error == 0, ("Don't know BSP"));
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KASSERT(bsp.cr_cpuid == 0, ("%s: cpuid != 0", __func__));
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error = platform_smp_first_cpu(&cpu);
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while (!error) {
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@ -184,7 +177,7 @@ cpu_mp_announce(void)
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struct pcpu *pc;
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int i;
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for (i = 0; i <= mp_maxid; i++) {
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CPU_FOREACH(i) {
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pc = pcpu_find(i);
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if (pc == NULL)
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continue;
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@ -246,13 +239,7 @@ cpu_mp_unleash(void *dummy)
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/* Let APs continue */
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atomic_store_rel_int(&ap_letgo, 1);
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#ifdef __powerpc64__
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/* Writing to the time base register is hypervisor-privileged */
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if (mfmsr() & PSL_HV)
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mttb(ap_timebase);
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#else
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mttb(ap_timebase);
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#endif
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platform_smp_timebase_sync(ap_timebase, 0);
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while (ap_awake < smp_cpus)
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;
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@ -266,6 +266,12 @@ platform_cpu_idle(int cpu)
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PLATFORM_IDLE(plat_obj, cpu);
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}
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void platform_smp_timebase_sync(u_long tb, int ap)
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{
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PLATFORM_SMP_TIMEBASE_SYNC(plat_obj, tb, ap);
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}
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/*
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* Platform install routines. Highest priority wins, using the same
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* algorithm as bus attachment.
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@ -241,3 +241,14 @@ METHOD void sleep {
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platform_t _plat;
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};
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/**
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* @brief Attempt to synchronize timebase of current CPU with others.
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* Entered (approximately) simultaneously on all CPUs, including the BSP.
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* Passed the timebase value on the BSP as of shortly before the call.
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*/
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METHOD void smp_timebase_sync {
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platform_t _plat;
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u_long _tb;
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int _ap;
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};
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