jedec_dimm(4): Add manufacturing year and week.
DDR3 and DDR4 encode the week and year that the DIMM was manufactured, as a pair of two-digit binary-coded decimal values. Read the values, and report them as (uint8_t)s. Reviewed by: imp, jhb MFC after: 1 week Sponsored by: Panasas Differential Revision: https://reviews.freebsd.org/D39795
This commit is contained in:
Ravi Pokala
parent
e315351fc7
commit
de57e0ef5a
@ -26,7 +26,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd July 31, 2018
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.Dd April 25, 2023
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.Dt JEDEC_DIMM 4
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.Os
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.Sh NAME
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@ -76,6 +76,10 @@ interface; all values are read-only:
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a string description of the DIMM, including TSOD and slotid info if present.
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.It Va dev.jedec_dimm.X.capacity
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the DIMM's memory capacity, in megabytes
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.It Va dev.jedec_dimm.X.mfg_week
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the week within the year in which the DIMM was manufactured
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.It Va dev.jedec_dimm.X.mfg_year
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the year in which the DIMM was manufactured
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.It Va dev.jedec_dimm.X.part
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the manufacturer's part number of the DIMM
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.It Va dev.jedec_dimm.X.serial
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@ -144,6 +148,8 @@ dev.jedec_dimm.0.%location: addr=0xa0
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dev.jedec_dimm.0.%parent: smbus0
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dev.jedec_dimm.0.%pnpinfo:
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dev.jedec_dimm.0.capacity: 16384
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dev.jedec_dimm.0.mfg_week: 30
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dev.jedec_dimm.0.mfg_year: 17
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dev.jedec_dimm.0.part: 36ASF2G72PZ-2G1A2
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dev.jedec_dimm.0.serial: 0ea815de
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dev.jedec_dimm.0.slotid: A1
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@ -156,6 +162,8 @@ dev.jedec_dimm.6.%location: addr=0xa8
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dev.jedec_dimm.6.%parent: smbus1
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dev.jedec_dimm.6.%pnpinfo:
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dev.jedec_dimm.6.capacity: 8192
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dev.jedec_dimm.6.mfg_week: 13
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dev.jedec_dimm.6.mfg_year: 19
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dev.jedec_dimm.6.part: VRA9MR8B2H1603
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dev.jedec_dimm.6.serial: 0c4c46ad
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dev.jedec_dimm.6.temp: 43.1C
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@ -4,7 +4,7 @@
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* Authors: Ravi Pokala (rpokala@freebsd.org), Andriy Gapon (avg@FreeBSD.org)
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*
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* Copyright (c) 2016 Andriy Gapon <avg@FreeBSD.org>
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* Copyright (c) 2018 Panasas
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* Copyright (c) 2018-2023 Panasas
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -56,6 +56,8 @@ struct jedec_dimm_softc {
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device_t smbus;
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uint8_t spd_addr; /* SMBus address of the SPD EEPROM. */
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uint8_t tsod_addr; /* Address of the Thermal Sensor On DIMM */
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uint8_t mfg_year;
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uint8_t mfg_week;
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uint32_t capacity_mb;
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char type_str[5];
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char part_str[21]; /* 18 (DDR3) or 20 (DDR4) chars, plus terminator */
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@ -154,6 +156,9 @@ static int jedec_dimm_dump(struct jedec_dimm_softc *sc, enum dram_type type);
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static int jedec_dimm_field_to_str(struct jedec_dimm_softc *sc, char *dst,
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size_t dstsz, uint16_t offset, uint16_t len, bool ascii);
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static int jedec_dimm_mfg_date(struct jedec_dimm_softc *sc, enum dram_type type,
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uint8_t *year, uint8_t *week);
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static int jedec_dimm_probe(device_t dev);
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static int jedec_dimm_readw_be(struct jedec_dimm_softc *sc, uint8_t reg,
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@ -257,6 +262,11 @@ jedec_dimm_attach(device_t dev)
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goto out;
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}
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rc = jedec_dimm_mfg_date(sc, type, &sc->mfg_year, &sc->mfg_week);
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if (rc != 0) {
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goto out;
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}
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rc = jedec_dimm_field_to_str(sc, sc->part_str, sizeof(sc->part_str),
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partnum_offset, partnum_len, true);
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if (rc != 0) {
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@ -336,6 +346,14 @@ jedec_dimm_attach(device_t dev)
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CTLFLAG_RD | CTLFLAG_MPSAFE, sc->serial_str, 0,
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"DIMM Serial Number");
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SYSCTL_ADD_U8(ctx, children, OID_AUTO, "mfg_year",
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CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, sc->mfg_year,
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"DIMM manufacturing year (20xx)");
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SYSCTL_ADD_U8(ctx, children, OID_AUTO, "mfg_week",
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CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, sc->mfg_week,
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"DIMM manufacturing week");
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/* Create the temperature sysctl IFF the TSOD is present and valid */
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if (tsod_present && (tsod_match != NULL)) {
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SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "temp",
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@ -822,6 +840,117 @@ jedec_dimm_field_to_str(struct jedec_dimm_softc *sc, char *dst, size_t dstsz,
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return (rc);
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}
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/**
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* Both DDR3 and DDR4 encode manufacturing date as a one-byte BCD-encoded
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* year (offset from 2000) and a one-byte BCD-encoded week within that year.
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* The SPD offsets are different between the two types.
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*
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* @author rpokala
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*
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* @param[in] sc
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* Instance-specific context data
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*
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* @param[in] dram_type
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* The locations of the manufacturing date depends on the type of the DIMM.
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*
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* @param[out] year
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* The manufacturing year, offset from 2000
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*
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* @param[out] week
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* The manufacturing week within the year
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*/
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static int
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jedec_dimm_mfg_date(struct jedec_dimm_softc *sc, enum dram_type type,
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uint8_t *year, uint8_t *week)
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{
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uint8_t year_bcd;
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uint8_t week_bcd;
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uint16_t year_offset;
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uint16_t week_offset;
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bool page_changed;
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int rc;
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switch (type) {
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case DRAM_TYPE_DDR3_SDRAM:
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year_offset = SPD_OFFSET_DDR3_MOD_MFG_YEAR;
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week_offset = SPD_OFFSET_DDR3_MOD_MFG_WEEK;
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break;
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case DRAM_TYPE_DDR4_SDRAM:
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year_offset = SPD_OFFSET_DDR4_MOD_MFG_YEAR;
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week_offset = SPD_OFFSET_DDR4_MOD_MFG_WEEK;
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break;
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default:
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device_printf(sc->dev, "unsupported dram_type 0x%02x\n", type);
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rc = EINVAL;
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page_changed = false;
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goto out;
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}
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/* Change to the proper page. Offsets [0, 255] are in page0; offsets
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* [256, 512] are in page1.
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*
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* *The page must be reset to page0 before returning.*
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*
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* For the page-change operation, only the DTI and LSA matter; the
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* offset and write-value are ignored, so use just 0.
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*
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* Mercifully, JEDEC defined the fields such that all of the
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* manufacturing-related ones are on the same page, so we don't need to
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* worry about that complication.
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*/
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if (year_offset < JEDEC_SPD_PAGE_SIZE) {
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page_changed = false;
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} else if (year_offset < (2 * JEDEC_SPD_PAGE_SIZE)) {
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page_changed = true;
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rc = smbus_writeb(sc->smbus,
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(JEDEC_DTI_PAGE | JEDEC_LSA_PAGE_SET1), 0, 0);
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if (rc != 0) {
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device_printf(sc->dev,
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"unable to change page for offset 0x%04x: %d\n",
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year_offset, rc);
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}
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/* Adjust the offset to account for the page change. */
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year_offset -= JEDEC_SPD_PAGE_SIZE;
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week_offset -= JEDEC_SPD_PAGE_SIZE;
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} else {
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device_printf(sc->dev, "invalid offset 0x%04x\n", year_offset);
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rc = EINVAL;
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page_changed = false;
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goto out;
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}
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rc = smbus_readb(sc->smbus, sc->spd_addr, year_offset, &year_bcd);
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if (rc != 0) {
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device_printf(sc->dev, "failed to read mfg year: %d\n", rc);
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goto out;
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}
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rc = smbus_readb(sc->smbus, sc->spd_addr, week_offset, &week_bcd);
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if (rc != 0) {
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device_printf(sc->dev, "failed to read mfg week: %d\n", rc);
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goto out;
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}
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/* Convert from one-byte BCD to one-byte integer. */
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*year = (((year_bcd & 0xf0) >> 4) * 10) + (year_bcd & 0x0f);
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*week = (((week_bcd & 0xf0) >> 4) * 10) + (week_bcd & 0x0f);
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out:
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if (page_changed) {
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int rc2;
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/* Switch back to page0 before returning. */
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rc2 = smbus_writeb(sc->smbus,
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(JEDEC_DTI_PAGE | JEDEC_LSA_PAGE_SET0), 0, 0);
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if (rc2 != 0) {
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device_printf(sc->dev,
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"unable to restore page for offset 0x%04x: %d\n",
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year_offset, rc2);
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}
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}
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return (rc);
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}
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/**
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* device_probe() method. Validate the address that was given as a hint, and
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* display an error if it's bogus. Make sure that we're dealing with one of the
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@ -3,7 +3,7 @@
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*
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* Authors: Ravi Pokala (rpokala@freebsd.org)
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*
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* Copyright (c) 2018 Panasas
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* Copyright (c) 2018-2023 Panasas
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -90,6 +90,8 @@
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#define SPD_OFFSET_DDR3_SDRAM_WIDTH 7
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#define SPD_OFFSET_DDR3_BUS_WIDTH 8
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#define SPD_OFFSET_DDR3_TSOD_PRESENT 32
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#define SPD_OFFSET_DDR3_MOD_MFG_YEAR 120
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#define SPD_OFFSET_DDR3_MOD_MFG_WEEK 121
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#define SPD_OFFSET_DDR3_SERIAL 122
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#define SPD_LEN_DDR3_SERIAL 4
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#define SPD_OFFSET_DDR3_PARTNUM 128
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@ -100,6 +102,8 @@
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#define SPD_OFFSET_DDR4_SDRAM_WIDTH 12
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#define SPD_OFFSET_DDR4_BUS_WIDTH 13
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#define SPD_OFFSET_DDR4_TSOD_PRESENT 14
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#define SPD_OFFSET_DDR4_MOD_MFG_YEAR 323
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#define SPD_OFFSET_DDR4_MOD_MFG_WEEK 324
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#define SPD_OFFSET_DDR4_SERIAL 325
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#define SPD_LEN_DDR4_SERIAL 4
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#define SPD_OFFSET_DDR4_PARTNUM 329
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