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Cleanup the defines used for various chipsets.

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Add new nVidia controllers.
This commit is contained in:
Søren Schmidt 2004-09-03 07:37:53 +00:00
parent f52501ba8c
commit df6a77ddcb
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=134687
2 changed files with 31 additions and 19 deletions
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25
sys/dev/ata/ata-chipset.c
View File

@ -493,7 +493,7 @@ ata_amd_chipinit(device_t dev)
if (ata_setup_interrupt(dev))
return ENXIO;
/* set prefetch, postwrite */
/* disable/set prefetch, postwrite */
if (ctlr->chip->cfg2 & AMDBUG)
pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) & 0x0f, 1);
else
@ -828,11 +828,11 @@ ata_intel_ident(device_t dev)
{ ATA_I82801DB, 0, 0, 0x00, ATA_UDMA5, "Intel ICH4" },
{ ATA_I82801DB_1, 0, 0, 0x00, ATA_UDMA5, "Intel ICH4" },
{ ATA_I82801EB, 0, 0, 0x00, ATA_UDMA5, "Intel ICH5" },
{ ATA_I82801EB_1, 0, 0, 0x00, ATA_SA150, "Intel ICH5" },
{ ATA_I82801EB_2, 0, 0, 0x00, ATA_SA150, "Intel ICH5" },
{ ATA_I82801EB_S1,0, 0, 0x00, ATA_SA150, "Intel ICH5" },
{ ATA_I82801EB_R1,0, 0, 0x00, ATA_SA150, "Intel ICH5" },
{ ATA_I6300ESB, 0, 0, 0x00, ATA_UDMA5, "Intel 6300ESB" },
{ ATA_I6300ESB_1, 0, 0, 0x00, ATA_SA150, "Intel 6300ESB" },
{ ATA_I6300ESB_2, 0, 0, 0x00, ATA_SA150, "Intel 6300ESB" },
{ ATA_I6300ESB_S1,0, 0, 0x00, ATA_SA150, "Intel 6300ESB" },
{ ATA_I6300ESB_R1,0, 0, 0x00, ATA_SA150, "Intel 6300ESB" },
{ 0, 0, 0, 0, 0, 0}};
char buffer[64];
@ -1105,9 +1105,13 @@ ata_nvidia_ident(device_t dev)
struct ata_pci_controller *ctlr = device_get_softc(dev);
struct ata_chip_id *idx;
static struct ata_chip_id ids[] =
{{ ATA_NFORCE1, 0, AMDNVIDIA, NVIDIA|AMDBUG, ATA_UDMA5, "nVidia nForce" },
{ ATA_NFORCE2, 0, AMDNVIDIA, NVIDIA|AMDBUG, ATA_UDMA6, "nVidia nForce2" },
{{ ATA_NFORCE1, 0, AMDNVIDIA, NVIDIA, ATA_UDMA5, "nVidia nForce" },
{ ATA_NFORCE2, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nVidia nForce2" },
{ ATA_NFORCE2_MCP, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nVidia MCP" },
{ ATA_NFORCE3, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nVidia nForce3" },
{ ATA_NFORCE3_PRO, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nVidia nForce3 Pro" },
{ ATA_NFORCE3_MCP, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nVidia nForce3 MCP" },
{ ATA_NFORCE4, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nVidia nForce4" },
{ 0, 0, 0, 0, 0, 0}};
char buffer[64];
@ -1129,11 +1133,8 @@ ata_nvidia_chipinit(device_t dev)
if (ata_setup_interrupt(dev))
return ENXIO;
/* set prefetch, postwrite */
if (ctlr->chip->cfg2 & AMDBUG)
/* disable prefetch, postwrite */
pci_write_config(dev, 0x51, pci_read_config(dev, 0x51, 1) & 0x0f, 1);
else
pci_write_config(dev, 0x51, pci_read_config(dev, 0x51, 1) | 0xf0, 1);
ctlr->setmode = ata_via_family_setmode;
return 0;
@ -2373,7 +2374,7 @@ ata_sis_ident(device_t dev)
struct ata_pci_controller *ctlr = device_get_softc(dev);
struct ata_chip_id *idx;
static struct ata_chip_id ids[] =
{{ ATA_SIS964_1,0x00, SISSATA, 0, ATA_SA150, "SiS 964" }, /* south */
{{ ATA_SIS964_S,0x00, SISSATA, 0, ATA_SA150, "SiS 964" }, /* south */
{ ATA_SIS964, 0x00, SIS133NEW, 0, ATA_UDMA6, "SiS 964" }, /* south */
{ ATA_SIS963, 0x00, SIS133NEW, 0, ATA_UDMA6, "SiS 963" }, /* south */
{ ATA_SIS962, 0x00, SIS133NEW, 0, ATA_UDMA6, "SiS 962" }, /* south */

21
sys/dev/ata/ata-pci.h
View File

@ -117,11 +117,11 @@ struct ata_pci_controller {
#define ATA_I82801DB 0x24cb8086
#define ATA_I82801DB_1 0x24ca8086
#define ATA_I82801EB 0x24db8086
#define ATA_I82801EB_1 0x24d18086
#define ATA_I82801EB_2 0x24df8086
#define ATA_I82801EB_S1 0x24d18086
#define ATA_I82801EB_R1 0x24df8086
#define ATA_I6300ESB 0x25a28086
#define ATA_I6300ESB_1 0x25a38086
#define ATA_I6300ESB_2 0x25b08086
#define ATA_I6300ESB_S1 0x25a38086
#define ATA_I6300ESB_R1 0x25b08086
#define ATA_NATIONAL_ID 0x100b
#define ATA_SC1100 0x0502100b
@ -129,7 +129,18 @@ struct ata_pci_controller {
#define ATA_NVIDIA_ID 0x10de
#define ATA_NFORCE1 0x01bc10de
#define ATA_NFORCE2 0x006510de
#define ATA_NFORCE2_MCP 0x008510de
#define ATA_NFORCE3 0x00d510de
#define ATA_NFORCE3_PRO 0x00e510de
#define ATA_NFORCE3_PRO_S1 0x00e310de
#define ATA_NFORCE3_PRO_S2 0x00ee10de
#define ATA_NFORCE3_MCP 0x003510de
#define ATA_NFORCE3_MCP_S1 0x003610de
#define ATA_NFORCE3_MCP_S2 0x003e10de
#define ATA_NFORCE4 0x005310de
#define ATA_NFORCE4_S1 0x005410de
#define ATA_NFORCE4_S2 0x005510de
#define ATA_PROMISE_ID 0x105a
#define ATA_PDC20246 0x4d33105a
@ -220,7 +231,7 @@ struct ata_pci_controller {
#define ATA_SIS962 0x09621039
#define ATA_SIS963 0x09631039
#define ATA_SIS964 0x09641039
#define ATA_SIS964_1 0x01801039
#define ATA_SIS964_S 0x01801039
#define ATA_VIA_ID 0x1106
#define ATA_VIA82C571 0x05711106