Use PCIR_BAR(x) instead of PCIR_MAPS.

Glanced over by:	imp, gibbs
Tested by:		i386 LINT
This commit is contained in:
John Baldwin 2003-09-02 17:30:40 +00:00
parent 56802c46e2
commit e27951b29c
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=119690
64 changed files with 149 additions and 154 deletions

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@ -78,8 +78,8 @@ __FBSDID("$FreeBSD$");
#include <dev/advansys/advansys.h>
#define PCI_BASEADR0 PCIR_MAPS /* I/O Address */
#define PCI_BASEADR1 PCIR_MAPS + 4 /* Mem I/O Address */
#define PCI_BASEADR0 PCIR_BAR(0) /* I/O Address */
#define PCI_BASEADR1 PCIR_BAR(1) /* Mem I/O Address */
#define PCI_DEVICE_ID_ADVANSYS_1200A 0x110010CD
#define PCI_DEVICE_ID_ADVANSYS_1200B 0x120010CD

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@ -60,8 +60,8 @@ __FBSDID("$FreeBSD$");
#include <dev/advansys/adwlib.h>
#include <dev/advansys/adwmcode.h>
#define ADW_PCI_IOBASE PCIR_MAPS /* I/O Address */
#define ADW_PCI_MEMBASE PCIR_MAPS + 4 /* Mem I/O Address */
#define ADW_PCI_IOBASE PCIR_BAR(0) /* I/O Address */
#define ADW_PCI_MEMBASE PCIR_BAR(1) /* Mem I/O Address */
#define PCI_ID_ADVANSYS_3550 0x230010CD00000000ull
#define PCI_ID_ADVANSYS_38C0800_REV1 0x250010CD00000000ull

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@ -36,8 +36,8 @@ __FBSDID("$FreeBSD$");
#include <dev/aic7xxx/aic7xxx_osm.h>
#define AHC_PCI_IOADDR PCIR_MAPS /* I/O Address */
#define AHC_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
#define AHC_PCI_IOADDR PCIR_BAR(0) /* I/O Address */
#define AHC_PCI_MEMADDR PCIR_BAR(1) /* Mem I/O Address */
static int ahc_pci_probe(device_t dev);
static int ahc_pci_attach(device_t dev);

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@ -36,9 +36,9 @@ __FBSDID("$FreeBSD$");
#include <dev/aic7xxx/aic79xx_osm.h>
#define AHD_PCI_IOADDR0 PCIR_MAPS /* Primary I/O BAR */
#define AHD_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
#define AHD_PCI_IOADDR1 (PCIR_MAPS + 12)/* Secondary I/O BAR */
#define AHD_PCI_IOADDR0 PCIR_BAR(0) /* Primary I/O BAR */
#define AHD_PCI_MEMADDR PCIR_BAR(1) /* Mem I/O Address */
#define AHD_PCI_IOADDR1 PCIR_BAR(3) /* Secondary I/O BAR */
static int ahd_pci_probe(device_t dev);
static int ahd_pci_attach(device_t dev);

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@ -1298,9 +1298,9 @@ struct ahd_devinfo {
};
/****************************** PCI Structures ********************************/
#define AHD_PCI_IOADDR0 PCIR_MAPS /* I/O BAR*/
#define AHD_PCI_MEMADDR (PCIR_MAPS + 4) /* Memory BAR */
#define AHD_PCI_IOADDR1 (PCIR_MAPS + 12)/* Second I/O BAR */
#define AHD_PCI_IOADDR0 PCIR_BAR(0) /* I/O BAR*/
#define AHD_PCI_MEMADDR PCIR_BAR(1) /* Memory BAR */
#define AHD_PCI_IOADDR1 PCIR_BAR(3) /* Second I/O BAR */
typedef int (ahd_device_setup_t)(struct ahd_softc *);

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@ -55,8 +55,8 @@ __FBSDID("$FreeBSD$");
#include <dev/aic7xxx/aic7xxx_93cx6.h>
#endif
#define AHC_PCI_IOADDR PCIR_MAPS /* I/O Address */
#define AHC_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
#define AHC_PCI_IOADDR PCIR_BAR(0) /* I/O Address */
#define AHC_PCI_MEMADDR PCIR_BAR(1) /* Mem I/O Address */
static __inline uint64_t
ahc_compose_id(u_int device, u_int vendor, u_int subdevice, u_int subvendor)

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@ -210,7 +210,7 @@ amr_pci_attach(device_t dev)
/*
* Allocate the PCI register window.
*/
rid = PCIR_MAPS;
rid = PCIR_BAR(0);
rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT;
sc->amr_reg = bus_alloc_resource(dev, rtype, &rid, 0, ~0, 1, RF_ACTIVE);
if (sc->amr_reg == NULL) {
@ -468,7 +468,7 @@ amr_pci_free(struct amr_softc *sc)
if (sc->amr_reg != NULL)
bus_release_resource(sc->amr_dev,
AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT,
PCIR_MAPS, sc->amr_reg);
PCIR_BAR(0), sc->amr_reg);
}
/********************************************************************************

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@ -156,7 +156,7 @@ an_attach_pci(dev)
if (pci_get_vendor(dev) == AIRONET_VENDORID &&
pci_get_device(dev) == AIRONET_DEVICEID_MPI350) {
sc->mpi350 = 1;
sc->port_rid = PCIR_MAPS;
sc->port_rid = PCIR_BAR(0);
} else {
/*
* Map control/status registers.
@ -186,7 +186,7 @@ an_attach_pci(dev)
/* Allocate memory for MPI350 */
if (sc->mpi350) {
/* Allocate memory */
sc->mem_rid = PCIR_MAPS + 4;
sc->mem_rid = PCIR_BAR(1);
error = an_alloc_memory(dev, sc->mem_rid, 1);
if (error) {
printf("an%d: couldn't map memory\n", unit);
@ -196,7 +196,7 @@ an_attach_pci(dev)
sc->an_mem_bhandle = rman_get_bushandle(sc->mem_res);
/* Allocate aux. memory */
sc->mem_aux_rid = PCIR_MAPS + 8;
sc->mem_aux_rid = PCIR_BAR(2);
error = an_alloc_aux_memory(dev, sc->mem_aux_rid,
AN_AUX_MEM_SIZE);
if (error) {

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@ -2549,10 +2549,8 @@ asr_pci_map_mem (
/*
* I2O specification says we must find first *memory* mapped BAR
*/
for (rid = PCIR_MAPS;
rid < (PCIR_MAPS + 4 * sizeof(u_int32_t));
rid += sizeof(u_int32_t)) {
p = pci_read_config(tag, rid, sizeof(p));
for (rid = 0; rid < 4; rid++) {
p = pci_read_config(tag, PCIR_BAR(rid), sizeof(p));
if ((p & 1) == 0) {
break;
}
@ -2560,9 +2558,10 @@ asr_pci_map_mem (
/*
* Give up?
*/
if (rid >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) {
rid = PCIR_MAPS;
if (rid >= 4) {
rid = 0;
}
rid = PCIR_BAR(rid);
p = pci_read_config(tag, rid, sizeof(p));
pci_write_config(tag, rid, -1, sizeof(p));
l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15);
@ -2599,8 +2598,7 @@ asr_pci_map_mem (
}
sc->ha_Virt = (i2oRegs_t *) rman_get_virtual(sc->ha_mem_res);
if (s == 0xA5111044) { /* Split BAR Raptor Daptor */
if ((rid += sizeof(u_int32_t))
>= (PCIR_MAPS + 4 * sizeof(u_int32_t))) {
if ((rid += sizeof(u_int32_t)) >= PCIR_BAR(4)) {
return (0);
}
p = pci_read_config(tag, rid, sizeof(p));

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@ -343,7 +343,7 @@ bktr_attach( device_t dev )
/*
* Map control/status registers.
*/
bktr->mem_rid = PCIR_MAPS;
bktr->mem_rid = PCIR_BAR(0);
bktr->res_mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &bktr->mem_rid,
0, ~0, 1, RF_ACTIVE);

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@ -48,8 +48,8 @@ __FBSDID("$FreeBSD$");
#include <dev/buslogic/btreg.h>
#define BT_PCI_IOADDR PCIR_MAPS
#define BT_PCI_MEMADDR PCIR_MAPS + 4
#define BT_PCI_IOADDR PCIR_BAR(0)
#define BT_PCI_MEMADDR PCIR_BAR(1)
#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040104Bul
#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140104Bul

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@ -1044,7 +1044,7 @@ cardbus_pickup_maps(device_t cbdev, device_t child)
* XXX: should we do this or use quirks?
*/
for (reg = 0; reg < dinfo->pci.cfg.nummaps; reg++) {
cardbus_add_map(cbdev, child, PCIR_MAPS + reg * 4);
cardbus_add_map(cbdev, child, PCIR_BAR(reg));
}
for (q = &cardbus_quirks[0]; q->devid; q++) {

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@ -3773,7 +3773,7 @@ dc_suspend(device_t dev)
dc_stop(sc);
for (i = 0; i < 5; i++)
sc->saved_maps[i] = pci_read_config(dev, PCIR_MAPS + i * 4, 4);
sc->saved_maps[i] = pci_read_config(dev, PCIR_BAR(i), 4);
sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4);
sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1);
sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
@ -3806,7 +3806,7 @@ dc_resume(device_t dev)
#endif
/* better way to do this? */
for (i = 0; i < 5; i++)
pci_write_config(dev, PCIR_MAPS + i * 4, sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BAR(i), sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4);
pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1);
pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1);

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@ -54,8 +54,8 @@ __FBSDID("$FreeBSD$");
#define DPT_VENDOR_ID 0x1044
#define DPT_DEVICE_ID 0xa400
#define DPT_PCI_IOADDR PCIR_MAPS /* I/O Address */
#define DPT_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
#define DPT_PCI_IOADDR PCIR_BAR(0) /* I/O Address */
#define DPT_PCI_MEMADDR PCIR_BAR(1) /* Mem I/O Address */
#define ISA_PRIMARY_WD_ADDRESS 0x1f8

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@ -84,7 +84,7 @@ ed_pci_attach(device_t dev)
int flags = 0;
int error;
error = ed_probe_Novell(dev, PCIR_MAPS, flags);
error = ed_probe_Novell(dev, PCIR_BAR(0), flags);
if (error)
return (error);

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@ -994,7 +994,7 @@ fxp_suspend(device_t dev)
fxp_stop(sc);
for (i = 0; i < 5; i++)
sc->saved_maps[i] = pci_read_config(dev, PCIR_MAPS + i * 4, 4);
sc->saved_maps[i] = pci_read_config(dev, PCIR_BAR(i), 4);
sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4);
sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1);
sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
@ -1027,7 +1027,7 @@ fxp_resume(device_t dev)
#endif
/* better way to do this? */
for (i = 0; i < 5; i++)
pci_write_config(dev, PCIR_MAPS + i * 4, sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BAR(i), sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4);
pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1);
pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1);

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@ -1693,7 +1693,7 @@ hatm_attach(device_t dev)
error = ENXIO;
goto failed;
}
sc->memid = PCIR_MAPS;
sc->memid = PCIR_BAR(0);
sc->memres = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->memid,
0, ~0, 1, RF_ACTIVE);
if (sc->memres == NULL) {

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@ -157,7 +157,7 @@ hea_pci_attach (dev)
pci_enable_busmaster(dev);
sc->mem_rid = PCIR_MAPS;
sc->mem_rid = PCIR_BAR(0);
sc->mem_type = SYS_RES_MEMORY;
sc->irq_rid = 0;

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@ -588,7 +588,7 @@ hifn_suspend(device_t dev)
hifn_stop(sc);
for (i = 0; i < 5; i++)
sc->saved_maps[i] = pci_read_config(dev, PCIR_MAPS + i * 4, 4);
sc->saved_maps[i] = pci_read_config(dev, PCIR_BAR(i), 4);
sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4);
sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1);
sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
@ -613,7 +613,7 @@ hifn_resume(device_t dev)
/* better way to do this? */
for (i = 0; i < 5; i++)
pci_write_config(dev, PCIR_MAPS + i * 4, sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BAR(i), sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4);
pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1);
pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1);

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@ -49,8 +49,8 @@
* Some PCI configuration space offset defines. The names were made
* identical to the names used by the Linux kernel.
*/
#define HIFN_BAR0 (PCIR_MAPS+0x0) /* PUC register map */
#define HIFN_BAR1 (PCIR_MAPS+0x4) /* DMA register map */
#define HIFN_BAR0 PCIR_BAR(0) /* PUC register map */
#define HIFN_BAR1 PCIR_BAR(1) /* DMA register map */
#define HIFN_TRDY_TIMEOUT 0x40
#define HIFN_RETRY_TIMEOUT 0x41

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@ -52,7 +52,7 @@ __FBSDID("$FreeBSD$");
#define IDA_PCI_MAX_DMA_ADDR 0xFFFFFFFF
#define IDA_PCI_MAX_DMA_COUNT 0xFFFFFFFF
#define IDA_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
#define IDA_PCI_MEMADDR PCIR_BAR(1) /* Mem I/O Address */
#define IDA_DEVICEID_SMART 0xAE100E11
#define IDA_DEVICEID_DEC_SMART 0x00461011
@ -254,7 +254,7 @@ ida_pci_attach(device_t dev)
ida->regs_res_type = SYS_RES_MEMORY;
ida->regs_res_id = IDA_PCI_MEMADDR;
if (id == IDA_DEVICEID_DEC_SMART)
ida->regs_res_id = PCIR_MAPS;
ida->regs_res_id = PCIR_BAR(0);
ida->regs = bus_alloc_resource(dev, ida->regs_res_type,
&ida->regs_res_id, 0, ~0, 1, RF_ACTIVE);

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@ -66,7 +66,7 @@ __FBSDID("$FreeBSD$");
#include <dev/iir/iir.h>
/* Mapping registers for various areas */
#define PCI_DPMEM PCIR_MAPS
#define PCI_DPMEM PCIR_BAR(0)
/* Product numbers for Fibre-Channel are greater than or equal to 0x200 */
#define GDT_PCI_PRODUCT_FC 0x200

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@ -87,15 +87,15 @@ static int ips_pci_attach(device_t dev)
if(command & PCIM_CMD_MEMEN){
PRINTF(10, "trying MEMIO\n");
if(pci_get_device(dev) == IPS_MORPHEUS_DEVICE_ID)
sc->rid = PCIR_MAPS;
sc->rid = PCIR_BAR(0);
else
sc->rid = PCIR_MAPS + 4;
sc->rid = PCIR_BAR(1);
sc->iotype = SYS_RES_MEMORY;
sc->iores = bus_alloc_resource(dev, sc->iotype, &sc->rid, 0, ~0, 1, RF_ACTIVE);
}
if(!sc->iores && command & PCIM_CMD_PORTEN){
PRINTF(10, "trying PORTIO\n");
sc->rid = PCIR_MAPS;
sc->rid = PCIR_BAR(0);
sc->iotype = SYS_RES_IOPORT;
sc->iores = bus_alloc_resource(dev, sc->iotype, &sc->rid, 0, ~0, 1, RF_ACTIVE);
}

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@ -102,7 +102,7 @@ lnc_pci_attach(device_t dev)
command |= PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, command, 4);
rid = PCIR_MAPS;
rid = PCIR_BAR(0);
sc->portres = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1,
RF_ACTIVE);
@ -195,7 +195,7 @@ lnc_pci_detach(device_t dev)
lnc_stop(sc);
bus_teardown_intr(dev, sc->irqres, sc->intrhand);
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irqres);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, sc->portres);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->portres);
bus_dmamap_unload(sc->dmat, sc->dmamap);
bus_dmamem_free(sc->dmat, sc->recv_ring, sc->dmamap);

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@ -368,7 +368,7 @@ mly_pci_attach(struct mly_softc *sc)
/*
* Allocate the PCI register window.
*/
sc->mly_regs_rid = PCIR_MAPS; /* first base address register */
sc->mly_regs_rid = PCIR_BAR(0); /* first base address register */
if ((sc->mly_regs_resource = bus_alloc_resource(sc->mly_dev, SYS_RES_MEMORY, &sc->mly_regs_rid,
0, ~0, 1, RF_ACTIVE)) == NULL) {
mly_printf(sc, "can't allocate register window\n");

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@ -653,11 +653,11 @@ mpt_read_config_regs(mpt_softc_t *mpt)
mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
mpt->pci_cfg.LatencyTimer_LineSize =
pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_MAPS, 4);
mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0x4, 4);
mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x8, 4);
mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0xC, 4);
mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x10, 4);
mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
@ -680,11 +680,11 @@ mpt_set_config_regs(mpt_softc_t *mpt)
if (mpt->verbose) {
MPT_CHECK(Command, PCIR_COMMAND, 2);
MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
MPT_CHECK(IO_BAR, PCIR_MAPS, 4);
MPT_CHECK(Mem0_BAR[0], PCIR_MAPS+0x4, 4);
MPT_CHECK(Mem0_BAR[1], PCIR_MAPS+0x8, 4);
MPT_CHECK(Mem1_BAR[0], PCIR_MAPS+0xC, 4);
MPT_CHECK(Mem1_BAR[1], PCIR_MAPS+0x10, 4);
MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
MPT_CHECK(IntLine, PCIR_INTLINE, 1);
MPT_CHECK(PMCSR, 0x44, 4);
@ -694,11 +694,11 @@ mpt_set_config_regs(mpt_softc_t *mpt)
pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
pci_write_config(mpt->dev, PCIR_CACHELNSZ,
mpt->pci_cfg.LatencyTimer_LineSize, 2);
pci_write_config(mpt->dev, PCIR_MAPS, mpt->pci_cfg.IO_BAR, 4);
pci_write_config(mpt->dev, PCIR_MAPS+0x4, mpt->pci_cfg.Mem0_BAR[0], 4);
pci_write_config(mpt->dev, PCIR_MAPS+0x8, mpt->pci_cfg.Mem0_BAR[1], 4);
pci_write_config(mpt->dev, PCIR_MAPS+0xC, mpt->pci_cfg.Mem1_BAR[0], 4);
pci_write_config(mpt->dev, PCIR_MAPS+0x10, mpt->pci_cfg.Mem1_BAR[1], 4);
pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);

View File

@ -1467,7 +1467,7 @@ musycc_attach(device_t self)
}
csc->f[f] = self;
device_set_softc(self, csc);
rid = PCIR_MAPS;
rid = PCIR_BAR(0);
res = bus_alloc_resource(self, SYS_RES_MEMORY, &rid,
0, ~0, 1, RF_ACTIVE);
if (res == NULL) {

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@ -790,7 +790,7 @@ pci_add_resources(device_t pcib, device_t bus, device_t dev)
s = cfg->slot;
f = cfg->func;
for (i = 0; i < cfg->nummaps;) {
i += pci_add_map(pcib, b, s, f, PCIR_MAPS + i*4, rl);
i += pci_add_map(pcib, b, s, f, PCIR_BAR(i), rl);
}
for (q = &pci_quirks[0]; q->devid; q++) {

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@ -93,7 +93,7 @@ sbni_pci_probe(device_t dev)
} else
device_set_desc(dev, "Granch SBNI12/PCI adapter");
sc->io_rid = PCIR_MAPS;
sc->io_rid = PCIR_BAR(0);
sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->io_rid,
0ul, ~0ul, ports, RF_ACTIVE);
if (!sc->io_res) {

View File

@ -227,7 +227,7 @@ sbsh_attach(device_t dev)
sc = device_get_softc(dev);
unit = device_get_unit(dev);
rid = PCIR_MAPS + 4;
rid = PCIR_BAR(1);
sc->mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
0, ~0, 4096, RF_ACTIVE);
@ -244,7 +244,7 @@ sbsh_attach(device_t dev)
if (sc->irq_res == NULL) {
printf("sbsh%d: couldn't map interrupt\n", unit);
bus_release_resource(dev, SYS_RES_MEMORY,
PCIR_MAPS + 4, sc->mem_res);
PCIR_BAR(1), sc->mem_res);
error = ENXIO;
goto fail;
}
@ -257,7 +257,7 @@ sbsh_attach(device_t dev)
if (error) {
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
bus_release_resource(dev, SYS_RES_MEMORY,
PCIR_MAPS + 4, sc->mem_res);
PCIR_BAR(1), sc->mem_res);
printf("sbsh%d: couldn't set up irq\n", unit);
goto fail;
}
@ -304,7 +304,7 @@ sbsh_detach(device_t dev)
bus_teardown_intr(dev, sc->irq_res, sc->intr_hand);
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
bus_release_resource(dev, SYS_RES_MEMORY, PCIR_MAPS + 4, sc->mem_res);
bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(1), sc->mem_res);
splx(s);
return (0);

View File

@ -713,7 +713,7 @@ als_resource_free(device_t dev, struct sc_info *sc)
static int
als_resource_grab(device_t dev, struct sc_info *sc)
{
sc->regid = PCIR_MAPS;
sc->regid = PCIR_BAR(0);
sc->reg = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->regid, 0, ~0,
ALS_CONFIG_SPACE_BYTES, RF_ACTIVE);
if (sc->reg == 0) {

View File

@ -499,14 +499,14 @@ au88x0_pci_attach(device_t dev)
config = pci_read_config(dev, PCIR_COMMAND, 2);
if (config & PCIM_CMD_MEMEN) {
/* try memory-mapped I/O */
aui->aui_regid = PCIR_MAPS;
aui->aui_regid = PCIR_BAR(0);
aui->aui_regtype = SYS_RES_MEMORY;
aui->aui_reg = bus_alloc_resource(dev, aui->aui_regtype,
&aui->aui_regid, 0, ~0, 1, RF_ACTIVE);
}
if (aui->aui_reg == NULL && (config & PCIM_CMD_PORTEN)) {
/* fall back on port I/O */
aui->aui_regid = PCIR_MAPS;
aui->aui_regid = PCIR_BAR(0);
aui->aui_regtype = SYS_RES_IOPORT;
aui->aui_reg = bus_alloc_resource(dev, aui->aui_regtype,
&aui->aui_regid, 0, ~0, 1, RF_ACTIVE);

View File

@ -582,7 +582,7 @@ au_pci_attach(device_t dev)
printf("at 0x%x...", config_id->map[i].base);
}
#endif
regid[j] = PCIR_MAPS + i*4;
regid[j] = PCIR_BAR(i);
type[j] = SYS_RES_MEMORY;
reg[j] = bus_alloc_resource(dev, type[j], &regid[j],
0, ~0, 1, RF_ACTIVE);

View File

@ -849,7 +849,7 @@ cmi_attach(device_t dev)
data = pci_read_config(dev, PCIR_COMMAND, 2);
sc->dev = dev;
sc->regid = PCIR_MAPS;
sc->regid = PCIR_BAR(0);
sc->reg = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->regid,
0, BUS_SPACE_UNRESTRICTED, 1, RF_ACTIVE);
if (!sc->reg) {

View File

@ -785,7 +785,7 @@ cs4281_pci_attach(device_t dev)
}
#endif
sc->regid = PCIR_MAPS;
sc->regid = PCIR_BAR(0);
sc->regtype = SYS_RES_MEMORY;
sc->reg = bus_alloc_resource(dev, sc->regtype, &sc->regid,
0, ~0, CS4281PCI_BA0_SIZE, RF_ACTIVE);
@ -801,7 +801,7 @@ cs4281_pci_attach(device_t dev)
sc->st = rman_get_bustag(sc->reg);
sc->sh = rman_get_bushandle(sc->reg);
sc->memid = PCIR_MAPS + 4;
sc->memid = PCIR_BAR(1);
sc->mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->memid, 0,
~0, CS4281PCI_BA1_SIZE, RF_ACTIVE);
if (sc->mem == NULL) {

View File

@ -258,11 +258,11 @@ csa_attach(device_t dev)
scp->card = csa_findsubcard(dev);
scp->binfo.card = scp->card;
printf("csa: card is %s\n", scp->card->name);
resp->io_rid = PCIR_MAPS;
resp->io_rid = PCIR_BAR(0);
resp->io = bus_alloc_resource(dev, SYS_RES_MEMORY, &resp->io_rid, 0, ~0, 1, RF_ACTIVE);
if (resp->io == NULL)
return (ENXIO);
resp->mem_rid = PCIR_MAPS + 4;
resp->mem_rid = PCIR_BAR(1);
resp->mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &resp->mem_rid, 0, ~0, 1, RF_ACTIVE);
if (resp->mem == NULL)
goto err_io;
@ -392,10 +392,10 @@ csa_alloc_resource(device_t bus, device_t child, int type, int *rid,
break;
case SYS_RES_MEMORY:
switch (*rid) {
case PCIR_MAPS:
case PCIR_BAR(0):
res = resp->io;
break;
case PCIR_MAPS + 4:
case PCIR_BAR(1):
res = resp->mem;
break;
default:

View File

@ -165,8 +165,8 @@ csamidi_probe(device_t dev)
scp = device_get_softc(dev);
bzero(scp, sizeof(*scp));
scp->io_rid = PCIR_MAPS;
scp->mem_rid = PCIR_MAPS + 4;
scp->io_rid = PCIR_BAR(0);
scp->mem_rid = PCIR_BAR(1);
scp->irq_rid = 0;
device_set_desc(dev, s);

View File

@ -762,8 +762,8 @@ pcmcsa_attach(device_t dev)
/* Allocate the resources. */
resp = &csa->res;
resp->io_rid = PCIR_MAPS;
resp->mem_rid = PCIR_MAPS + 4;
resp->io_rid = PCIR_BAR(0);
resp->mem_rid = PCIR_BAR(1);
resp->irq_rid = 0;
if (csa_allocres(csa, dev)) {
csa_releaseres(csa, dev);

View File

@ -953,7 +953,7 @@ ds_pci_attach(device_t dev)
pci_write_config(dev, PCIR_COMMAND, data, 2);
data = pci_read_config(dev, PCIR_COMMAND, 2);
sc->regid = PCIR_MAPS;
sc->regid = PCIR_BAR(0);
sc->reg = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regid,
0, ~0, 1, RF_ACTIVE);
if (!sc->reg) {

View File

@ -1478,7 +1478,7 @@ emu_pci_attach(device_t dev)
pci_write_config(dev, PCIR_COMMAND, data, 2);
data = pci_read_config(dev, PCIR_COMMAND, 2);
i = PCIR_MAPS;
i = PCIR_BAR(0);
sc->reg = bus_alloc_resource(dev, SYS_RES_IOPORT, &i, 0, ~0, 1, RF_ACTIVE);
if (sc->reg == NULL) {
device_printf(dev, "unable to map register space\n");
@ -1531,7 +1531,7 @@ emu_pci_attach(device_t dev)
bad:
if (codec) ac97_destroy(codec);
if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, sc->reg);
if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih);
if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat);
@ -1554,7 +1554,7 @@ emu_pci_detach(device_t dev)
/* shutdown chip */
emu_uninit(sc);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, sc->reg);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
bus_teardown_intr(dev, sc->irq, sc->ih);
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
bus_dma_tag_destroy(sc->parent_dmat);

View File

@ -864,7 +864,7 @@ es_pci_attach(device_t dev)
}
}
if (mapped == 0 && (data & PCIM_CMD_PORTEN)) {
es->regid = PCIR_MAPS;
es->regid = PCIR_BAR(0);
es->regtype = SYS_RES_IOPORT;
es->reg = bus_alloc_resource(dev, es->regtype, &es->regid,
0, ~0, 1, RF_ACTIVE);

View File

@ -587,7 +587,7 @@ fm801_pci_attach(device_t dev)
data = pci_read_config(dev, PCIR_COMMAND, 2);
for (i = 0; (mapped == 0) && (i < PCI_MAXMAPS_0); i++) {
fm801->regid = PCIR_MAPS + i*4;
fm801->regid = PCIR_BAR(i);
fm801->regtype = SYS_RES_MEMORY;
fm801->reg = bus_alloc_resource(dev, fm801->regtype, &fm801->regid,
0, ~0, 1, RF_ACTIVE);
@ -712,7 +712,7 @@ fm801_pci_probe( device_t dev )
pci_write_config(dev, PCIR_COMMAND, data, 2);
data = pci_read_config(dev, PCIR_COMMAND, 2);
regid = PCIR_MAPS;
regid = PCIR_BAR(0);
regtype = SYS_RES_IOPORT;
reg = bus_alloc_resource(dev, regtype, &regid, 0, ~0, 1,
RF_ACTIVE);
@ -760,7 +760,7 @@ fm801_alloc_resource(device_t bus, device_t child, int type, int *rid,
fm801 = pcm_getdevinfo(bus);
if (type == SYS_RES_IOPORT && *rid == PCIR_MAPS)
if (type == SYS_RES_IOPORT && *rid == PCIR_BAR(0))
return (fm801->reg);
return (NULL);

View File

@ -950,7 +950,7 @@ agg_attach(device_t dev)
struct agg_info *ess = NULL;
u_int32_t data;
int mapped = 0;
int regid = PCIR_MAPS;
int regid = PCIR_BAR(0);
struct resource *reg = NULL;
struct ac97_info *codec = NULL;
int irqid = 0;

View File

@ -1109,7 +1109,7 @@ m3_pci_attach(device_t dev)
data |= (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
pci_write_config(dev, PCIR_COMMAND, data, 2);
sc->regid = PCIR_MAPS;
sc->regid = PCIR_BAR(0);
sc->regtype = SYS_RES_MEMORY;
sc->reg = bus_alloc_resource(dev, sc->regtype, &sc->regid,
0, ~0, 1, RF_ACTIVE);

View File

@ -608,7 +608,7 @@ nm_pci_probe(device_t dev)
PCIM_CMD_PORTEN | PCIM_CMD_MEMEN |
PCIM_CMD_BUSMASTEREN, 2);
sc->regid = PCIR_MAPS + 4;
sc->regid = PCIR_BAR(1);
sc->reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
&sc->regid, 0, ~0, 1,
RF_ACTIVE);
@ -675,10 +675,10 @@ nm_pci_attach(device_t dev)
pci_write_config(dev, PCIR_COMMAND, data, 2);
data = pci_read_config(dev, PCIR_COMMAND, 2);
sc->bufid = PCIR_MAPS;
sc->bufid = PCIR_BAR(0);
sc->buf = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->bufid,
0, ~0, 1, RF_ACTIVE);
sc->regid = PCIR_MAPS + 4;
sc->regid = PCIR_BAR(1);
sc->reg = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regid,
0, ~0, 1, RF_ACTIVE);

View File

@ -812,27 +812,27 @@ ess_release_resources(struct ess_info *sc, device_t dev)
sc->irq = 0;
}
if (sc->io) {
bus_release_resource(dev, SYS_RES_IOPORT, 0 * 4 + PCIR_MAPS, sc->io);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->io);
sc->io = 0;
}
if (sc->sb) {
bus_release_resource(dev, SYS_RES_IOPORT, 1 * 4 + PCIR_MAPS, sc->sb);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(1), sc->sb);
sc->sb = 0;
}
if (sc->vc) {
bus_release_resource(dev, SYS_RES_IOPORT, 2 * 4 + PCIR_MAPS, sc->vc);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(2), sc->vc);
sc->vc = 0;
}
if (sc->mpu) {
bus_release_resource(dev, SYS_RES_IOPORT, 3 * 4 + PCIR_MAPS, sc->mpu);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(3), sc->mpu);
sc->mpu = 0;
}
if (sc->gp) {
bus_release_resource(dev, SYS_RES_IOPORT, 4 * 4 + PCIR_MAPS, sc->gp);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(4), sc->gp);
sc->gp = 0;
}
@ -849,19 +849,19 @@ ess_alloc_resources(struct ess_info *sc, device_t dev)
{
int rid;
rid = 0 * 4 + PCIR_MAPS;
rid = PCIR_BAR(0);
sc->io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
rid = 1 * 4 + PCIR_MAPS;
rid = PCIR_BAR(1);
sc->sb = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
rid = 2 * 4 + PCIR_MAPS;
rid = PCIR_BAR(2);
sc->vc = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
rid = 3 * 4 + PCIR_MAPS;
rid = PCIR_BAR(3);
sc->mpu = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
rid = 4 * 4 + PCIR_MAPS;
rid = PCIR_BAR(4);
sc->gp = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
rid = 0;

View File

@ -818,7 +818,7 @@ tr_pci_attach(device_t dev)
pci_write_config(dev, PCIR_COMMAND, data, 2);
data = pci_read_config(dev, PCIR_COMMAND, 2);
tr->regid = PCIR_MAPS;
tr->regid = PCIR_BAR(0);
tr->regtype = SYS_RES_IOPORT;
tr->reg = bus_alloc_resource(dev, tr->regtype, &tr->regid, 0, ~0, 1, RF_ACTIVE);
if (tr->reg) {

View File

@ -765,7 +765,7 @@ via_attach(device_t dev)
pci_set_powerstate(dev, PCI_POWERSTATE_D0);
pci_enable_busmaster(dev);
via->regid = PCIR_MAPS;
via->regid = PCIR_BAR(0);
via->reg = bus_alloc_resource(dev, SYS_RES_IOPORT, &via->regid, 0, ~0,
1, RF_ACTIVE);
if (!via->reg) {

View File

@ -506,7 +506,7 @@ via_attach(device_t dev)
DELAY(5000);
}
via->regid = PCIR_MAPS;
via->regid = PCIR_BAR(0);
via->reg = bus_alloc_resource(dev, SYS_RES_IOPORT, &via->regid, 0, ~0, 1, RF_ACTIVE);
if (!via->reg) {
device_printf(dev, "cannot allocate bus resource.");

View File

@ -93,7 +93,7 @@ stg_pci_attach(device_t dev)
struct stg_softc *sc = device_get_softc(dev);
int error;
sc->port_rid = PCIR_MAPS;
sc->port_rid = PCIR_BAR(0);
sc->irq_rid = 0;
error = stg_alloc_resource(dev);
if (error) {

View File

@ -1222,10 +1222,10 @@ struct sym_nvram {
* Misc.
*/
#define SYM_SNOOP_TIMEOUT (10000000)
#define SYM_PCI_IO PCIR_MAPS
#define SYM_PCI_MMIO (PCIR_MAPS + 4)
#define SYM_PCI_RAM (PCIR_MAPS + 8)
#define SYM_PCI_RAM64 (PCIR_MAPS + 12)
#define SYM_PCI_IO PCIR_BAR(0)
#define SYM_PCI_MMIO PCIR_BAR(1)
#define SYM_PCI_RAM PCIR_BAR(2)
#define SYM_PCI_RAM64 PCIR_BAR(3)
/*
* Back-pointer from the CAM CCB to our data structures.

View File

@ -158,7 +158,7 @@ tdfx_attach(device_t dev) {
u_long val;
/* rid value tells bus_alloc_resource where to find the addresses of ports or
* of memory ranges in the PCI config space*/
int rid = PCIR_MAPS;
int rid = PCIR_BAR(0);
/* Increment the card counter (for the ioctl code) */
tdfx_count++;

View File

@ -3395,7 +3395,7 @@ static PACB
trm_init(u_int16_t unit, device_t dev)
{
PACB pACB;
int rid = PCIR_MAPS, i = 0, j = 0;
int rid = PCIR_BAR(0), i = 0, j = 0;
u_int16_t adaptType = 0;
pACB = (PACB) device_get_softc(dev);
@ -3514,7 +3514,7 @@ trm_init(u_int16_t unit, device_t dev)
return (pACB);
bad:
if (pACB->iores)
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS,
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0),
pACB->iores);
if (pACB->sense_dmamap) {
bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
@ -3630,7 +3630,7 @@ trm_attach(device_t dev)
return (0);
bad:
if (pACB->iores)
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS,
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0),
pACB->iores);
if (pACB->srb_dmamap) {
bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
@ -3688,7 +3688,7 @@ trm_detach(device_t dev)
{
PACB pACB = device_get_softc(dev);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS, pACB->iores);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), pACB->iores);
bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
pACB->srb_dmamap);

View File

@ -29,8 +29,8 @@
#define EPIC_MAX_MTU 1600 /* This is experiment-derived value */
/* PCI aux configuration registers */
#define PCIR_BASEIO (PCIR_MAPS + 0x0) /* Base IO Address */
#define PCIR_BASEMEM (PCIR_MAPS + 0x4) /* Base Memory Address */
#define PCIR_BASEIO PCIR_BAR(0) /* Base IO Address */
#define PCIR_BASEMEM PCIR_BAR(1) /* Base Memory Address */
/* PCI identification */
#define SMC_VENDORID 0x10B8

View File

@ -129,7 +129,7 @@ vx_pci_attach(
sc = device_get_softc(dev);
rid = PCIR_MAPS;
rid = PCIR_BAR(0);
sc->vx_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
0, ~0, 1, RF_ACTIVE);

View File

@ -514,7 +514,7 @@ avma1pp_attach_avma1pp(device_t dev)
ifpi_scp[unit] = sc;
sc->sc_resources.io_rid[0] = PCIR_MAPS+4;
sc->sc_resources.io_rid[0] = PCIR_BAR(1);
sc->sc_resources.io_base[0] = bus_alloc_resource(dev, SYS_RES_IOPORT,
&sc->sc_resources.io_rid[0],
0, ~0, 1, RF_ACTIVE);
@ -534,7 +534,7 @@ avma1pp_attach_avma1pp(device_t dev)
&sc->sc_resources.irq_rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE);
if (sc->sc_resources.irq == NULL) {
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS+4, sc->sc_resources.io_base[0]);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(1), sc->sc_resources.io_base[0]);
printf("avma1pp%d: couldn't map interrupt\n", unit);
error = ENXIO;
goto fail;
@ -544,7 +544,7 @@ avma1pp_attach_avma1pp(device_t dev)
if (error) {
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_resources.irq);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS+4, sc->sc_resources.io_base[0]);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(1), sc->sc_resources.io_base[0]);
printf("avma1pp%d: couldn't set up irq\n", unit);
goto fail;
}

View File

@ -468,7 +468,7 @@ avma1pp2_attach_avma1pp(device_t dev)
ifpi2_scp[unit] = sc;
sc->sc_resources.io_rid[0] = PCIR_MAPS+4;
sc->sc_resources.io_rid[0] = PCIR_BAR(1);
sc->sc_resources.io_base[0] = bus_alloc_resource(dev, SYS_RES_IOPORT,
&sc->sc_resources.io_rid[0],
0, ~0, 1, RF_ACTIVE);
@ -488,7 +488,7 @@ avma1pp2_attach_avma1pp(device_t dev)
&sc->sc_resources.irq_rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE);
if (sc->sc_resources.irq == NULL) {
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS+4, sc->sc_resources.io_base[0]);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(1), sc->sc_resources.io_base[0]);
printf("ifpi2-%d: couldn't map interrupt\n", unit);
error = ENXIO;
goto fail;
@ -498,7 +498,7 @@ avma1pp2_attach_avma1pp(device_t dev)
if (error) {
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_resources.irq);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS+4, sc->sc_resources.io_base[0]);
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(1), sc->sc_resources.io_base[0]);
printf("ifpi2-%d: couldn't set up irq\n", unit);
goto fail;
}

View File

@ -58,12 +58,12 @@ __FBSDID("$FreeBSD$");
#include <i4b/layer1/isic/i4b_isic.h>
#include <i4b/layer1/isic/i4b_ipac.h>
#define MEM0_MAPOFF 0
#define PORT0_MAPOFF 4
#define PORT1_MAPOFF 12
#define MEM0_BAR 0
#define PORT0_BAR 1
#define PORT1_BAR 3
#define ELSA_PORT0_MAPOFF (PCIR_MAPS+PORT0_MAPOFF)
#define ELSA_PORT1_MAPOFF (PCIR_MAPS+PORT1_MAPOFF)
#define ELSA_PORT0_MAPOFF PCIR_BAR(PORT0_BAR)
#define ELSA_PORT1_MAPOFF PCIR_BAR(PORT1_BAR)
#define PCI_QS1000_DID 0x1000
#define PCI_QS1000_VID 0x1048

View File

@ -1538,7 +1538,7 @@ itjc_attach(device_t dev)
itjc_scp[unit] = sc;
sc->sc_resources.io_rid[0] = PCIR_MAPS+0;
sc->sc_resources.io_rid[0] = PCIR_BAR(0);
sc->sc_resources.io_base[0] = bus_alloc_resource(dev, SYS_RES_IOPORT,
&sc->sc_resources.io_rid[0], 0, ~0, 1, RF_ACTIVE);
@ -1763,7 +1763,7 @@ itjc_attach(device_t dev)
/* FALL TRHU */
case 1:
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_MAPS+0,
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0),
sc->sc_resources.io_base[0]);
/* FALL TRHU */

View File

@ -64,11 +64,8 @@ extern struct i4b_l1mux_func iwic_l1mux_func;
/* Winbond PCI Configuration Space */
#define BASEREG0_MAPOFF 0x00
#define BASEREG1_MAPOFF 0x04
#define BADDR0 (PCIR_MAPS + BASEREG0_MAPOFF)
#define BADDR1 (PCIR_MAPS + BASEREG1_MAPOFF)
#define BADDR0 PCIR_BAR(0)
#define BADDR1 PCIR_BAR(1)
static void iwic_pci_intr(struct iwic_softc *sc);

View File

@ -3773,7 +3773,7 @@ dc_suspend(device_t dev)
dc_stop(sc);
for (i = 0; i < 5; i++)
sc->saved_maps[i] = pci_read_config(dev, PCIR_MAPS + i * 4, 4);
sc->saved_maps[i] = pci_read_config(dev, PCIR_BAR(i), 4);
sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4);
sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1);
sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
@ -3806,7 +3806,7 @@ dc_resume(device_t dev)
#endif
/* better way to do this? */
for (i = 0; i < 5; i++)
pci_write_config(dev, PCIR_MAPS + i * 4, sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BAR(i), sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4);
pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1);
pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1);

View File

@ -1349,7 +1349,7 @@ mn_attach (device_t self)
sc->framing = E1;
sprintf(sc->name, "mn%d", sc->unit);
rid = PCIR_MAPS;
rid = PCIR_BAR(0);
res = bus_alloc_resource(self, SYS_RES_MEMORY, &rid,
0, ~0, 1, RF_ACTIVE);
if (res == NULL) {
@ -1360,7 +1360,7 @@ mn_attach (device_t self)
sc->m0v = rman_get_virtual(res);
sc->m0p = rman_get_start(res);
rid = PCIR_MAPS + 4;
rid = PCIR_BAR(1);
res = bus_alloc_resource(self, SYS_RES_MEMORY, &rid,
0, ~0, 1, RF_ACTIVE);
if (res == NULL) {

View File

@ -3024,7 +3024,7 @@ rl_suspend(dev)
rl_stop(sc);
for (i = 0; i < 5; i++)
sc->saved_maps[i] = pci_read_config(dev, PCIR_MAPS + i * 4, 4);
sc->saved_maps[i] = pci_read_config(dev, PCIR_BAR(i), 4);
sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4);
sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1);
sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
@ -3053,7 +3053,7 @@ rl_resume(dev)
/* better way to do this? */
for (i = 0; i < 5; i++)
pci_write_config(dev, PCIR_MAPS + i * 4, sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BAR(i), sc->saved_maps[i], 4);
pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4);
pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1);
pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1);

View File

@ -225,7 +225,7 @@ xrpu_attach(device_t self)
unit = device_get_unit(self);
sc = device_get_softc(self);
sc->mode = NORMAL;
rid = PCIR_MAPS;
rid = PCIR_BAR(0);
res = bus_alloc_resource(self, SYS_RES_MEMORY, &rid,
0, ~0, 1, RF_ACTIVE);
if (res == NULL) {