Add initial GICv2m support to the arm GIC driver. This will be used to
support MSI and MSI-X interrupts, however intrng needs updates before this can happen. For now we just attach the driver until the MSI API is ready. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D5950
This commit is contained in:
Andrew Turner
parent
23e6fff29d
commit
e2d4ce8aef
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=298051
@ -134,6 +134,19 @@ u_int sgi_first_unused = GIC_FIRST_SGI;
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#endif
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#endif
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#ifdef ARM_INTRNG
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struct arm_gic_range {
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uint64_t bus;
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uint64_t host;
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uint64_t size;
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};
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struct arm_gic_devinfo {
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struct ofw_bus_devinfo obdinfo;
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struct resource_list rl;
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};
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#endif
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struct arm_gic_softc {
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device_t gic_dev;
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#ifdef ARM_INTRNG
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@ -151,6 +164,14 @@ struct arm_gic_softc {
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#ifdef GIC_DEBUG_SPURIOUS
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uint32_t last_irq[MAXCPU];
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#endif
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#ifdef ARM_INTRNG
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/* FDT child data */
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pcell_t addr_cells;
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pcell_t size_cells;
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int nranges;
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struct arm_gic_range * ranges;
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#endif
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};
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#ifdef ARM_INTRNG
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@ -195,6 +216,7 @@ static struct ofw_compat_data compat_data[] = {
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{"arm,cortex-a7-gic", true},
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{"arm,arm11mp-gic", true},
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{"brcm,brahma-b15-gic", true},
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{"qcom,msm-qgic2", true},
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{NULL, false}
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};
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@ -437,6 +459,107 @@ arm_gic_register_isrcs(struct arm_gic_softc *sc, uint32_t num)
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sc->nirqs = num;
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return (0);
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}
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static int
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arm_gic_fill_ranges(phandle_t node, struct arm_gic_softc *sc)
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{
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pcell_t host_cells;
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cell_t *base_ranges;
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ssize_t nbase_ranges;
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int i, j, k;
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host_cells = 1;
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OF_getencprop(OF_parent(node), "#address-cells", &host_cells,
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sizeof(host_cells));
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sc->addr_cells = 2;
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OF_getencprop(node, "#address-cells", &sc->addr_cells,
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sizeof(sc->addr_cells));
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sc->size_cells = 2;
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OF_getencprop(node, "#size-cells", &sc->size_cells,
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sizeof(sc->size_cells));
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nbase_ranges = OF_getproplen(node, "ranges");
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if (nbase_ranges < 0)
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return (-1);
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sc->nranges = nbase_ranges / sizeof(cell_t) /
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(sc->addr_cells + host_cells + sc->size_cells);
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if (sc->nranges == 0)
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return (0);
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sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
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M_DEVBUF, M_WAITOK);
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base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
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OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
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for (i = 0, j = 0; i < sc->nranges; i++) {
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sc->ranges[i].bus = 0;
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for (k = 0; k < sc->addr_cells; k++) {
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sc->ranges[i].bus <<= 32;
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sc->ranges[i].bus |= base_ranges[j++];
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}
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sc->ranges[i].host = 0;
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for (k = 0; k < host_cells; k++) {
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sc->ranges[i].host <<= 32;
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sc->ranges[i].host |= base_ranges[j++];
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}
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sc->ranges[i].size = 0;
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for (k = 0; k < sc->size_cells; k++) {
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sc->ranges[i].size <<= 32;
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sc->ranges[i].size |= base_ranges[j++];
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}
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}
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free(base_ranges, M_DEVBUF);
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return (sc->nranges);
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}
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static bool
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arm_gic_add_children(device_t dev)
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{
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struct arm_gic_softc *sc;
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struct arm_gic_devinfo *dinfo;
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phandle_t child, node;
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device_t cdev;
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sc = device_get_softc(dev);
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node = ofw_bus_get_node(dev);
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/* If we have no children don't probe for them */
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child = OF_child(node);
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if (child == 0)
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return (false);
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if (arm_gic_fill_ranges(node, sc) < 0) {
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device_printf(dev, "Have a child, but no ranges\n");
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return (false);
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}
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for (; child != 0; child = OF_peer(child)) {
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dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO);
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if (ofw_bus_gen_setup_devinfo(&dinfo->obdinfo, child) != 0) {
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free(dinfo, M_DEVBUF);
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continue;
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}
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resource_list_init(&dinfo->rl);
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ofw_bus_reg_to_rl(dev, child, sc->addr_cells,
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sc->size_cells, &dinfo->rl);
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cdev = device_add_child(dev, NULL, -1);
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if (cdev == NULL) {
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device_printf(dev, "<%s>: device_add_child failed\n",
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dinfo->obdinfo.obd_name);
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resource_list_free(&dinfo->rl);
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ofw_bus_gen_destroy_devinfo(&dinfo->obdinfo);
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free(dinfo, M_DEVBUF);
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continue;
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}
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device_set_ivars(cdev, dinfo);
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}
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return (true);
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}
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#endif
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static int
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@ -578,6 +701,13 @@ arm_gic_attach(device_t dev)
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}
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OF_device_register_xref(xref, dev);
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/* If we have children probe and attach them */
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if (arm_gic_add_children(dev)) {
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bus_generic_probe(dev);
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return (bus_generic_attach(dev));
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}
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return (0);
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cleanup:
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@ -592,6 +722,75 @@ arm_gic_attach(device_t dev)
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}
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#ifdef ARM_INTRNG
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static struct resource *
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arm_gic_alloc_resource(device_t bus, device_t child, int type, int *rid,
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rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
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{
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struct arm_gic_softc *sc;
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struct arm_gic_devinfo *di;
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struct resource_list_entry *rle;
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int j;
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KASSERT(type == SYS_RES_MEMORY, ("Invalid resoure type %x", type));
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sc = device_get_softc(bus);
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/*
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* Request for the default allocation with a given rid: use resource
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* list stored in the local device info.
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*/
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if (RMAN_IS_DEFAULT_RANGE(start, end)) {
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if ((di = device_get_ivars(child)) == NULL)
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return (NULL);
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if (type == SYS_RES_IOPORT)
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type = SYS_RES_MEMORY;
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rle = resource_list_find(&di->rl, type, *rid);
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if (rle == NULL) {
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if (bootverbose)
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device_printf(bus, "no default resources for "
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"rid = %d, type = %d\n", *rid, type);
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return (NULL);
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}
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start = rle->start;
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end = rle->end;
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count = rle->count;
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}
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/* Remap through ranges property */
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for (j = 0; j < sc->nranges; j++) {
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if (start >= sc->ranges[j].bus && end <
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sc->ranges[j].bus + sc->ranges[j].size) {
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start -= sc->ranges[j].bus;
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start += sc->ranges[j].host;
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end -= sc->ranges[j].bus;
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end += sc->ranges[j].host;
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break;
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}
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}
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if (j == sc->nranges && sc->nranges != 0) {
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if (bootverbose)
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device_printf(bus, "Could not map resource "
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"%#jx-%#jx\n", (uintmax_t)start, (uintmax_t)end);
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return (NULL);
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}
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return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
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count, flags));
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}
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static const struct ofw_bus_devinfo *
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arm_gic_ofw_get_devinfo(device_t bus __unused, device_t child)
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{
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struct arm_gic_devinfo *di;
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di = device_get_ivars(child);
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return (&di->obdinfo);
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}
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static int
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arm_gic_intr(void *arg)
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{
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@ -1231,7 +1430,22 @@ static device_method_t arm_gic_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, arm_gic_probe),
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DEVMETHOD(device_attach, arm_gic_attach),
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#ifdef ARM_INTRNG
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/* Bus interface */
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DEVMETHOD(bus_add_child, bus_generic_add_child),
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DEVMETHOD(bus_alloc_resource, arm_gic_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource,bus_generic_activate_resource),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, arm_gic_ofw_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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/* Interrupt controller interface */
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DEVMETHOD(pic_disable_intr, arm_gic_disable_intr),
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DEVMETHOD(pic_enable_intr, arm_gic_enable_intr),
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@ -1263,3 +1477,89 @@ EARLY_DRIVER_MODULE(gic, simplebus, arm_gic_driver, arm_gic_devclass, 0, 0,
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BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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EARLY_DRIVER_MODULE(gic, ofwbus, arm_gic_driver, arm_gic_devclass, 0, 0,
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BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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#ifdef ARM_INTRNG
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/*
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* GICv2m support -- the GICv2 MSI/MSI-X controller.
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*/
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#define GICV2M_MSI_TYPER 0x008
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#define MSI_TYPER_SPI_BASE(x) (((x) >> 16) & 0x3ff)
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#define MSI_TYPER_SPI_COUNT(x) (((x) >> 0) & 0x3ff)
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#define GICv2M_MSI_SETSPI_NS 0x040
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#define GICV2M_MSI_IIDR 0xFCC
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struct arm_gicv2m_softc {
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struct resource *sc_mem;
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struct mtx sc_mutex;
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u_int sc_spi_start;
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u_int sc_spi_count;
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u_int sc_spi_offset;
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};
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static struct ofw_compat_data gicv2m_compat_data[] = {
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{"arm,gic-v2m-frame", true},
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{NULL, false}
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};
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static int
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arm_gicv2m_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_search_compatible(dev, gicv2m_compat_data)->ocd_data)
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return (ENXIO);
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device_set_desc(dev, "ARM Generic Interrupt Controller MSI/MSIX");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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arm_gicv2m_attach(device_t dev)
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{
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struct arm_gicv2m_softc *sc;
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uint32_t typer;
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int rid;
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sc = device_get_softc(dev);
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rid = 0;
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sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->sc_mem == NULL) {
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device_printf(dev, "Unable to allocate resources\n");
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return (ENXIO);
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}
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typer = bus_read_4(sc->sc_mem, GICV2M_MSI_TYPER);
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sc->sc_spi_start = MSI_TYPER_SPI_BASE(typer);
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sc->sc_spi_count = MSI_TYPER_SPI_COUNT(typer);
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mtx_init(&sc->sc_mutex, "GICv2m lock", "", MTX_DEF);
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if (bootverbose)
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device_printf(dev, "using spi %u to %u\n", sc->sc_spi_start,
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sc->sc_spi_start + sc->sc_spi_count - 1);
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return (0);
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}
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static device_method_t arm_gicv2m_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, arm_gicv2m_probe),
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DEVMETHOD(device_attach, arm_gicv2m_attach),
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/* End */
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DEVMETHOD_END
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};
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DEFINE_CLASS_0(gicv2m, arm_gicv2m_driver, arm_gicv2m_methods,
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sizeof(struct arm_gicv2m_softc));
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static devclass_t arm_gicv2m_devclass;
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EARLY_DRIVER_MODULE(gicv2m, gic, arm_gicv2m_driver,
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arm_gicv2m_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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#endif
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