d/freebsd-dev
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

The "free-lance" timer in the i8254 is only used for the speaker

Browse Source 
these days, so de-generalize the acquire_timer/release_timer api
to just deal with speakers.

The new (optional) MD functions are:
	timer_spkr_acquire()
	timer_spkr_release()
and
	timer_spkr_setfreq()

the last of which configures the timer to generate a tone of a given
frequency, in Hz instead of 1/1193182th of seconds.

Drop entirely timer2 on pc98, it is not used anywhere at all.

Move sysbeep() to kern/tty_cons.c and use the timer_spkr*() if
they exist, and do nothing otherwise.

Remove prototypes and empty acquire-/release-timer() and sysbeep()
functions from the non-beeping archs.

This eliminate the need for the speaker driver to know about
i8254frequency at all.  In theory this makes the speaker driver MI,
contingent on the timer_spkr_*() functions existing but the driver
does not know this yet and still attaches to the ISA bus.

Syscons is more tricky, in one function, sc_tone(), it knows the hz
and things are just fine.

In the other function, sc_bell() it seems to get the period from
the KDMKTONE ioctl in terms if 1/1193182th second, so we hardcode
the 1193182 and leave it at that.  It's probably not important.

Change a few other sysbeep() uses which obviously knew that the
argument was in terms of i8254 frequency, and leave alone those
that look like people thought sysbeep() took frequency in hertz.

This eliminates the knowledge of i8254_freq from all but the actual
clock.c code and the prof_machdep.c on amd64 and i386, where I think
it would be smart to ask for help from the timecounters anyway [TBD].
This commit is contained in:
Poul-Henning Kamp 2008-03-26 20:09:21 +00:00
parent f794f567e9
commit e465985885
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=177642
26 changed files with 153 additions and 332 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
sys/amd64/include/clock.h
View File

@ -27,14 +27,16 @@ void i8254_init(void);
* Driver to clock driver interface.
*/
int acquire_timer2(int mode);
int release_timer2(void);
int rtcin(int reg);
void writertc(int reg, unsigned char val);
int sysbeep(int pitch, int period);
void init_TSC(void);
void init_TSC_tc(void);
#define HAS_TIMER_SPKR 1
int timer_spkr_acquire(void);
int timer_spkr_release(void);
void timer_spkr_setfreq(int freq);
#endif /* _KERNEL */
#endif /* !_MACHINE_CLOCK_H_ */

11
sys/amd64/include/timerreg.h
View File

@ -49,17 +49,6 @@
#define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2)
#define TIMER_MODE (IO_TIMER1 + TIMER_REG_MODE)
#define timer_spkr_acquire() \
acquire_timer2(TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT)
#define timer_spkr_release() \
release_timer2()
#define spkr_set_pitch(pitch) \
do { \
outb(TIMER_CNTR2, (pitch) & 0xff); \
outb(TIMER_CNTR2, (pitch) >> 8); \
} while(0)
#endif /* _KERNEL */
#endif /* _MACHINE_TIMERREG_H_ */

54
sys/amd64/isa/clock.c
View File

@ -110,7 +110,6 @@ static int i8254_real_max_count;
#define RTC_LOCK mtx_lock_spin(&clock_lock)
#define RTC_UNLOCK mtx_unlock_spin(&clock_lock)
static int beeping = 0;
static struct mtx clock_lock;
static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
static struct intsrc *i8254_intsrc;
@ -165,8 +164,11 @@ clkintr(struct trapframe *frame)
}
int
acquire_timer2(int mode)
timer_spkr_acquire(void)
{
int mode;
mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
if (timer2_state != RELEASED)
return (-1);
@ -180,21 +182,33 @@ acquire_timer2(int mode)
* careful with it as with timer0.
*/
outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
ppi_spkr_on(); /* enable counter2 output to speaker */
return (0);
}
int
release_timer2()
timer_spkr_release(void)
{
if (timer2_state != ACQUIRED)
return (-1);
timer2_state = RELEASED;
outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
ppi_spkr_off(); /* disable counter2 output to speaker */
return (0);
}
void
timer_spkr_setfreq(int freq)
{
freq = i8254_freq / freq;
mtx_lock_spin(&clock_lock);
outb(TIMER_CNTR2, freq & 0xff);
outb(TIMER_CNTR2, freq >> 8);
mtx_unlock_spin(&clock_lock);
}
/*
* This routine receives statistical clock interrupts from the RTC.
* As explained above, these occur at 128 interrupts per second.
@ -381,38 +395,6 @@ DELAY(int n)
#endif
}
static void
sysbeepstop(void *chan)
{
ppi_spkr_off(); /* disable counter2 output to speaker */
timer_spkr_release();
beeping = 0;
}
int
sysbeep(int pitch, int period)
{
int x = splclock();
if (timer_spkr_acquire())
if (!beeping) {
/* Something else owns it. */
splx(x);
return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
}
mtx_lock_spin(&clock_lock);
spkr_set_pitch(pitch);
mtx_unlock_spin(&clock_lock);
if (!beeping) {
/* enable counter2 output to speaker */
ppi_spkr_on();
beeping = period;
timeout(sysbeepstop, (void *)NULL, period);
}
splx(x);
return (0);
}
/*
* RTC support routines
*/

5
sys/dev/speaker/spkr.c
View File

@ -74,14 +74,11 @@ static void
tone(thz, centisecs)
unsigned int thz, centisecs;
{
unsigned int divisor;
int sps, timo;
if (thz <= 0)
return;
divisor = i8254_freq / thz;
#ifdef DEBUG
(void) printf("tone: thz=%d centisecs=%d\n", thz, centisecs);
#endif /* DEBUG */
@ -96,7 +93,7 @@ tone(thz, centisecs)
}
splx(sps);
disable_intr();
spkr_set_pitch(divisor);
timer_spkr_setfreq(thz);
enable_intr();
/* turn the speaker on */

2
sys/dev/syscons/syscons.c
View File

@ -3613,7 +3613,7 @@ sc_bell(scr_stat *scp, int pitch, int duration)
} else if (duration != 0 && pitch != 0) {
if (scp != scp->sc->cur_scp)
pitch *= 2;
sysbeep(pitch, duration);
sysbeep(1193182 / pitch, duration);
}
}

4
sys/i386/i386/trap.c
View File

@ -417,7 +417,7 @@ trap(struct trapframe *frame)
mtx_lock(&Giant);
if (time_second - lastalert > 10) {
log(LOG_WARNING, "NMI: power fail\n");
sysbeep(TIMER_FREQ/880, hz);
sysbeep(880, hz);
lastalert = time_second;
}
mtx_unlock(&Giant);
@ -651,7 +651,7 @@ trap(struct trapframe *frame)
mtx_lock(&Giant);
if (time_second - lastalert > 10) {
log(LOG_WARNING, "NMI: power fail\n");
sysbeep(TIMER_FREQ/880, hz);
sysbeep(880, hz);
lastalert = time_second;
}
mtx_unlock(&Giant);

8
sys/i386/include/clock.h
View File

@ -27,15 +27,17 @@ void i8254_init(void);
* Driver to clock driver interface.
*/
int acquire_timer2(int mode);
int release_timer2(void);
int rtcin(int reg);
void writertc(int reg, unsigned char val);
int sysbeep(int pitch, int period);
void timer_restore(void);
void init_TSC(void);
void init_TSC_tc(void);
#define HAS_TIMER_SPKR 1
int timer_spkr_acquire(void);
int timer_spkr_release(void);
void timer_spkr_setfreq(int freq);
#endif /* _KERNEL */
#endif /* !_MACHINE_CLOCK_H_ */

11
sys/i386/include/timerreg.h
View File

@ -49,17 +49,6 @@
#define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2)
#define TIMER_MODE (IO_TIMER1 + TIMER_REG_MODE)
#define timer_spkr_acquire() \
acquire_timer2(TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT)
#define timer_spkr_release() \
release_timer2()
#define spkr_set_pitch(pitch) \
do { \
outb(TIMER_CNTR2, (pitch) & 0xff); \
outb(TIMER_CNTR2, (pitch) >> 8); \
} while(0)
#endif /* _KERNEL */
#endif /* _MACHINE_TIMERREG_H_ */

55
sys/i386/isa/clock.c
View File

@ -113,7 +113,6 @@ static int i8254_real_max_count;
#define RTC_LOCK mtx_lock_spin(&clock_lock)
#define RTC_UNLOCK mtx_unlock_spin(&clock_lock)
static int beeping = 0;
static struct mtx clock_lock;
static struct intsrc *i8254_intsrc;
static u_int32_t i8254_lastcount;
@ -172,8 +171,11 @@ clkintr(struct trapframe *frame)
}
int
acquire_timer2(int mode)
timer_spkr_acquire(void)
{
int mode;
mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
if (timer2_state != RELEASED)
return (-1);
@ -187,21 +189,34 @@ acquire_timer2(int mode)
* careful with it as with timer0.
*/
outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
ppi_spkr_on(); /* enable counter2 output to speaker */
return (0);
}
int
release_timer2()
timer_spkr_release(void)
{
if (timer2_state != ACQUIRED)
return (-1);
timer2_state = RELEASED;
outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
ppi_spkr_off(); /* disable counter2 output to speaker */
return (0);
}
void
timer_spkr_setfreq(int freq)
{
freq = i8254_freq / freq;
mtx_lock_spin(&clock_lock);
outb(TIMER_CNTR2, freq & 0xff);
outb(TIMER_CNTR2, freq >> 8);
mtx_unlock_spin(&clock_lock);
}
/*
* This routine receives statistical clock interrupts from the RTC.
* As explained above, these occur at 128 interrupts per second.
@ -386,38 +401,6 @@ DELAY(int n)
#endif
}
static void
sysbeepstop(void *chan)
{
ppi_spkr_off(); /* disable counter2 output to speaker */
timer_spkr_release();
beeping = 0;
}
int
sysbeep(int pitch, int period)
{
int x = splclock();
if (timer_spkr_acquire())
if (!beeping) {
/* Something else owns it. */
splx(x);
return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
}
mtx_lock_spin(&clock_lock);
spkr_set_pitch(pitch);
mtx_unlock_spin(&clock_lock);
if (!beeping) {
/* enable counter2 output to speaker */
ppi_spkr_on();
beeping = period;
timeout(sysbeepstop, (void *)NULL, period);
}
splx(x);
return (0);
}
/*
* RTC support routines
*/

6
sys/ia64/ia64/machdep.c
View File

@ -1513,9 +1513,3 @@ ia64_highfp_save(struct thread *td)
KASSERT(thr == td, ("Inconsistent high FP state"));
return (1);
}
int
sysbeep(int pitch, int period)
{
return (ENODEV);
}

2
sys/ia64/include/clock.h
View File

@ -16,8 +16,6 @@
extern uint64_t ia64_clock_reload;
extern uint64_t itc_frequency;
int sysbeep(int pitch, int period);
#endif
#endif /* !_MACHINE_CLOCK_H_ */

55
sys/isa/atrtc.c
View File

@ -113,7 +113,6 @@ static int i8254_real_max_count;
#define RTC_LOCK mtx_lock_spin(&clock_lock)
#define RTC_UNLOCK mtx_unlock_spin(&clock_lock)
static int beeping = 0;
static struct mtx clock_lock;
static struct intsrc *i8254_intsrc;
static u_int32_t i8254_lastcount;
@ -172,8 +171,11 @@ clkintr(struct trapframe *frame)
}
int
acquire_timer2(int mode)
timer_spkr_acquire(void)
{
int mode;
mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
if (timer2_state != RELEASED)
return (-1);
@ -187,21 +189,34 @@ acquire_timer2(int mode)
* careful with it as with timer0.
*/
outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
ppi_spkr_on(); /* enable counter2 output to speaker */
return (0);
}
int
release_timer2()
timer_spkr_release(void)
{
if (timer2_state != ACQUIRED)
return (-1);
timer2_state = RELEASED;
outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
ppi_spkr_off(); /* disable counter2 output to speaker */
return (0);
}
void
timer_spkr_setfreq(int freq)
{
freq = i8254_freq / freq;
mtx_lock_spin(&clock_lock);
outb(TIMER_CNTR2, freq & 0xff);
outb(TIMER_CNTR2, freq >> 8);
mtx_unlock_spin(&clock_lock);
}
/*
* This routine receives statistical clock interrupts from the RTC.
* As explained above, these occur at 128 interrupts per second.
@ -386,38 +401,6 @@ DELAY(int n)
#endif
}
static void
sysbeepstop(void *chan)
{
ppi_spkr_off(); /* disable counter2 output to speaker */
timer_spkr_release();
beeping = 0;
}
int
sysbeep(int pitch, int period)
{
int x = splclock();
if (timer_spkr_acquire())
if (!beeping) {
/* Something else owns it. */
splx(x);
return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
}
mtx_lock_spin(&clock_lock);
spkr_set_pitch(pitch);
mtx_unlock_spin(&clock_lock);
if (!beeping) {
/* enable counter2 output to speaker */
ppi_spkr_on();
beeping = period;
timeout(sysbeepstop, (void *)NULL, period);
}
splx(x);
return (0);
}
/*
* RTC support routines
*/

2
sys/isa/syscons_isa.c
View File

@ -278,7 +278,7 @@ sc_tone(int herz)
if (timer_spkr_acquire())
return EBUSY;
/* set pitch */
spkr_set_pitch(i8254_freq / herz);
timer_spkr_setfreq(herz);
/* enable counter 2 output to speaker */
ppi_spkr_on();
} else {

51
sys/kern/tty_cons.c
View File

@ -64,6 +64,7 @@ __FBSDID("$FreeBSD$");
#include <ddb/ddb.h>
#include <machine/cpu.h>
#include <machine/clock.h>
static d_open_t cnopen;
static d_close_t cnclose;
@ -732,3 +733,53 @@ cn_drvinit(void *unused)
}
SYSINIT(cndev, SI_SUB_DRIVERS, SI_ORDER_MIDDLE, cn_drvinit, NULL);
/*
* Sysbeep(), if we have hardware for it
*/
#ifdef HAS_TIMER_SPKR
static int beeping;
static void
sysbeepstop(void *chan)
{
timer_spkr_release();
beeping = 0;
}
int
sysbeep(int pitch, int period)
{
if (timer_spkr_acquire()) {
if (!beeping) {
/* Something else owns it. */
return (EBUSY);
}
}
timer_spkr_setfreq(pitch);
if (!beeping) {
beeping = period;
timeout(sysbeepstop, (void *)NULL, period);
}
return (0);
}
#else
/*
* No hardware, no sound
*/
int
sysbeep(int pitch __unused, int period __unused)
{
return (ENODEV);
}
#endif

77
sys/pc98/cbus/clock.c
View File

@ -105,7 +105,6 @@ TUNABLE_INT("hw.i8254.freq", &i8254_freq);
int i8254_max_count;
static int i8254_real_max_count;
static int beeping = 0;
static struct mtx clock_lock;
static struct intsrc *i8254_intsrc;
static u_int32_t i8254_lastcount;
@ -121,7 +120,6 @@ static int using_lapic_timer;
#define ACQUIRE_PENDING 3
static u_char timer1_state;
static u_char timer2_state;
static void rtc_serialcombit(int);
static void rtc_serialcom(int);
static int rtc_inb(void);
@ -161,8 +159,11 @@ clkintr(struct trapframe *frame)
}
int
acquire_timer1(int mode)
timer_spkr_acquire(void)
{
int mode;
mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT;
if (timer1_state != RELEASED)
return (-1);
@ -176,50 +177,32 @@ acquire_timer1(int mode)
* careful with it as with timer0.
*/
outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
ppi_spkr_on(); /* enable counter1 output to speaker */
return (0);
}
int
acquire_timer2(int mode)
{
if (timer2_state != RELEASED)
return (-1);
timer2_state = ACQUIRED;
/*
* This access to the timer registers is as atomic as possible
* because it is a single instruction. We could do better if we
* knew the rate. Use of splclock() limits glitches to 10-100us,
* and this is probably good enough for timer2, so we aren't as
* careful with it as with timer0.
*/
outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
return (0);
}
int
release_timer1()
timer_spkr_release(void)
{
if (timer1_state != ACQUIRED)
return (-1);
timer1_state = RELEASED;
outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
ppi_spkr_off(); /* disable counter1 output to speaker */
return (0);
}
int
release_timer2()
void
timer_spkr_setfreq(int freq)
{
if (timer2_state != ACQUIRED)
return (-1);
timer2_state = RELEASED;
outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
return (0);
freq = i8254_freq / freq;
mtx_lock_spin(&clock_lock);
outb(TIMER_CNTR1, (freq) & 0xff);
outb(TIMER_CNTR1, (freq) >> 8);
mtx_unlock_spin(&clock_lock);
}
@ -342,38 +325,6 @@ DELAY(int n)
#endif
}
static void
sysbeepstop(void *chan)
{
ppi_spkr_off(); /* disable counter1 output to speaker */
timer_spkr_release();
beeping = 0;
}
int
sysbeep(int pitch, int period)
{
int x = splclock();
if (timer_spkr_acquire())
if (!beeping) {
/* Something else owns it. */
splx(x);
return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
}
mtx_lock_spin(&clock_lock);
spkr_set_pitch(pitch);
mtx_unlock_spin(&clock_lock);
if (!beeping) {
/* enable counter1 output to speaker */
ppi_spkr_on();
beeping = period;
timeout(sysbeepstop, (void *)NULL, period);
}
splx(x);
return (0);
}
static u_int
calibrate_clocks(void)
{

77
sys/pc98/cbus/pcrtc.c
View File

@ -105,7 +105,6 @@ TUNABLE_INT("hw.i8254.freq", &i8254_freq);
int i8254_max_count;
static int i8254_real_max_count;
static int beeping = 0;
static struct mtx clock_lock;
static struct intsrc *i8254_intsrc;
static u_int32_t i8254_lastcount;
@ -121,7 +120,6 @@ static int using_lapic_timer;
#define ACQUIRE_PENDING 3
static u_char timer1_state;
static u_char timer2_state;
static void rtc_serialcombit(int);
static void rtc_serialcom(int);
static int rtc_inb(void);
@ -161,8 +159,11 @@ clkintr(struct trapframe *frame)
}
int
acquire_timer1(int mode)
timer_spkr_acquire(void)
{
int mode;
mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT;
if (timer1_state != RELEASED)
return (-1);
@ -176,50 +177,32 @@ acquire_timer1(int mode)
* careful with it as with timer0.
*/
outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
ppi_spkr_on(); /* enable counter1 output to speaker */
return (0);
}
int
acquire_timer2(int mode)
{
if (timer2_state != RELEASED)
return (-1);
timer2_state = ACQUIRED;
/*
* This access to the timer registers is as atomic as possible
* because it is a single instruction. We could do better if we
* knew the rate. Use of splclock() limits glitches to 10-100us,
* and this is probably good enough for timer2, so we aren't as
* careful with it as with timer0.
*/
outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
return (0);
}
int
release_timer1()
timer_spkr_release(void)
{
if (timer1_state != ACQUIRED)
return (-1);
timer1_state = RELEASED;
outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
ppi_spkr_off(); /* disable counter1 output to speaker */
return (0);
}
int
release_timer2()
void
timer_spkr_setfreq(int freq)
{
if (timer2_state != ACQUIRED)
return (-1);
timer2_state = RELEASED;
outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
return (0);
freq = i8254_freq / freq;
mtx_lock_spin(&clock_lock);
outb(TIMER_CNTR1, (freq) & 0xff);
outb(TIMER_CNTR1, (freq) >> 8);
mtx_unlock_spin(&clock_lock);
}
@ -342,38 +325,6 @@ DELAY(int n)
#endif
}
static void
sysbeepstop(void *chan)
{
ppi_spkr_off(); /* disable counter1 output to speaker */
timer_spkr_release();
beeping = 0;
}
int
sysbeep(int pitch, int period)
{
int x = splclock();
if (timer_spkr_acquire())
if (!beeping) {
/* Something else owns it. */
splx(x);
return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
}
mtx_lock_spin(&clock_lock);
spkr_set_pitch(pitch);
mtx_unlock_spin(&clock_lock);
if (!beeping) {
/* enable counter1 output to speaker */
ppi_spkr_on();
beeping = period;
timeout(sysbeepstop, (void *)NULL, period);
}
splx(x);
return (0);
}
static u_int
calibrate_clocks(void)
{

2
sys/pc98/cbus/syscons_cbus.c
View File

@ -233,7 +233,7 @@ sc_tone(int herz)
if (timer_spkr_acquire())
return EBUSY;
/* set pitch */
spkr_set_pitch(i8254_freq / herz);
timer_spkr_setfreq(herz);
} else {
/* disable counter 1 */
ppi_spkr_off();

5
sys/pc98/include/clock.h
View File

@ -30,9 +30,4 @@
#include <i386/clock.h>
#ifdef _KERNEL
int acquire_timer1(int);
int release_timer1(void);
#endif
#endif /* _PC98_INCLUDE_CLOCK_H_ */

11
sys/pc98/include/timerreg.h
View File

@ -49,17 +49,6 @@
#define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2 * 2)
#define TIMER_MODE (IO_TIMER1 + TIMER_REG_MODE * 2)
#define timer_spkr_acquire() \
acquire_timer1(TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT)
#define timer_spkr_release() \
release_timer1()
#define spkr_set_pitch(pitch) \
do { \
outb(TIMER_CNTR1, (pitch) & 0xff); \
outb(TIMER_CNTR1, (pitch) >> 8); \
} while(0)
#endif /* _KERNEL */
#endif /* _MACHINE_TIMERREG_H_ */

10
sys/powerpc/aim/clock.c
View File

@ -306,13 +306,3 @@ void
cpu_stopprofclock(void)
{
}
/*
* XXX Needed by syscons
*/
int
sysbeep(int pitch, int period)
{
return (0);
}

10
sys/powerpc/booke/clock.c
View File

@ -264,13 +264,3 @@ cpu_stopprofclock(void)
{
}
/*
* XXX Needed by syscons
*/
int
sysbeep(int pitch, int period)
{
return (0);
}

4
sys/powerpc/include/clock.h
View File

@ -13,10 +13,6 @@
struct trapframe;
int sysbeep(int pitch, int period);
int acquire_timer2(int mode);
int release_timer2(void);
void decr_intr(struct trapframe *);
#endif

2
sys/sparc64/include/clock.h
View File

@ -33,6 +33,4 @@ extern u_long tick_increment;
extern u_long tick_freq;
extern u_long tick_MHz;
int sysbeep(int, int);
#endif /* !_MACHINE_CLOCK_H_ */

9
sys/sparc64/sparc64/clock.c
View File

@ -56,12 +56,3 @@ void
cpu_stopprofclock(void)
{
}
int
sysbeep(int pitch, int period)
{
/*
* XXX: function exists to enable RAID drivers to compile at the moment.
*/
return (0);
}

2
sys/sun4v/include/clock.h
View File

@ -36,6 +36,4 @@ extern u_long tick_MHz;
extern int adjkerntz;
extern int wall_cmos_clock;
int sysbeep(int, int);
#endif /* !_MACHINE_CLOCK_H_ */

2
sys/sys/systm.h
View File

@ -212,6 +212,8 @@ u_long casuword(volatile u_long *p, u_long oldval, u_long newval);
void realitexpire(void *);
int sysbeep(int hertz, int period);
/*
* Cyclic clock function type definition used to hook the cyclic
* subsystem into the appropriate timer interrupt.