The "free-lance" timer in the i8254 is only used for the speaker
these days, so de-generalize the acquire_timer/release_timer api to just deal with speakers. The new (optional) MD functions are: timer_spkr_acquire() timer_spkr_release() and timer_spkr_setfreq() the last of which configures the timer to generate a tone of a given frequency, in Hz instead of 1/1193182th of seconds. Drop entirely timer2 on pc98, it is not used anywhere at all. Move sysbeep() to kern/tty_cons.c and use the timer_spkr*() if they exist, and do nothing otherwise. Remove prototypes and empty acquire-/release-timer() and sysbeep() functions from the non-beeping archs. This eliminate the need for the speaker driver to know about i8254frequency at all. In theory this makes the speaker driver MI, contingent on the timer_spkr_*() functions existing but the driver does not know this yet and still attaches to the ISA bus. Syscons is more tricky, in one function, sc_tone(), it knows the hz and things are just fine. In the other function, sc_bell() it seems to get the period from the KDMKTONE ioctl in terms if 1/1193182th second, so we hardcode the 1193182 and leave it at that. It's probably not important. Change a few other sysbeep() uses which obviously knew that the argument was in terms of i8254 frequency, and leave alone those that look like people thought sysbeep() took frequency in hertz. This eliminates the knowledge of i8254_freq from all but the actual clock.c code and the prof_machdep.c on amd64 and i386, where I think it would be smart to ask for help from the timecounters anyway [TBD].
This commit is contained in:
parent
f794f567e9
commit
e465985885
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=177642
@ -27,14 +27,16 @@ void i8254_init(void);
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* Driver to clock driver interface.
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*/
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int acquire_timer2(int mode);
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int release_timer2(void);
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int rtcin(int reg);
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void writertc(int reg, unsigned char val);
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int sysbeep(int pitch, int period);
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void init_TSC(void);
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void init_TSC_tc(void);
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#define HAS_TIMER_SPKR 1
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int timer_spkr_acquire(void);
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int timer_spkr_release(void);
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void timer_spkr_setfreq(int freq);
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#endif /* _KERNEL */
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#endif /* !_MACHINE_CLOCK_H_ */
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@ -49,17 +49,6 @@
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#define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2)
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#define TIMER_MODE (IO_TIMER1 + TIMER_REG_MODE)
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#define timer_spkr_acquire() \
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acquire_timer2(TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT)
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#define timer_spkr_release() \
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release_timer2()
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#define spkr_set_pitch(pitch) \
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do { \
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outb(TIMER_CNTR2, (pitch) & 0xff); \
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outb(TIMER_CNTR2, (pitch) >> 8); \
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} while(0)
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#endif /* _KERNEL */
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#endif /* _MACHINE_TIMERREG_H_ */
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@ -110,7 +110,6 @@ static int i8254_real_max_count;
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#define RTC_LOCK mtx_lock_spin(&clock_lock)
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#define RTC_UNLOCK mtx_unlock_spin(&clock_lock)
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static int beeping = 0;
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static struct mtx clock_lock;
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static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
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static struct intsrc *i8254_intsrc;
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@ -165,8 +164,11 @@ clkintr(struct trapframe *frame)
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}
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int
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acquire_timer2(int mode)
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timer_spkr_acquire(void)
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{
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int mode;
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mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
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if (timer2_state != RELEASED)
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return (-1);
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@ -180,21 +182,33 @@ acquire_timer2(int mode)
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* careful with it as with timer0.
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*/
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outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
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ppi_spkr_on(); /* enable counter2 output to speaker */
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return (0);
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}
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int
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release_timer2()
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timer_spkr_release(void)
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{
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if (timer2_state != ACQUIRED)
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return (-1);
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timer2_state = RELEASED;
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outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
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ppi_spkr_off(); /* disable counter2 output to speaker */
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return (0);
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}
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void
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timer_spkr_setfreq(int freq)
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{
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freq = i8254_freq / freq;
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mtx_lock_spin(&clock_lock);
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outb(TIMER_CNTR2, freq & 0xff);
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outb(TIMER_CNTR2, freq >> 8);
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mtx_unlock_spin(&clock_lock);
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}
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/*
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* This routine receives statistical clock interrupts from the RTC.
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* As explained above, these occur at 128 interrupts per second.
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@ -381,38 +395,6 @@ DELAY(int n)
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#endif
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}
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static void
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sysbeepstop(void *chan)
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{
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ppi_spkr_off(); /* disable counter2 output to speaker */
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timer_spkr_release();
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beeping = 0;
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}
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int
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sysbeep(int pitch, int period)
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{
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int x = splclock();
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if (timer_spkr_acquire())
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if (!beeping) {
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/* Something else owns it. */
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splx(x);
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return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
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}
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mtx_lock_spin(&clock_lock);
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spkr_set_pitch(pitch);
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mtx_unlock_spin(&clock_lock);
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if (!beeping) {
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/* enable counter2 output to speaker */
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ppi_spkr_on();
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beeping = period;
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timeout(sysbeepstop, (void *)NULL, period);
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}
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splx(x);
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return (0);
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}
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/*
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* RTC support routines
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*/
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@ -74,14 +74,11 @@ static void
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tone(thz, centisecs)
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unsigned int thz, centisecs;
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{
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unsigned int divisor;
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int sps, timo;
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if (thz <= 0)
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return;
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divisor = i8254_freq / thz;
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#ifdef DEBUG
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(void) printf("tone: thz=%d centisecs=%d\n", thz, centisecs);
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#endif /* DEBUG */
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@ -96,7 +93,7 @@ tone(thz, centisecs)
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}
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splx(sps);
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disable_intr();
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spkr_set_pitch(divisor);
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timer_spkr_setfreq(thz);
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enable_intr();
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/* turn the speaker on */
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@ -3613,7 +3613,7 @@ sc_bell(scr_stat *scp, int pitch, int duration)
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} else if (duration != 0 && pitch != 0) {
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if (scp != scp->sc->cur_scp)
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pitch *= 2;
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sysbeep(pitch, duration);
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sysbeep(1193182 / pitch, duration);
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}
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}
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@ -417,7 +417,7 @@ trap(struct trapframe *frame)
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mtx_lock(&Giant);
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if (time_second - lastalert > 10) {
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log(LOG_WARNING, "NMI: power fail\n");
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sysbeep(TIMER_FREQ/880, hz);
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sysbeep(880, hz);
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lastalert = time_second;
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}
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mtx_unlock(&Giant);
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@ -651,7 +651,7 @@ trap(struct trapframe *frame)
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mtx_lock(&Giant);
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if (time_second - lastalert > 10) {
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log(LOG_WARNING, "NMI: power fail\n");
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sysbeep(TIMER_FREQ/880, hz);
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sysbeep(880, hz);
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lastalert = time_second;
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}
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mtx_unlock(&Giant);
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@ -27,15 +27,17 @@ void i8254_init(void);
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* Driver to clock driver interface.
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*/
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int acquire_timer2(int mode);
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int release_timer2(void);
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int rtcin(int reg);
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void writertc(int reg, unsigned char val);
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int sysbeep(int pitch, int period);
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void timer_restore(void);
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void init_TSC(void);
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void init_TSC_tc(void);
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#define HAS_TIMER_SPKR 1
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int timer_spkr_acquire(void);
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int timer_spkr_release(void);
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void timer_spkr_setfreq(int freq);
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#endif /* _KERNEL */
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#endif /* !_MACHINE_CLOCK_H_ */
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@ -49,17 +49,6 @@
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#define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2)
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#define TIMER_MODE (IO_TIMER1 + TIMER_REG_MODE)
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#define timer_spkr_acquire() \
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acquire_timer2(TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT)
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#define timer_spkr_release() \
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release_timer2()
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#define spkr_set_pitch(pitch) \
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do { \
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outb(TIMER_CNTR2, (pitch) & 0xff); \
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outb(TIMER_CNTR2, (pitch) >> 8); \
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} while(0)
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#endif /* _KERNEL */
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#endif /* _MACHINE_TIMERREG_H_ */
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@ -113,7 +113,6 @@ static int i8254_real_max_count;
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#define RTC_LOCK mtx_lock_spin(&clock_lock)
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#define RTC_UNLOCK mtx_unlock_spin(&clock_lock)
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static int beeping = 0;
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static struct mtx clock_lock;
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static struct intsrc *i8254_intsrc;
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static u_int32_t i8254_lastcount;
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@ -172,8 +171,11 @@ clkintr(struct trapframe *frame)
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}
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int
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acquire_timer2(int mode)
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timer_spkr_acquire(void)
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{
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int mode;
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mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
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if (timer2_state != RELEASED)
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return (-1);
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@ -187,21 +189,34 @@ acquire_timer2(int mode)
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* careful with it as with timer0.
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*/
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outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
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ppi_spkr_on(); /* enable counter2 output to speaker */
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return (0);
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}
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int
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release_timer2()
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timer_spkr_release(void)
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{
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if (timer2_state != ACQUIRED)
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return (-1);
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timer2_state = RELEASED;
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outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
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ppi_spkr_off(); /* disable counter2 output to speaker */
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return (0);
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}
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void
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timer_spkr_setfreq(int freq)
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{
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freq = i8254_freq / freq;
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mtx_lock_spin(&clock_lock);
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outb(TIMER_CNTR2, freq & 0xff);
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outb(TIMER_CNTR2, freq >> 8);
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mtx_unlock_spin(&clock_lock);
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}
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/*
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* This routine receives statistical clock interrupts from the RTC.
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* As explained above, these occur at 128 interrupts per second.
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@ -386,38 +401,6 @@ DELAY(int n)
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#endif
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}
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static void
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sysbeepstop(void *chan)
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{
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ppi_spkr_off(); /* disable counter2 output to speaker */
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timer_spkr_release();
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beeping = 0;
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}
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int
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sysbeep(int pitch, int period)
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{
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int x = splclock();
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if (timer_spkr_acquire())
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if (!beeping) {
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/* Something else owns it. */
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splx(x);
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return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
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}
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mtx_lock_spin(&clock_lock);
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spkr_set_pitch(pitch);
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mtx_unlock_spin(&clock_lock);
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if (!beeping) {
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/* enable counter2 output to speaker */
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ppi_spkr_on();
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beeping = period;
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timeout(sysbeepstop, (void *)NULL, period);
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}
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splx(x);
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return (0);
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}
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/*
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* RTC support routines
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*/
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@ -1513,9 +1513,3 @@ ia64_highfp_save(struct thread *td)
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KASSERT(thr == td, ("Inconsistent high FP state"));
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return (1);
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}
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int
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sysbeep(int pitch, int period)
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{
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return (ENODEV);
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}
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@ -16,8 +16,6 @@
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extern uint64_t ia64_clock_reload;
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extern uint64_t itc_frequency;
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int sysbeep(int pitch, int period);
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#endif
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#endif /* !_MACHINE_CLOCK_H_ */
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@ -113,7 +113,6 @@ static int i8254_real_max_count;
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#define RTC_LOCK mtx_lock_spin(&clock_lock)
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#define RTC_UNLOCK mtx_unlock_spin(&clock_lock)
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static int beeping = 0;
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static struct mtx clock_lock;
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static struct intsrc *i8254_intsrc;
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static u_int32_t i8254_lastcount;
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@ -172,8 +171,11 @@ clkintr(struct trapframe *frame)
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}
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int
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acquire_timer2(int mode)
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timer_spkr_acquire(void)
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{
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int mode;
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mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
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if (timer2_state != RELEASED)
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return (-1);
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@ -187,21 +189,34 @@ acquire_timer2(int mode)
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* careful with it as with timer0.
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*/
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outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
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ppi_spkr_on(); /* enable counter2 output to speaker */
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return (0);
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}
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int
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release_timer2()
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timer_spkr_release(void)
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{
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if (timer2_state != ACQUIRED)
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return (-1);
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timer2_state = RELEASED;
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outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
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ppi_spkr_off(); /* disable counter2 output to speaker */
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return (0);
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}
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void
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timer_spkr_setfreq(int freq)
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{
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freq = i8254_freq / freq;
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mtx_lock_spin(&clock_lock);
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outb(TIMER_CNTR2, freq & 0xff);
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outb(TIMER_CNTR2, freq >> 8);
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mtx_unlock_spin(&clock_lock);
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}
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/*
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* This routine receives statistical clock interrupts from the RTC.
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* As explained above, these occur at 128 interrupts per second.
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@ -386,38 +401,6 @@ DELAY(int n)
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#endif
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}
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static void
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sysbeepstop(void *chan)
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{
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ppi_spkr_off(); /* disable counter2 output to speaker */
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timer_spkr_release();
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beeping = 0;
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}
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int
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sysbeep(int pitch, int period)
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{
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int x = splclock();
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if (timer_spkr_acquire())
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if (!beeping) {
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/* Something else owns it. */
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splx(x);
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return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
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}
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mtx_lock_spin(&clock_lock);
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spkr_set_pitch(pitch);
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mtx_unlock_spin(&clock_lock);
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if (!beeping) {
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/* enable counter2 output to speaker */
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ppi_spkr_on();
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beeping = period;
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timeout(sysbeepstop, (void *)NULL, period);
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}
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splx(x);
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return (0);
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}
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/*
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* RTC support routines
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*/
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@ -278,7 +278,7 @@ sc_tone(int herz)
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if (timer_spkr_acquire())
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return EBUSY;
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/* set pitch */
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spkr_set_pitch(i8254_freq / herz);
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timer_spkr_setfreq(herz);
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/* enable counter 2 output to speaker */
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ppi_spkr_on();
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} else {
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|
@ -64,6 +64,7 @@ __FBSDID("$FreeBSD$");
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#include <ddb/ddb.h>
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#include <machine/cpu.h>
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#include <machine/clock.h>
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static d_open_t cnopen;
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static d_close_t cnclose;
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@ -732,3 +733,53 @@ cn_drvinit(void *unused)
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}
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SYSINIT(cndev, SI_SUB_DRIVERS, SI_ORDER_MIDDLE, cn_drvinit, NULL);
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/*
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* Sysbeep(), if we have hardware for it
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*/
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#ifdef HAS_TIMER_SPKR
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static int beeping;
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static void
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sysbeepstop(void *chan)
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{
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timer_spkr_release();
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beeping = 0;
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}
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int
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sysbeep(int pitch, int period)
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{
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if (timer_spkr_acquire()) {
|
||||
if (!beeping) {
|
||||
/* Something else owns it. */
|
||||
return (EBUSY);
|
||||
}
|
||||
}
|
||||
timer_spkr_setfreq(pitch);
|
||||
if (!beeping) {
|
||||
beeping = period;
|
||||
timeout(sysbeepstop, (void *)NULL, period);
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
/*
|
||||
* No hardware, no sound
|
||||
*/
|
||||
|
||||
int
|
||||
sysbeep(int pitch __unused, int period __unused)
|
||||
{
|
||||
|
||||
return (ENODEV);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
@ -105,7 +105,6 @@ TUNABLE_INT("hw.i8254.freq", &i8254_freq);
|
||||
int i8254_max_count;
|
||||
static int i8254_real_max_count;
|
||||
|
||||
static int beeping = 0;
|
||||
static struct mtx clock_lock;
|
||||
static struct intsrc *i8254_intsrc;
|
||||
static u_int32_t i8254_lastcount;
|
||||
@ -121,7 +120,6 @@ static int using_lapic_timer;
|
||||
#define ACQUIRE_PENDING 3
|
||||
|
||||
static u_char timer1_state;
|
||||
static u_char timer2_state;
|
||||
static void rtc_serialcombit(int);
|
||||
static void rtc_serialcom(int);
|
||||
static int rtc_inb(void);
|
||||
@ -161,8 +159,11 @@ clkintr(struct trapframe *frame)
|
||||
}
|
||||
|
||||
int
|
||||
acquire_timer1(int mode)
|
||||
timer_spkr_acquire(void)
|
||||
{
|
||||
int mode;
|
||||
|
||||
mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT;
|
||||
|
||||
if (timer1_state != RELEASED)
|
||||
return (-1);
|
||||
@ -176,50 +177,32 @@ acquire_timer1(int mode)
|
||||
* careful with it as with timer0.
|
||||
*/
|
||||
outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
|
||||
ppi_spkr_on(); /* enable counter1 output to speaker */
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
acquire_timer2(int mode)
|
||||
{
|
||||
|
||||
if (timer2_state != RELEASED)
|
||||
return (-1);
|
||||
timer2_state = ACQUIRED;
|
||||
|
||||
/*
|
||||
* This access to the timer registers is as atomic as possible
|
||||
* because it is a single instruction. We could do better if we
|
||||
* knew the rate. Use of splclock() limits glitches to 10-100us,
|
||||
* and this is probably good enough for timer2, so we aren't as
|
||||
* careful with it as with timer0.
|
||||
*/
|
||||
outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
release_timer1()
|
||||
timer_spkr_release(void)
|
||||
{
|
||||
|
||||
if (timer1_state != ACQUIRED)
|
||||
return (-1);
|
||||
timer1_state = RELEASED;
|
||||
outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
|
||||
ppi_spkr_off(); /* disable counter1 output to speaker */
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
release_timer2()
|
||||
void
|
||||
timer_spkr_setfreq(int freq)
|
||||
{
|
||||
|
||||
if (timer2_state != ACQUIRED)
|
||||
return (-1);
|
||||
timer2_state = RELEASED;
|
||||
outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
|
||||
return (0);
|
||||
freq = i8254_freq / freq;
|
||||
mtx_lock_spin(&clock_lock);
|
||||
outb(TIMER_CNTR1, (freq) & 0xff);
|
||||
outb(TIMER_CNTR1, (freq) >> 8);
|
||||
mtx_unlock_spin(&clock_lock);
|
||||
}
|
||||
|
||||
|
||||
@ -342,38 +325,6 @@ DELAY(int n)
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
sysbeepstop(void *chan)
|
||||
{
|
||||
ppi_spkr_off(); /* disable counter1 output to speaker */
|
||||
timer_spkr_release();
|
||||
beeping = 0;
|
||||
}
|
||||
|
||||
int
|
||||
sysbeep(int pitch, int period)
|
||||
{
|
||||
int x = splclock();
|
||||
|
||||
if (timer_spkr_acquire())
|
||||
if (!beeping) {
|
||||
/* Something else owns it. */
|
||||
splx(x);
|
||||
return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
|
||||
}
|
||||
mtx_lock_spin(&clock_lock);
|
||||
spkr_set_pitch(pitch);
|
||||
mtx_unlock_spin(&clock_lock);
|
||||
if (!beeping) {
|
||||
/* enable counter1 output to speaker */
|
||||
ppi_spkr_on();
|
||||
beeping = period;
|
||||
timeout(sysbeepstop, (void *)NULL, period);
|
||||
}
|
||||
splx(x);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static u_int
|
||||
calibrate_clocks(void)
|
||||
{
|
||||
|
@ -105,7 +105,6 @@ TUNABLE_INT("hw.i8254.freq", &i8254_freq);
|
||||
int i8254_max_count;
|
||||
static int i8254_real_max_count;
|
||||
|
||||
static int beeping = 0;
|
||||
static struct mtx clock_lock;
|
||||
static struct intsrc *i8254_intsrc;
|
||||
static u_int32_t i8254_lastcount;
|
||||
@ -121,7 +120,6 @@ static int using_lapic_timer;
|
||||
#define ACQUIRE_PENDING 3
|
||||
|
||||
static u_char timer1_state;
|
||||
static u_char timer2_state;
|
||||
static void rtc_serialcombit(int);
|
||||
static void rtc_serialcom(int);
|
||||
static int rtc_inb(void);
|
||||
@ -161,8 +159,11 @@ clkintr(struct trapframe *frame)
|
||||
}
|
||||
|
||||
int
|
||||
acquire_timer1(int mode)
|
||||
timer_spkr_acquire(void)
|
||||
{
|
||||
int mode;
|
||||
|
||||
mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT;
|
||||
|
||||
if (timer1_state != RELEASED)
|
||||
return (-1);
|
||||
@ -176,50 +177,32 @@ acquire_timer1(int mode)
|
||||
* careful with it as with timer0.
|
||||
*/
|
||||
outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
|
||||
ppi_spkr_on(); /* enable counter1 output to speaker */
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
acquire_timer2(int mode)
|
||||
{
|
||||
|
||||
if (timer2_state != RELEASED)
|
||||
return (-1);
|
||||
timer2_state = ACQUIRED;
|
||||
|
||||
/*
|
||||
* This access to the timer registers is as atomic as possible
|
||||
* because it is a single instruction. We could do better if we
|
||||
* knew the rate. Use of splclock() limits glitches to 10-100us,
|
||||
* and this is probably good enough for timer2, so we aren't as
|
||||
* careful with it as with timer0.
|
||||
*/
|
||||
outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
release_timer1()
|
||||
timer_spkr_release(void)
|
||||
{
|
||||
|
||||
if (timer1_state != ACQUIRED)
|
||||
return (-1);
|
||||
timer1_state = RELEASED;
|
||||
outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
|
||||
ppi_spkr_off(); /* disable counter1 output to speaker */
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
release_timer2()
|
||||
void
|
||||
timer_spkr_setfreq(int freq)
|
||||
{
|
||||
|
||||
if (timer2_state != ACQUIRED)
|
||||
return (-1);
|
||||
timer2_state = RELEASED;
|
||||
outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
|
||||
return (0);
|
||||
freq = i8254_freq / freq;
|
||||
mtx_lock_spin(&clock_lock);
|
||||
outb(TIMER_CNTR1, (freq) & 0xff);
|
||||
outb(TIMER_CNTR1, (freq) >> 8);
|
||||
mtx_unlock_spin(&clock_lock);
|
||||
}
|
||||
|
||||
|
||||
@ -342,38 +325,6 @@ DELAY(int n)
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
sysbeepstop(void *chan)
|
||||
{
|
||||
ppi_spkr_off(); /* disable counter1 output to speaker */
|
||||
timer_spkr_release();
|
||||
beeping = 0;
|
||||
}
|
||||
|
||||
int
|
||||
sysbeep(int pitch, int period)
|
||||
{
|
||||
int x = splclock();
|
||||
|
||||
if (timer_spkr_acquire())
|
||||
if (!beeping) {
|
||||
/* Something else owns it. */
|
||||
splx(x);
|
||||
return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
|
||||
}
|
||||
mtx_lock_spin(&clock_lock);
|
||||
spkr_set_pitch(pitch);
|
||||
mtx_unlock_spin(&clock_lock);
|
||||
if (!beeping) {
|
||||
/* enable counter1 output to speaker */
|
||||
ppi_spkr_on();
|
||||
beeping = period;
|
||||
timeout(sysbeepstop, (void *)NULL, period);
|
||||
}
|
||||
splx(x);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static u_int
|
||||
calibrate_clocks(void)
|
||||
{
|
||||
|
@ -233,7 +233,7 @@ sc_tone(int herz)
|
||||
if (timer_spkr_acquire())
|
||||
return EBUSY;
|
||||
/* set pitch */
|
||||
spkr_set_pitch(i8254_freq / herz);
|
||||
timer_spkr_setfreq(herz);
|
||||
} else {
|
||||
/* disable counter 1 */
|
||||
ppi_spkr_off();
|
||||
|
@ -30,9 +30,4 @@
|
||||
|
||||
#include <i386/clock.h>
|
||||
|
||||
#ifdef _KERNEL
|
||||
int acquire_timer1(int);
|
||||
int release_timer1(void);
|
||||
#endif
|
||||
|
||||
#endif /* _PC98_INCLUDE_CLOCK_H_ */
|
||||
|
@ -49,17 +49,6 @@
|
||||
#define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2 * 2)
|
||||
#define TIMER_MODE (IO_TIMER1 + TIMER_REG_MODE * 2)
|
||||
|
||||
#define timer_spkr_acquire() \
|
||||
acquire_timer1(TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT)
|
||||
#define timer_spkr_release() \
|
||||
release_timer1()
|
||||
|
||||
#define spkr_set_pitch(pitch) \
|
||||
do { \
|
||||
outb(TIMER_CNTR1, (pitch) & 0xff); \
|
||||
outb(TIMER_CNTR1, (pitch) >> 8); \
|
||||
} while(0)
|
||||
|
||||
#endif /* _KERNEL */
|
||||
|
||||
#endif /* _MACHINE_TIMERREG_H_ */
|
||||
|
@ -306,13 +306,3 @@ void
|
||||
cpu_stopprofclock(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX Needed by syscons
|
||||
*/
|
||||
int
|
||||
sysbeep(int pitch, int period)
|
||||
{
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
@ -264,13 +264,3 @@ cpu_stopprofclock(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX Needed by syscons
|
||||
*/
|
||||
int
|
||||
sysbeep(int pitch, int period)
|
||||
{
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
@ -13,10 +13,6 @@
|
||||
|
||||
struct trapframe;
|
||||
|
||||
int sysbeep(int pitch, int period);
|
||||
int acquire_timer2(int mode);
|
||||
int release_timer2(void);
|
||||
|
||||
void decr_intr(struct trapframe *);
|
||||
|
||||
#endif
|
||||
|
@ -33,6 +33,4 @@ extern u_long tick_increment;
|
||||
extern u_long tick_freq;
|
||||
extern u_long tick_MHz;
|
||||
|
||||
int sysbeep(int, int);
|
||||
|
||||
#endif /* !_MACHINE_CLOCK_H_ */
|
||||
|
@ -56,12 +56,3 @@ void
|
||||
cpu_stopprofclock(void)
|
||||
{
|
||||
}
|
||||
|
||||
int
|
||||
sysbeep(int pitch, int period)
|
||||
{
|
||||
/*
|
||||
* XXX: function exists to enable RAID drivers to compile at the moment.
|
||||
*/
|
||||
return (0);
|
||||
}
|
||||
|
@ -36,6 +36,4 @@ extern u_long tick_MHz;
|
||||
extern int adjkerntz;
|
||||
extern int wall_cmos_clock;
|
||||
|
||||
int sysbeep(int, int);
|
||||
|
||||
#endif /* !_MACHINE_CLOCK_H_ */
|
||||
|
@ -212,6 +212,8 @@ u_long casuword(volatile u_long *p, u_long oldval, u_long newval);
|
||||
|
||||
void realitexpire(void *);
|
||||
|
||||
int sysbeep(int hertz, int period);
|
||||
|
||||
/*
|
||||
* Cyclic clock function type definition used to hook the cyclic
|
||||
* subsystem into the appropriate timer interrupt.
|
||||
|
Loading…
Reference in New Issue
Block a user