From e5295c24877f52920b611a77c90004bf80aa39aa Mon Sep 17 00:00:00 2001
From: "Jayachandran C." <jchandra@FreeBSD.org>
Date: Thu, 12 Aug 2010 11:00:45 +0000
Subject: [PATCH] SMP support in n64.

- Enable KX and UX bits on CPU startup for non-boot CPUs
- Keep the KX bit when in userspace - XTLB handler needs it to access
  PCPU data
- revert r210638 partly - we don't need to enable KX on kernel entry
  now

Reviewed by:	jmallett, imp
---
 sys/mips/mips/exception.S  | 16 ++--------------
 sys/mips/mips/mpboot.S     |  7 ++++++-
 sys/mips/mips/pm_machdep.c |  2 +-
 sys/mips/mips/vm_machdep.c |  2 +-
 4 files changed, 10 insertions(+), 17 deletions(-)

diff --git a/sys/mips/mips/exception.S b/sys/mips/mips/exception.S
index 0d8af549ecb3..f56d6091026c 100644
--- a/sys/mips/mips/exception.S
+++ b/sys/mips/mips/exception.S
@@ -434,12 +434,6 @@ NNON_LEAF(MipsUserGenException, CALLFRAME_SIZ, ra)
 /*
  * Save all of the registers except for the kernel temporaries in u.u_pcb.
  */
-	mfc0	k0, MIPS_COP_0_STATUS
-	HAZARD_DELAY
-#ifdef __mips_n64
-	ori	k1, k0, MIPS_SR_KX
-	mtc0	k1, MIPS_COP_0_STATUS
-#endif
 	GET_CPU_PCPU(k1)
 	PTR_L	k1, PC_CURPCB(k1)
 	SAVE_U_PCB_REG(AT, AST, k1)
@@ -457,7 +451,7 @@ NNON_LEAF(MipsUserGenException, CALLFRAME_SIZ, ra)
 	SAVE_U_PCB_REG(t2, T2, k1)
 	SAVE_U_PCB_REG(t3, T3, k1)
 	SAVE_U_PCB_REG(ta0, TA0, k1)
-	move	a0, k0				# First arg is the status reg.
+	mfc0	a0, MIPS_COP_0_STATUS		# First arg is the status reg.
 	SAVE_U_PCB_REG(ta1, TA1, k1)
 	SAVE_U_PCB_REG(ta2, TA2, k1)
 	SAVE_U_PCB_REG(ta3, TA3, k1)
@@ -656,12 +650,6 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, ra)
  * Save the relevant user registers into the u.u_pcb struct.
  * We don't need to save s0 - s8 because the compiler does it for us.
  */
-	mfc0	k0, MIPS_COP_0_STATUS
-	HAZARD_DELAY
-#ifdef __mips_n64
-	ori	k1, k0, MIPS_SR_KX
-	mtc0	k1, MIPS_COP_0_STATUS
-#endif
 	GET_CPU_PCPU(k1)
 	PTR_L	k1, PC_CURPCB(k1)
 	SAVE_U_PCB_REG(AT, AST, k1)
@@ -700,7 +688,7 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, ra)
 
 	mflo	v0			# get lo/hi late to avoid stall
 	mfhi	v1
-	move	a0, k0
+	mfc0	a0, MIPS_COP_0_STATUS
 	mfc0	a1, MIPS_COP_0_CAUSE
 	MFC0	a3, MIPS_COP_0_EXC_PC
 	SAVE_U_PCB_REG(v0, MULLO, k1)
diff --git a/sys/mips/mips/mpboot.S b/sys/mips/mips/mpboot.S
index 36fb2d397470..0c34fe2d10fa 100644
--- a/sys/mips/mips/mpboot.S
+++ b/sys/mips/mips/mpboot.S
@@ -36,7 +36,8 @@
 	.set	noat
 	.set	noreorder
 
-#ifdef CPU_CNMIPS
+/* XXX move this to a header file */
+#if defined(CPU_CNMIPS)
 #define CLEAR_STATUS \
 	mfc0    a0, MIPS_COP_0_STATUS   ;\
 	li      a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \
@@ -44,6 +45,10 @@
 	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | SR_KSU_USER | MIPS_SR_BEV) ; \
 	and     a0, a0, a2              ; \
         mtc0    a0, MIPS_COP_0_STATUS
+#elif defined(__mips_n64)
+#define CLEAR_STATUS \
+	li	a0, (MIPS_SR_KX | MIPS_SR_UX) ; \
+	mtc0	a0, MIPS_COP_0_STATUS
 #else
 #define CLEAR_STATUS \
 	mtc0	zero, MIPS_COP_0_STATUS
diff --git a/sys/mips/mips/pm_machdep.c b/sys/mips/mips/pm_machdep.c
index 36412ccf30e7..7e80e2f7634b 100644
--- a/sys/mips/mips/pm_machdep.c
+++ b/sys/mips/mips/pm_machdep.c
@@ -517,7 +517,7 @@ exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
 #if defined(__mips_n32) 
 	td->td_frame->sr |= MIPS_SR_PX;
 #elif  defined(__mips_n64)
-	td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX;
+	td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
 #endif
 #ifdef CPU_CNMIPS
 	td->td_frame->sr |= MIPS_SR_COP_2_BIT | MIPS_SR_PX | MIPS_SR_UX |
diff --git a/sys/mips/mips/vm_machdep.c b/sys/mips/mips/vm_machdep.c
index 9afba668b394..95c9c64a2b9b 100644
--- a/sys/mips/mips/vm_machdep.c
+++ b/sys/mips/mips/vm_machdep.c
@@ -419,7 +419,7 @@ cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
 #if defined(__mips_n32) 
 	td->td_frame->sr |= MIPS_SR_PX;
 #elif  defined(__mips_n64)
-	td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX;
+	td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
 #endif
 #ifdef CPU_CNMIPS
 	tf->sr |=  MIPS_SR_INT_IE | MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_UX |