gdtoa: Regenerate configuration headers for 32-bit arm.
These configuration headers were only guessed, but unfortunately not exactly correctly. Therefore, re-generate them on real HW. Generated on CA15, verified on CA9, CA7(with VFP lite) and on 32-bit ARMv9. PR: 272229 Reported by: Robert Clausecker <fuz@FreeBSD.org> MFC after: 2 weeks
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@ -1,16 +1,15 @@
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/*
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* MD header for contrib/gdtoa
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*
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* $FreeBSD$
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*/
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/*
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* NOTE: The definitions in this file must be correct or strtod(3) and
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* floating point formats in printf(3) will break! The file can be
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* generated by running contrib/gdtoa/arithchk.c on the target
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* architecture. See contrib/gdtoa/gdtoaimp.h for details.
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*
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* Generated on CA15, verified on CA9, CA7(with VFP lite) and on 32-bit ARMv9.
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*
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*/
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#define IEEE_8087
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#define Arith_Kind_ASL 1
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#define Sudden_Underflow
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#define Double_Align
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@ -4,20 +4,19 @@
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* This file can be generated by compiling and running contrib/gdtoa/qnan.c
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* on the target architecture after arith.h has been generated.
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*
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* XXX I don't have ARM hardware, so I just guessed. --das
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* Generated on CA15, verified on CA9, CA7(with VFP lite) and on 32-bit ARMv9.
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*
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* $FreeBSD$
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*/
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#define f_QNAN 0x7fc00000
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#define d_QNAN0 0x0
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#define d_QNAN1 0x7ff80000
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#define ld_QNAN0 0x0
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#define ld_QNAN1 0xc0000000
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#define ld_QNAN2 0x7fff
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#define ld_QNAN1 0x7ff80000
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#define ld_QNAN2 0x0
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#define ld_QNAN3 0x0
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#define ldus_QNAN0 0x0
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#define ldus_QNAN1 0x0
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#define ldus_QNAN2 0x0
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#define ldus_QNAN3 0xc000
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#define ldus_QNAN4 0x7fff
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#define ldus_QNAN3 0x7ff8
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#define ldus_QNAN4 0x0
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