Preemptively map MIPS INTRNG interrupts on non-FDT MIPS targets
This replaces a partial workaround introduced in r305527 that was incompatible with nested INTRNG interrupt controllers if not also using FDT. On non-FDT MIPS INTRNG targets, we now preemptively produce a set of fixed mappings for the MIPS IRQ range during nexus attach. On FDT targets, OFW_BUS_MAP_INTR() remains responsible for mapping the MIPS IRQs. Approved by: adrian (mentor) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12385
This commit is contained in:
Landon J. Fuller
parent
8ee789e9fa
commit
e60ff6a3b4
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=326043
@ -55,16 +55,23 @@
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#define NIRQ MIPS_NIRQ
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#endif
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#ifndef FDT
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#define MIPS_PIC_XREF 1 /**< unique xref */
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#endif
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#define INTR_IRQ_NSPC_SWI 4
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/* MIPS32 PIC APIs */
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int mips_pic_map_fixed_intrs(void);
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int mips_pic_activate_intr(device_t child, struct resource *r);
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int mips_pic_deactivate_intr(device_t child, struct resource *r);
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/* MIPS compatibility for legacy mips code */
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void cpu_init_interrupts(void);
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void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *,
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void *, int, int, void **);
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void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*),
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void *, int, int, void **);
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int cpu_create_intr_map(int);
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struct resource *cpu_get_irq_resource(int);
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/* MIPS interrupt C entry point */
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void cpu_intr(struct trapframe *);
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@ -2,8 +2,12 @@
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* Copyright (c) 2015 Alexander Kabaev
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* Copyright (c) 2006 Oleksandr Tymoshenko
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* Copyright (c) 2002-2004 Juli Mallett <jmallett@FreeBSD.org>
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* Copyright (c) 2017 The FreeBSD Foundation
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* All rights reserved.
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*
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* Portions of this software were developed by Landon Fuller
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* under sponsorship from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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@ -44,6 +48,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/cpuset.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/smp.h>
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@ -69,24 +74,56 @@ __FBSDID("$FreeBSD$");
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#define NSOFT_IRQS 2
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#define NREAL_IRQS (NHARD_IRQS + NSOFT_IRQS)
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static int mips_pic_intr(void *);
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struct mips_pic_softc;
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static int mips_pic_intr(void *);
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static struct mips_pic_intr *mips_pic_find_intr(struct resource *r);
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static int mips_pic_map_fixed_intr(u_int irq,
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struct mips_pic_intr **mapping);
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static void cpu_establish_intr(struct mips_pic_softc *sc,
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const char *name, driver_filter_t *filt,
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void (*handler)(void*), void *arg, int irq,
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int flags, void **cookiep);
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#define INTR_MAP_DATA_MIPS INTR_MAP_DATA_PLAT_1
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struct intr_map_data_mips_pic {
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struct intr_map_data hdr;
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u_int irq;
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};
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/**
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* MIPS interrupt state; available prior to MIPS PIC device attachment.
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*/
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static struct mips_pic_intr {
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u_int mips_irq; /**< MIPS IRQ# 0-7 */
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u_int intr_irq; /**< INTRNG IRQ#, or INTR_IRQ_INVALID if unmapped */
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u_int consumers; /**< INTRNG activation refcount */
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struct resource *res; /**< resource shared by all interrupt handlers registered via
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cpu_establish_hardintr() or cpu_establish_softintr(); NULL
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if no interrupt handlers are yet registered. */
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} mips_pic_intrs[] = {
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{ 0, INTR_IRQ_INVALID, 0, NULL },
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{ 1, INTR_IRQ_INVALID, 0, NULL },
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{ 2, INTR_IRQ_INVALID, 0, NULL },
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{ 3, INTR_IRQ_INVALID, 0, NULL },
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{ 4, INTR_IRQ_INVALID, 0, NULL },
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{ 5, INTR_IRQ_INVALID, 0, NULL },
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{ 6, INTR_IRQ_INVALID, 0, NULL },
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{ 7, INTR_IRQ_INVALID, 0, NULL },
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};
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struct mtx mips_pic_mtx;
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MTX_SYSINIT(mips_pic_mtx, &mips_pic_mtx, "mips intr controller mutex", MTX_DEF);
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struct mips_pic_irqsrc {
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struct intr_irqsrc isrc;
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struct resource *res;
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u_int irq;
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};
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struct mips_pic_softc {
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device_t pic_dev;
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struct mips_pic_irqsrc pic_irqs[NREAL_IRQS];
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struct rman pic_irq_rman;
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struct mtx mutex;
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uint32_t nirqs;
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};
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@ -145,7 +182,7 @@ pic_xref(device_t dev)
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#ifdef FDT
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return (OF_xref_from_node(ofw_bus_get_node(dev)));
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#else
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return (0);
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return (MIPS_PIC_XREF);
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#endif
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}
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@ -159,14 +196,7 @@ mips_pic_register_isrcs(struct mips_pic_softc *sc)
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for (irq = 0; irq < sc->nirqs; irq++) {
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sc->pic_irqs[irq].irq = irq;
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sc->pic_irqs[irq].res = rman_reserve_resource(&sc->pic_irq_rman,
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irq, irq, 1, RF_ACTIVE, sc->pic_dev);
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if (sc->pic_irqs[irq].res == NULL) {
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device_printf(sc->pic_dev,
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"%s failed to alloc resource for irq %u",
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__func__, irq);
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return (ENOMEM);
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}
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isrc = PIC_INTR_ISRC(sc, irq);
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if (irq < NSOFT_IRQS) {
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name = "sint";
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@ -203,21 +233,9 @@ mips_pic_attach(device_t dev)
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sc->pic_dev = dev;
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pic_sc = sc;
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/* Initialize mutex */
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mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN);
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/* Set the number of interrupts */
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sc->nirqs = nitems(sc->pic_irqs);
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/* Init the IRQ rman */
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sc->pic_irq_rman.rm_type = RMAN_ARRAY;
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sc->pic_irq_rman.rm_descr = "MIPS PIC IRQs";
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if (rman_init(&sc->pic_irq_rman) != 0 ||
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rman_manage_region(&sc->pic_irq_rman, 0, sc->nirqs - 1) != 0) {
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device_printf(dev, "failed to setup IRQ rman\n");
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goto cleanup;
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}
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/* Register the interrupts */
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if (mips_pic_register_isrcs(sc) != 0) {
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device_printf(dev, "could not register PIC ISRCs\n");
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@ -326,7 +344,7 @@ mips_pic_map_intr(device_t dev, struct intr_map_data *data,
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*isrcp = PIC_INTR_ISRC(sc, daf->cells[0]);
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} else
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#endif
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if (data->type == INTR_MAP_DATA_PLAT_1) {
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if (data->type == INTR_MAP_DATA_MIPS) {
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struct intr_map_data_mips_pic *mpd;
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mpd = (struct intr_map_data_mips_pic *)data;
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@ -396,73 +414,292 @@ EARLY_DRIVER_MODULE(cpupic, nexus, mips_pic_driver, mips_pic_devclass, 0, 0,
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BUS_PASS_INTERRUPT);
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#endif
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/**
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* Return the MIPS interrupt map entry for @p r, or NULL if no such entry has
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* been created.
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*/
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static struct mips_pic_intr *
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mips_pic_find_intr(struct resource *r)
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{
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struct mips_pic_intr *intr;
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rman_res_t irq;
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irq = rman_get_start(r);
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if (irq != rman_get_end(r) || rman_get_size(r) != 1)
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return (NULL);
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mtx_lock(&mips_pic_mtx);
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for (size_t i = 0; i < nitems(mips_pic_intrs); i++) {
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intr = &mips_pic_intrs[i];
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if (intr->intr_irq != irq)
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continue;
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mtx_unlock(&mips_pic_mtx);
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return (intr);
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}
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mtx_unlock(&mips_pic_mtx);
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/* Not found */
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return (NULL);
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}
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/**
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* Allocate a fixed IRQ mapping for the given MIPS @p irq, or return the
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* existing mapping if @p irq was previously mapped.
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*
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* @param irq The MIPS IRQ to be mapped.
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* @param[out] mapping On success, will be populated with the interrupt
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* mapping.
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*
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* @retval 0 success
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* @retval EINVAL if @p irq is not a valid MIPS IRQ#.
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* @retval non-zero If allocating the MIPS IRQ mapping otherwise fails, a
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* regular unix error code will be returned.
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*/
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static int
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mips_pic_map_fixed_intr(u_int irq, struct mips_pic_intr **mapping)
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{
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struct mips_pic_intr *intr;
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struct intr_map_data_mips_pic *data;
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device_t pic_dev;
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uintptr_t xref;
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if (irq < 0 || irq >= nitems(mips_pic_intrs))
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return (EINVAL);
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mtx_lock(&mips_pic_mtx);
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/* Fetch corresponding interrupt entry */
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intr = &mips_pic_intrs[irq];
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KASSERT(intr->mips_irq == irq,
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("intr %u found at index %u", intr->mips_irq, irq));
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/* Already mapped? */
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if (intr->intr_irq != INTR_IRQ_INVALID) {
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mtx_unlock(&mips_pic_mtx);
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*mapping = intr;
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return (0);
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}
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/* Map the interrupt */
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data = (struct intr_map_data_mips_pic *)intr_alloc_map_data(
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INTR_MAP_DATA_MIPS, sizeof(*data), M_WAITOK | M_ZERO);
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data->irq = intr->mips_irq;
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#ifdef FDT
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/* PIC must be attached on FDT devices */
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KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
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pic_dev = pic_sc->pic_dev;
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xref = pic_xref(pic_dev);
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#else /* !FDT */
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/* PIC has a fixed xref, and may not have been attached yet */
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pic_dev = NULL;
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if (pic_sc != NULL)
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pic_dev = pic_sc->pic_dev;
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xref = MIPS_PIC_XREF;
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#endif /* FDT */
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KASSERT(intr->intr_irq == INTR_IRQ_INVALID, ("duplicate map"));
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intr->intr_irq = intr_map_irq(pic_dev, xref, &data->hdr);
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*mapping = intr;
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mtx_unlock(&mips_pic_mtx);
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return (0);
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}
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/**
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*
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* Produce fixed IRQ mappings for all MIPS IRQs.
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*
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* Non-FDT/OFW MIPS targets do not provide an equivalent to OFW_BUS_MAP_INTR();
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* it is instead necessary to reserve INTRNG IRQ# 0-7 for use by MIPS device
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* drivers that assume INTRNG IRQs 0-7 are directly mapped to MIPS IRQs 0-7.
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*
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* XXX: There is no support in INTRNG for reserving a fixed IRQ range. However,
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* we should be called prior to any other interrupt mapping requests, and work
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* around this by iteratively allocating the required 0-7 MIP IRQ# range.
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*
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* @retval 0 success
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* @retval non-zero If allocating the MIPS IRQ mappings otherwise fails, a
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* regular unix error code will be returned.
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*/
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int
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mips_pic_map_fixed_intrs(void)
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{
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int error;
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for (u_int i = 0; i < nitems(mips_pic_intrs); i++) {
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struct mips_pic_intr *intr;
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if ((error = mips_pic_map_fixed_intr(i, &intr)))
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return (error);
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/* INTRNG IRQs 0-7 must be directly mapped to MIPS IRQs 0-7 */
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if (intr->intr_irq != intr->mips_irq) {
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panic("invalid IRQ mapping: %u->%u", intr->intr_irq,
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intr->mips_irq);
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}
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}
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return (0);
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}
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/**
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* If @p r references a MIPS interrupt mapped by the MIPS32 interrupt
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* controller, handle interrupt activation internally.
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*
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* Otherwise, delegate directly to intr_activate_irq().
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*/
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int
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mips_pic_activate_intr(device_t child, struct resource *r)
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{
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struct mips_pic_intr *intr;
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int error;
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/* Is this one of our shared MIPS interrupts? */
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if ((intr = mips_pic_find_intr(r)) == NULL) {
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/* Delegate to standard INTRNG activation */
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return (intr_activate_irq(child, r));
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}
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/* Bump consumer count and request activation if required */
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mtx_lock(&mips_pic_mtx);
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if (intr->consumers == UINT_MAX) {
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mtx_unlock(&mips_pic_mtx);
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return (ENOMEM);
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}
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if (intr->consumers == 0) {
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if ((error = intr_activate_irq(child, r))) {
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mtx_unlock(&mips_pic_mtx);
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return (error);
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}
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}
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intr->consumers++;
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mtx_unlock(&mips_pic_mtx);
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return (0);
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}
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/**
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* If @p r references a MIPS interrupt mapped by the MIPS32 interrupt
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* controller, handle interrupt deactivation internally.
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*
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* Otherwise, delegate directly to intr_deactivate_irq().
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*/
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int
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mips_pic_deactivate_intr(device_t child, struct resource *r)
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{
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struct mips_pic_intr *intr;
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int error;
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/* Is this one of our shared MIPS interrupts? */
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if ((intr = mips_pic_find_intr(r)) == NULL) {
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/* Delegate to standard INTRNG deactivation */
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return (intr_deactivate_irq(child, r));
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}
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/* Decrement consumer count and request deactivation if required */
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mtx_lock(&mips_pic_mtx);
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KASSERT(intr->consumers > 0, ("refcount overrelease"));
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if (intr->consumers == 1) {
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if ((error = intr_deactivate_irq(child, r))) {
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mtx_unlock(&mips_pic_mtx);
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return (error);
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}
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}
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intr->consumers--;
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mtx_unlock(&mips_pic_mtx);
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return (0);
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}
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void
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cpu_init_interrupts(void)
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{
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}
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int
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cpu_create_intr_map(int irq)
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/**
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* Provide backwards-compatible support for registering a MIPS interrupt handler
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* directly, without allocating a bus resource.
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*/
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static void
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cpu_establish_intr(struct mips_pic_softc *sc, const char *name,
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driver_filter_t *filt, void (*handler)(void*), void *arg, int irq,
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int flags, void **cookiep)
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{
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struct intr_map_data_mips_pic *mips_pic_data;
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intptr_t iparent;
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size_t len;
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u_int new_irq;
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struct mips_pic_intr *intr;
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struct resource *res;
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int rid;
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int error;
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len = sizeof(*mips_pic_data);
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iparent = pic_xref(pic_sc->pic_dev);
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rid = -1;
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/* Allocate mips_pic data and fill it in */
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mips_pic_data = (struct intr_map_data_mips_pic *)intr_alloc_map_data(
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INTR_MAP_DATA_PLAT_1, len, M_WAITOK | M_ZERO);
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mips_pic_data->irq = irq;
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/* Fetch (or create) a fixed mapping */
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if ((error = mips_pic_map_fixed_intr(irq, &intr)))
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panic("Unable to map IRQ %d: %d", irq, error);
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/* Get the new irq number */
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new_irq = intr_map_irq(pic_sc->pic_dev, iparent,
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(struct intr_map_data *)mips_pic_data);
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/* Fetch the backing resource, if any */
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mtx_lock(&mips_pic_mtx);
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res = intr->res;
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mtx_unlock(&mips_pic_mtx);
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/* Adjust the resource accordingly */
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rman_set_start(pic_sc->pic_irqs[irq].res, new_irq);
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rman_set_end(pic_sc->pic_irqs[irq].res, new_irq);
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/* Allocate our IRQ resource */
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if (res == NULL) {
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/* Optimistically perform resource allocation */
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rid = intr->intr_irq;
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res = bus_alloc_resource(sc->pic_dev, SYS_RES_IRQ, &rid,
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intr->intr_irq, intr->intr_irq, 1, RF_SHAREABLE|RF_ACTIVE);
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/* Activate the new irq */
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return (intr_activate_irq(pic_sc->pic_dev, pic_sc->pic_irqs[irq].res));
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}
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if (res != NULL) {
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/* Try to update intr->res */
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mtx_lock(&mips_pic_mtx);
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if (intr->res == NULL) {
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intr->res = res;
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}
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mtx_unlock(&mips_pic_mtx);
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struct resource *
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cpu_get_irq_resource(int irq)
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{
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/* If intr->res was updated concurrently, free our local
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* resource allocation */
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if (intr->res != res) {
|
||||
bus_release_resource(sc->pic_dev, SYS_RES_IRQ,
|
||||
rid, res);
|
||||
}
|
||||
} else {
|
||||
/* Maybe someone else allocated it? */
|
||||
mtx_lock(&mips_pic_mtx);
|
||||
res = intr->res;
|
||||
mtx_unlock(&mips_pic_mtx);
|
||||
}
|
||||
|
||||
if (res == NULL) {
|
||||
panic("Unable to allocate IRQ %d->%u resource", irq,
|
||||
intr->intr_irq);
|
||||
}
|
||||
}
|
||||
|
||||
KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
|
||||
|
||||
if (irq < 0 || irq >= pic_sc->nirqs)
|
||||
panic("%s called for unknown irq %d", __func__, irq);
|
||||
|
||||
return pic_sc->pic_irqs[irq].res;
|
||||
error = bus_setup_intr(sc->pic_dev, res, flags, filt, handler, arg,
|
||||
cookiep);
|
||||
if (error)
|
||||
panic("Unable to add IRQ %d handler: %d", irq, error);
|
||||
}
|
||||
|
||||
void
|
||||
cpu_establish_hardintr(const char *name, driver_filter_t *filt,
|
||||
void (*handler)(void*), void *arg, int irq, int flags, void **cookiep)
|
||||
{
|
||||
int res;
|
||||
KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
|
||||
|
||||
/*
|
||||
* We have 6 levels, but thats 0 - 5 (not including 6)
|
||||
*/
|
||||
if (irq < 0 || irq >= NHARD_IRQS)
|
||||
panic("%s called for unknown hard intr %d", __func__, irq);
|
||||
|
||||
KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
|
||||
|
||||
irq += NSOFT_IRQS;
|
||||
|
||||
res = cpu_create_intr_map(irq);
|
||||
if (res != 0) panic("Unable to create map for hard IRQ %d", irq);
|
||||
|
||||
res = intr_setup_irq(pic_sc->pic_dev, pic_sc->pic_irqs[irq].res, filt,
|
||||
handler, arg, flags, cookiep);
|
||||
if (res != 0) panic("Unable to add hard IRQ %d handler", irq);
|
||||
cpu_establish_intr(pic_sc, name, filt, handler, arg, irq+NSOFT_IRQS,
|
||||
flags, cookiep);
|
||||
}
|
||||
|
||||
void
|
||||
@ -470,18 +707,12 @@ cpu_establish_softintr(const char *name, driver_filter_t *filt,
|
||||
void (*handler)(void*), void *arg, int irq, int flags,
|
||||
void **cookiep)
|
||||
{
|
||||
int res;
|
||||
|
||||
if (irq < 0 || irq > NSOFT_IRQS)
|
||||
panic("%s called for unknown soft intr %d", __func__, irq);
|
||||
|
||||
KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
|
||||
|
||||
res = cpu_create_intr_map(irq);
|
||||
if (res != 0) panic("Unable to create map for soft IRQ %d", irq);
|
||||
if (irq < 0 || irq >= NSOFT_IRQS)
|
||||
panic("%s called for unknown soft intr %d", __func__, irq);
|
||||
|
||||
res = intr_setup_irq(pic_sc->pic_dev, pic_sc->pic_irqs[irq].res, filt,
|
||||
handler, arg, flags, cookiep);
|
||||
if (res != 0) panic("Unable to add soft IRQ %d handler", irq);
|
||||
cpu_establish_intr(pic_sc, name, filt, handler, arg, irq, flags,
|
||||
cookiep);
|
||||
}
|
||||
|
||||
|
||||
@ -76,7 +76,11 @@ __FBSDID("$FreeBSD$");
|
||||
#define dprintf(x, arg...)
|
||||
#endif /* NEXUS_DEBUG */
|
||||
|
||||
#define NUM_MIPS_IRQS 6
|
||||
#ifdef INTRNG
|
||||
#define NUM_MIPS_IRQS NIRQ /* Any INTRNG-mapped IRQ */
|
||||
#else
|
||||
#define NUM_MIPS_IRQS 6 /* HW IRQs only */
|
||||
#endif
|
||||
|
||||
static MALLOC_DEFINE(M_NEXUSDEV, "nexusdev", "Nexus device");
|
||||
|
||||
@ -200,6 +204,12 @@ nexus_probe(device_t dev)
|
||||
static int
|
||||
nexus_attach(device_t dev)
|
||||
{
|
||||
#if defined(INTRNG) && !defined(FDT)
|
||||
int error;
|
||||
|
||||
if ((error = mips_pic_map_fixed_intrs()))
|
||||
return (error);
|
||||
#endif
|
||||
|
||||
bus_generic_probe(dev);
|
||||
bus_enumerate_hinted_children(dev);
|
||||
@ -291,7 +301,7 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
||||
* and we know what the resources for this device are (ie. they aren't
|
||||
* maintained by a child bus), then work out the start/end values.
|
||||
*/
|
||||
if (isdefault) {
|
||||
if (!passthrough && isdefault) {
|
||||
rle = resource_list_find(&ndev->nx_resources, type, *rid);
|
||||
if (rle == NULL)
|
||||
return (NULL);
|
||||
@ -432,20 +442,11 @@ nexus_activate_resource(device_t bus, device_t child, int type, int rid,
|
||||
rman_set_bushandle(r, (bus_space_handle_t)(uintptr_t)vaddr);
|
||||
} else if (type == SYS_RES_IRQ) {
|
||||
#ifdef INTRNG
|
||||
#ifdef FDT
|
||||
err = intr_activate_irq(child, r);
|
||||
err = mips_pic_activate_intr(child, r);
|
||||
if (err != 0) {
|
||||
rman_deactivate_resource(r);
|
||||
return (err);
|
||||
}
|
||||
#else
|
||||
/*
|
||||
* INTRNG without FDT needs to have the interrupt properly
|
||||
* mapped first. cpu_create_intr_map() will do that and
|
||||
* call intr_activate_irq() at the end.
|
||||
*/
|
||||
cpu_create_intr_map(rman_get_start(r));
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -468,7 +469,7 @@ nexus_deactivate_resource(device_t bus, device_t child, int type, int rid,
|
||||
rman_set_bushandle(r, 0);
|
||||
} else if (type == SYS_RES_IRQ) {
|
||||
#ifdef INTRNG
|
||||
intr_deactivate_irq(child, r);
|
||||
mips_pic_deactivate_intr(child, r);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -480,12 +481,7 @@ nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
|
||||
driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
|
||||
{
|
||||
#ifdef INTRNG
|
||||
struct resource *r = res;
|
||||
|
||||
#ifndef FDT
|
||||
r = cpu_get_irq_resource(rman_get_start(r));
|
||||
#endif
|
||||
return (intr_setup_irq(child, r, filt, intr, arg, flags, cookiep));
|
||||
return (intr_setup_irq(child, res, filt, intr, arg, flags, cookiep));
|
||||
#else
|
||||
int irq;
|
||||
register_t s;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user