Add RDC Semiconductor R6040 10/100 PHY driver.
This commit is contained in:
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11535bdf04
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=216828
@ -1870,6 +1870,7 @@ device nsphy # NatSemi DP83840A
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device nsphyter # NatSemi DP83843/DP83815
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device pnaphy # HomePNA
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device qsphy # Quality Semiconductor QS6612
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device rdcphy # RDC Semiconductor R6040
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device rgephy # RealTek 8169S/8110S/8211B/8211C
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device rlphy # RealTek 8139
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device rlswitch # RealTek 8305
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@ -1324,6 +1324,7 @@ dev/mii/nsphy.c optional miibus | nsphy
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dev/mii/nsphyter.c optional miibus | nsphyter
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dev/mii/pnaphy.c optional miibus | pnaphy
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dev/mii/qsphy.c optional miibus | qsphy
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dev/mii/rdcphy.c optional miibus | rdcphy
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dev/mii/rgephy.c optional miibus | rgephy
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dev/mii/rlphy.c optional miibus | rlphy
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dev/mii/rlswitch.c optional rlswitch
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@ -59,6 +59,7 @@ oui JMICRON 0x001b8c JMicron Technologies
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oui LEVEL1 0x00207b Level 1
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oui NATSEMI 0x080017 National Semiconductor
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oui QUALSEMI 0x006051 Quality Semiconductor
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oui RDC 0x000bb4 RDC Semiconductor
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oui REALTEK 0x000020 RealTek Semicondctor
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oui SEEQ 0x00a07d Seeq
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oui SIS 0x00e006 Silicon Integrated Systems
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@ -213,6 +214,9 @@ model NATSEMI DP83865 0x0007 DP83865 10/100/1000 media interface
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/* Quality Semiconductor PHYs */
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model QUALSEMI QS6612 0x0000 QS6612 10/100 media interface
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/* RDC Semiconductor PHYs */
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model RDC R6040 0x0003 R6040 10/100 media interface
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/* RealTek Semiconductor PHYs */
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model REALTEK RTL8201L 0x0020 RTL8201L 10/100 media interface
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model xxREALTEK RTL8305SC 0x0005 RTL8305SC 10/100 802.1q switch
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267
sys/dev/mii/rdcphy.c
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267
sys/dev/mii/rdcphy.c
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@ -0,0 +1,267 @@
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/*-
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* Copyright (c) 2010, Pyun YongHyeon <yongari@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for the RDC Semiconductor R6040 10/100 PHY.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/socket.h>
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#include <sys/bus.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "miidevs.h"
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#include <dev/mii/rdcphyreg.h>
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#include "miibus_if.h"
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static device_probe_t rdcphy_probe;
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static device_attach_t rdcphy_attach;
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struct rdcphy_softc {
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struct mii_softc mii_sc;
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int mii_model;
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int mii_link_tick;
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#define RDCPHY_MANNEG_TICK 3
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};
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static device_method_t rdcphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, rdcphy_probe),
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DEVMETHOD(device_attach, rdcphy_attach),
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DEVMETHOD(device_detach, mii_phy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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KOBJMETHOD_END
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};
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static devclass_t rdcphy_devclass;
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static driver_t rdcphy_driver = {
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"rdcphy",
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rdcphy_methods,
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sizeof(struct rdcphy_softc)
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};
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DRIVER_MODULE(rdcphy, miibus, rdcphy_driver, rdcphy_devclass, 0, 0);
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static int rdcphy_service(struct mii_softc *, struct mii_data *, int);
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static void rdcphy_status(struct mii_softc *);
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static const struct mii_phydesc rdcphys[] = {
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MII_PHY_DESC(RDC, R6040),
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MII_PHY_END
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};
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static int
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rdcphy_probe(device_t dev)
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{
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return (mii_phy_dev_probe(dev, rdcphys, BUS_PROBE_DEFAULT));
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}
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static int
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rdcphy_attach(device_t dev)
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{
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struct rdcphy_softc *rsc;
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struct mii_softc *sc;
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struct mii_attach_args *ma;
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struct mii_data *mii;
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rsc = device_get_softc(dev);
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sc = &rsc->mii_sc;
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ma = device_get_ivars(dev);
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sc->mii_dev = device_get_parent(dev);
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mii = ma->mii_data;
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LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
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sc->mii_flags = miibus_get_flags(dev);
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sc->mii_inst = mii->mii_instance++;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_service = rdcphy_service;
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sc->mii_pdata = mii;
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rsc->mii_model = MII_MODEL(ma->mii_id2);
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if (bootverbose)
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device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n",
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MII_OUI(ma->mii_id1, ma->mii_id2), MII_MODEL(ma->mii_id2),
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MII_REV(ma->mii_id2));
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mii_phy_reset(sc);
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sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
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if (sc->mii_capabilities & BMSR_EXTSTAT)
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sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
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device_printf(dev, " ");
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mii_phy_add_media(sc);
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printf("\n");
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MIIBUS_MEDIAINIT(sc->mii_dev);
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return (0);
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}
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static int
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rdcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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struct rdcphy_softc *rsc;
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struct ifmedia_entry *ife;
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rsc = (struct rdcphy_softc *)sc;
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ife = mii->mii_media.ifm_cur;
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switch (cmd) {
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case MII_POLLSTAT:
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break;
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case MII_MEDIACHG:
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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mii_phy_setmedia(sc);
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switch (IFM_SUBTYPE(ife->ifm_media)) {
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case IFM_100_TX:
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case IFM_10_T:
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/*
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* Report fake lost link event to parent
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* driver. This will stop MAC of parent
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* driver and make it possible to reconfigure
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* MAC after completion of link establishment.
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* Note, the parent MAC seems to require
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* restarting MAC when underlying any PHY
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* configuration was changed even if the
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* resolved speed/duplex was not changed at
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* all.
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*/
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mii->mii_media_status = 0;
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mii->mii_media_active = IFM_ETHER | IFM_NONE;
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rsc->mii_link_tick = RDCPHY_MANNEG_TICK;
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/* Immediately report link down. */
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mii_phy_update(sc, MII_MEDIACHG);
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return (0);
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default:
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break;
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}
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break;
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case MII_TICK:
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if (mii_phy_tick(sc) == EJUSTRETURN)
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return (0);
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
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/*
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* It seems the PHY hardware does not correctly
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* report link status changes when manual link
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* configuration is in progress. It is also
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* possible for the PHY to complete establishing
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* a link within one second such that mii(4)
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* did not notice the link change. To workaround
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* the issue, emulate lost link event and wait
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* for 3 seconds when manual link configuration
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* is in progress. 3 seconds would be long
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* enough to absorb transient link flips.
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*/
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if (rsc->mii_link_tick > 0) {
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rsc->mii_link_tick--;
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return (0);
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}
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}
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break;
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}
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/* Update the media status. */
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rdcphy_status(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return (0);
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}
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static void
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rdcphy_status(struct mii_softc *sc)
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{
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struct mii_data *mii;
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struct ifmedia_entry *ife;
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int bmsr, bmcr, physts;
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mii = sc->mii_pdata;
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ife = mii->mii_media.ifm_cur;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
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physts = PHY_READ(sc, MII_RDCPHY_STATUS);
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if ((physts & STATUS_LINK_UP) != 0)
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mii->mii_media_status |= IFM_ACTIVE;
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bmcr = PHY_READ(sc, MII_BMCR);
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if ((bmcr & BMCR_ISO) != 0) {
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mii->mii_media_active |= IFM_NONE;
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mii->mii_media_status = 0;
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return;
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}
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if ((bmcr & BMCR_LOOP) != 0)
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mii->mii_media_active |= IFM_LOOP;
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if ((bmcr & BMCR_AUTOEN) != 0) {
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if ((bmsr & BMSR_ACOMP) == 0) {
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/* Erg, still trying, I guess... */
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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}
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switch (physts & STATUS_SPEED_MASK) {
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case STATUS_SPEED_100:
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mii->mii_media_active |= IFM_100_TX;
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break;
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case STATUS_SPEED_10:
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mii->mii_media_active |= IFM_10_T;
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break;
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default:
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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if ((physts & STATUS_FULL_DUPLEX) != 0)
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mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
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else
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mii->mii_media_active |= IFM_HDX;
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}
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73
sys/dev/mii/rdcphyreg.h
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73
sys/dev/mii/rdcphyreg.h
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@ -0,0 +1,73 @@
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/*-
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* Copyright (c) 2010, Pyun YongHyeon <yongari@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_MII_RDCPHYREG_H_
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#define _DEV_MII_RDCPHYREG_H_
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#define MII_RDCPHY_DEBUG 0x11
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#define DEBUG_JABBER_DIS 0x0040
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#define DEBUG_LOOP_BACK_10MBPS 0x0400
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#define MII_RDCPHY_CTRL 0x14
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#define CTRL_SQE_ENB 0x0100
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#define CTRL_NEG_POLARITY 0x0400
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#define CTRL_AUTO_POLARITY 0x0800
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#define CTRL_MDIXSEL_RX 0x2000
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#define CTRL_MDIXSEL_TX 0x4000
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#define CTRL_AUTO_MDIX_DIS 0x8000
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#define MII_RDCPHY_CTRL2 0x15
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#define CTRL2_LED_DUPLEX 0x0000
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#define CTRL2_LED_DUPLEX_COL 0x0008
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#define CTRL2_LED_ACT 0x0010
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#define CTRL2_LED_SPEED_ACT 0x0018
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#define CTRL2_LED_BLK_100MBPS_DIS 0x0020
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#define CTRL2_LED_BLK_10MBPS_DIS 0x0040
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#define CTRL2_LED_BLK_LINK_ACT_DIS 0x0080
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#define CTRL2_SDT_THRESH_MASK 0x3E00
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#define CTRL2_TIMING_ERR_SEL 0x4000
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#define CTRL2_LED_BLK_80MS 0x8000
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#define CTRL2_LED_BLK_160MS 0x0000
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#define CTRL2_LED_MASK 0x0018
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#define MII_RDCPHY_STATUS 0x16
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#define STATUS_AUTO_MDIX_RX 0x0200
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#define STATUS_AUTO_MDIX_TX 0x0400
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#define STATUS_NEG_POLARITY 0x0800
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#define STATUS_FULL_DUPLEX 0x1000
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#define STATUS_SPEED_10 0x0000
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#define STATUS_SPEED_100 0x2000
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#define STATUS_SPEED_MASK 0x6000
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#define STATUS_LINK_UP 0x8000
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/* Analog test register 2 */
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#define MII_RDCPHY_TEST2 0x1A
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#define TEST2_PWR_DOWN 0x0200
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#endif /* _DEV_MII_RDCPHYREG_H_ */
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@ -8,8 +8,8 @@ SRCS+= ciphy.c device_if.h
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SRCS+= e1000phy.c exphy.c gentbi.c icsphy.c inphy.c ip1000phy.c jmphy.c
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SRCS+= lxtphy.c miibus_if.c miibus_if.h mii.c miidevs.h mii_physubr.c
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SRCS+= mlphy.c nsgphy.c nsphy.c nsphyter.c pci_if.h pnaphy.c qsphy.c
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SRCS+= rgephy.c rlphy.c ruephy.c tdkphy.c tlphy.c truephy.c ukphy.c
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SRCS+= ukphy_subr.c
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SRCS+= rdcphy.c rgephy.c rlphy.c ruephy.c tdkphy.c tlphy.c truephy.c
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SRCS+= ukphy.c ukphy_subr.c
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SRCS+= xmphy.c
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EXPORT_SYMS= mii_attach \
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