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Fix two of the extended memory hacks. The copy pages

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routine in one place was setting the valid2 bit to
2 not 1. This meant the PTE was NOT valid and so
you would crash.

In Zero Page there was a incorrect setting of
the valid bit AFTER the actual zero (opps)..

Hopefully this will fix the 0xc0000000 crashes
that I have been seeing (unless of course there are
other problems with these old hacks of mine to get
to memory above 512Meg)
This commit is contained in:
Randall Stewart 2010-01-28 14:09:16 +00:00
parent dcb38476b1
commit e7017e7b1a
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=203115
1 changed files with 2 additions and 2 deletions
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4
sys/mips/mips/pmap.c
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@ -2273,8 +2273,8 @@ pmap_zero_page(vm_page_t m)
PMAP_LGMEM_LOCK(sysm);
sched_pin();
sysm->CMAP1 = mips_paddr_to_tlbpfn(phys) | PTE_RW | PTE_V | PTE_G | PTE_W | PTE_CACHE;
pmap_TLB_update_kernel((vm_offset_t)sysm->CADDR1, sysm->CMAP1);
sysm->valid1 = 1;
pmap_TLB_update_kernel((vm_offset_t)sysm->CADDR1, sysm->CMAP1);
bzero(sysm->CADDR1, PAGE_SIZE);
pmap_TLB_invalidate_kernel((vm_offset_t)sysm->CADDR1);
sysm->CMAP1 = 0;
@ -2446,7 +2446,7 @@ pmap_copy_page(vm_page_t src, vm_page_t dst)
va_src = MIPS_PHYS_TO_CACHED(phy_src);
sysm->CMAP2 = mips_paddr_to_tlbpfn(phy_dst) | PTE_RW | PTE_V | PTE_G | PTE_W | PTE_CACHE;
pmap_TLB_update_kernel((vm_offset_t)sysm->CADDR2, sysm->CMAP2);
sysm->valid2 = 2;
sysm->valid2 = 1;
va_dst = (vm_offset_t)sysm->CADDR2;
} else if (phy_dst < MIPS_KSEG0_LARGEST_PHYS) {
/* one side needs mapping - src */