Made "AUTO_EOI_1" standard. auto-EOI on the master ICU is a documented
feature of the ICU. auto-EOI on the slave is not safe, however, so it remains an option. Killed religious FASTER_NOP when writing the ICU. Reviewed by: bde
This commit is contained in:
David Greenman
parent
44198d45b6
commit
e8636c6c19
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=12991
@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
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* $Id: isa.c,v 1.58 1995/12/07 12:46:01 davidg Exp $
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* $Id: isa.c,v 1.59 1995/12/19 14:30:48 davidg Exp $
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*/
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/*
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@ -560,11 +560,7 @@ isa_defaultirq()
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outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
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outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+1, 1); /* 8086 mode */
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#endif
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outb(IO_ICU1+1, 2 | 1); /* (master) auto EOI, 8086 mode */
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outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
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outb(IO_ICU1, 0x0a); /* default to IRR on read */
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outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
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@ -813,6 +809,8 @@ isa_strayintr(d)
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* testing that the in-service bit is _not_ set. The test
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* must be done before sending an EOI so it can't be done if
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* we are using AUTO_EOI_1.
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*
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* XXX AUTO_EOI_1 is now standard.
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*/
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if (intrcnt[NR_DEVICES + d] <= 5)
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log(LOG_ERR, "stray irq %d\n", d);
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: vector.s,v 1.13 1995/10/28 16:58:05 markm Exp $
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* $Id: vector.s,v 1.14 1995/11/04 16:00:56 markm Exp $
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*/
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#include <i386/isa/icu.h>
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@ -11,29 +11,15 @@
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#define IRQ_BIT(irq_num) (1 << ((irq_num) % 8))
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#define IRQ_BYTE(irq_num) ((irq_num) / 8)
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#ifdef AUTO_EOI_1
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#define ENABLE_ICU1 /* use auto-EOI to reduce i/o */
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#define OUTB_ICU1
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#else
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#define ENABLE_ICU1 \
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movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \
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OUTB_ICU1 /* ... to clear in service bit */
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#define OUTB_ICU1 \
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FASTER_NOP ; \
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outb %al,$IO_ICU1
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#endif
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#ifdef AUTO_EOI_2
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/*
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* The data sheet says no auto-EOI on slave, but it sometimes works.
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*/
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#define ENABLE_ICU1_AND_2 ENABLE_ICU1
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#define ENABLE_ICU2
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#else
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#define ENABLE_ICU1_AND_2 \
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movb $ICU_EOI,%al ; /* as above */ \
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FASTER_NOP ; \
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outb %al,$IO_ICU2 ; /* but do second icu first ... */ \
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OUTB_ICU1 /* ... then first icu (if !AUTO_EOI_1) */
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#define ENABLE_ICU2 \
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movb $ICU_EOI,%al ; \
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outb %al,$IO_ICU2 ;
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#endif
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#ifdef FAST_INTR_HANDLER_USES_ES
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@ -174,7 +160,6 @@ IDTVEC(intr/**/irq_num) ; \
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movb _imen + IRQ_BYTE(irq_num),%al ; \
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orb $IRQ_BIT(irq_num),%al ; \
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movb %al,_imen + IRQ_BYTE(irq_num) ; \
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FASTER_NOP ; \
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outb %al,$icu+1 ; \
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enable_icus ; \
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incl _cnt+V_INTR ; /* tally interrupts */ \
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@ -197,7 +182,6 @@ Xresume/**/irq_num: ; \
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movb _imen + IRQ_BYTE(irq_num),%al ; \
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andb $~IRQ_BIT(irq_num),%al ; \
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movb %al,_imen + IRQ_BYTE(irq_num) ; \
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FASTER_NOP ; \
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outb %al,$icu+1 ; \
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sti ; /* XXX _doreti repeats the cli/sti */ \
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/* Add this interrupt to the pool of entropy */ \
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@ -218,38 +202,38 @@ Xresume/**/irq_num: ; \
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iret
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MCOUNT_LABEL(bintr)
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FAST_INTR(0, ENABLE_ICU1)
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FAST_INTR(1, ENABLE_ICU1)
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FAST_INTR(2, ENABLE_ICU1)
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FAST_INTR(3, ENABLE_ICU1)
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FAST_INTR(4, ENABLE_ICU1)
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FAST_INTR(5, ENABLE_ICU1)
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FAST_INTR(6, ENABLE_ICU1)
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FAST_INTR(7, ENABLE_ICU1)
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FAST_INTR(8, ENABLE_ICU1_AND_2)
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FAST_INTR(9, ENABLE_ICU1_AND_2)
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FAST_INTR(10, ENABLE_ICU1_AND_2)
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FAST_INTR(11, ENABLE_ICU1_AND_2)
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FAST_INTR(12, ENABLE_ICU1_AND_2)
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FAST_INTR(13, ENABLE_ICU1_AND_2)
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FAST_INTR(14, ENABLE_ICU1_AND_2)
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FAST_INTR(15, ENABLE_ICU1_AND_2)
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INTR(0, IO_ICU1, ENABLE_ICU1, al)
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INTR(1, IO_ICU1, ENABLE_ICU1, al)
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INTR(2, IO_ICU1, ENABLE_ICU1, al)
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INTR(3, IO_ICU1, ENABLE_ICU1, al)
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INTR(4, IO_ICU1, ENABLE_ICU1, al)
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INTR(5, IO_ICU1, ENABLE_ICU1, al)
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INTR(6, IO_ICU1, ENABLE_ICU1, al)
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INTR(7, IO_ICU1, ENABLE_ICU1, al)
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INTR(8, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(9, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(10, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(11, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(12, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(13, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(14, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(15, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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FAST_INTR(0,)
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FAST_INTR(1,)
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FAST_INTR(2,)
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FAST_INTR(3,)
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FAST_INTR(4,)
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FAST_INTR(5,)
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FAST_INTR(6,)
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FAST_INTR(7,)
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FAST_INTR(8, ENABLE_ICU2)
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FAST_INTR(9, ENABLE_ICU2)
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FAST_INTR(10, ENABLE_ICU2)
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FAST_INTR(11, ENABLE_ICU2)
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FAST_INTR(12, ENABLE_ICU2)
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FAST_INTR(13, ENABLE_ICU2)
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FAST_INTR(14, ENABLE_ICU2)
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FAST_INTR(15, ENABLE_ICU2)
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INTR(0, IO_ICU1,, al)
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INTR(1, IO_ICU1,, al)
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INTR(2, IO_ICU1,, al)
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INTR(3, IO_ICU1,, al)
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INTR(4, IO_ICU1,, al)
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INTR(5, IO_ICU1,, al)
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INTR(6, IO_ICU1,, al)
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INTR(7, IO_ICU1,, al)
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INTR(8, IO_ICU2, ENABLE_ICU2, ah)
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INTR(9, IO_ICU2, ENABLE_ICU2, ah)
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INTR(10, IO_ICU2, ENABLE_ICU2, ah)
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INTR(11, IO_ICU2, ENABLE_ICU2, ah)
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INTR(12, IO_ICU2, ENABLE_ICU2, ah)
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INTR(13, IO_ICU2, ENABLE_ICU2, ah)
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INTR(14, IO_ICU2, ENABLE_ICU2, ah)
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INTR(15, IO_ICU2, ENABLE_ICU2, ah)
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MCOUNT_LABEL(eintr)
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.data
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: vector.s,v 1.13 1995/10/28 16:58:05 markm Exp $
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* $Id: vector.s,v 1.14 1995/11/04 16:00:56 markm Exp $
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*/
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#include <i386/isa/icu.h>
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@ -11,29 +11,15 @@
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#define IRQ_BIT(irq_num) (1 << ((irq_num) % 8))
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#define IRQ_BYTE(irq_num) ((irq_num) / 8)
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#ifdef AUTO_EOI_1
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#define ENABLE_ICU1 /* use auto-EOI to reduce i/o */
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#define OUTB_ICU1
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#else
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#define ENABLE_ICU1 \
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movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \
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OUTB_ICU1 /* ... to clear in service bit */
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#define OUTB_ICU1 \
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FASTER_NOP ; \
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outb %al,$IO_ICU1
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#endif
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#ifdef AUTO_EOI_2
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/*
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* The data sheet says no auto-EOI on slave, but it sometimes works.
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*/
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#define ENABLE_ICU1_AND_2 ENABLE_ICU1
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#define ENABLE_ICU2
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#else
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#define ENABLE_ICU1_AND_2 \
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movb $ICU_EOI,%al ; /* as above */ \
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FASTER_NOP ; \
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outb %al,$IO_ICU2 ; /* but do second icu first ... */ \
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OUTB_ICU1 /* ... then first icu (if !AUTO_EOI_1) */
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#define ENABLE_ICU2 \
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movb $ICU_EOI,%al ; \
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outb %al,$IO_ICU2 ;
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#endif
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#ifdef FAST_INTR_HANDLER_USES_ES
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@ -174,7 +160,6 @@ IDTVEC(intr/**/irq_num) ; \
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movb _imen + IRQ_BYTE(irq_num),%al ; \
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orb $IRQ_BIT(irq_num),%al ; \
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movb %al,_imen + IRQ_BYTE(irq_num) ; \
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FASTER_NOP ; \
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outb %al,$icu+1 ; \
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enable_icus ; \
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incl _cnt+V_INTR ; /* tally interrupts */ \
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@ -197,7 +182,6 @@ Xresume/**/irq_num: ; \
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movb _imen + IRQ_BYTE(irq_num),%al ; \
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andb $~IRQ_BIT(irq_num),%al ; \
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movb %al,_imen + IRQ_BYTE(irq_num) ; \
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FASTER_NOP ; \
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outb %al,$icu+1 ; \
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sti ; /* XXX _doreti repeats the cli/sti */ \
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/* Add this interrupt to the pool of entropy */ \
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@ -218,38 +202,38 @@ Xresume/**/irq_num: ; \
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iret
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MCOUNT_LABEL(bintr)
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FAST_INTR(0, ENABLE_ICU1)
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FAST_INTR(1, ENABLE_ICU1)
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FAST_INTR(2, ENABLE_ICU1)
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FAST_INTR(3, ENABLE_ICU1)
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FAST_INTR(4, ENABLE_ICU1)
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FAST_INTR(5, ENABLE_ICU1)
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FAST_INTR(6, ENABLE_ICU1)
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FAST_INTR(7, ENABLE_ICU1)
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FAST_INTR(8, ENABLE_ICU1_AND_2)
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FAST_INTR(9, ENABLE_ICU1_AND_2)
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FAST_INTR(10, ENABLE_ICU1_AND_2)
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FAST_INTR(11, ENABLE_ICU1_AND_2)
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FAST_INTR(12, ENABLE_ICU1_AND_2)
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FAST_INTR(13, ENABLE_ICU1_AND_2)
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FAST_INTR(14, ENABLE_ICU1_AND_2)
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FAST_INTR(15, ENABLE_ICU1_AND_2)
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INTR(0, IO_ICU1, ENABLE_ICU1, al)
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INTR(1, IO_ICU1, ENABLE_ICU1, al)
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INTR(2, IO_ICU1, ENABLE_ICU1, al)
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INTR(3, IO_ICU1, ENABLE_ICU1, al)
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INTR(4, IO_ICU1, ENABLE_ICU1, al)
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INTR(5, IO_ICU1, ENABLE_ICU1, al)
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INTR(6, IO_ICU1, ENABLE_ICU1, al)
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INTR(7, IO_ICU1, ENABLE_ICU1, al)
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INTR(8, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(9, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(10, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(11, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(12, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(13, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(14, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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INTR(15, IO_ICU2, ENABLE_ICU1_AND_2, ah)
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FAST_INTR(0,)
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FAST_INTR(1,)
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FAST_INTR(2,)
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FAST_INTR(3,)
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FAST_INTR(4,)
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FAST_INTR(5,)
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FAST_INTR(6,)
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FAST_INTR(7,)
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FAST_INTR(8, ENABLE_ICU2)
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FAST_INTR(9, ENABLE_ICU2)
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FAST_INTR(10, ENABLE_ICU2)
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FAST_INTR(11, ENABLE_ICU2)
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FAST_INTR(12, ENABLE_ICU2)
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FAST_INTR(13, ENABLE_ICU2)
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FAST_INTR(14, ENABLE_ICU2)
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FAST_INTR(15, ENABLE_ICU2)
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INTR(0, IO_ICU1,, al)
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INTR(1, IO_ICU1,, al)
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INTR(2, IO_ICU1,, al)
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INTR(3, IO_ICU1,, al)
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INTR(4, IO_ICU1,, al)
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INTR(5, IO_ICU1,, al)
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INTR(6, IO_ICU1,, al)
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INTR(7, IO_ICU1,, al)
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INTR(8, IO_ICU2, ENABLE_ICU2, ah)
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INTR(9, IO_ICU2, ENABLE_ICU2, ah)
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INTR(10, IO_ICU2, ENABLE_ICU2, ah)
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INTR(11, IO_ICU2, ENABLE_ICU2, ah)
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INTR(12, IO_ICU2, ENABLE_ICU2, ah)
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INTR(13, IO_ICU2, ENABLE_ICU2, ah)
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INTR(14, IO_ICU2, ENABLE_ICU2, ah)
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INTR(15, IO_ICU2, ENABLE_ICU2, ah)
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MCOUNT_LABEL(eintr)
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.data
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
|
||||
* $Id: isa.c,v 1.58 1995/12/07 12:46:01 davidg Exp $
|
||||
* $Id: isa.c,v 1.59 1995/12/19 14:30:48 davidg Exp $
|
||||
*/
|
||||
|
||||
/*
|
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@ -560,11 +560,7 @@ isa_defaultirq()
|
||||
outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
|
||||
outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
|
||||
outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
|
||||
#ifdef AUTO_EOI_1
|
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outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
|
||||
#else
|
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outb(IO_ICU1+1, 1); /* 8086 mode */
|
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#endif
|
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outb(IO_ICU1+1, 2 | 1); /* (master) auto EOI, 8086 mode */
|
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outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
|
||||
outb(IO_ICU1, 0x0a); /* default to IRR on read */
|
||||
outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
|
||||
@ -813,6 +809,8 @@ isa_strayintr(d)
|
||||
* testing that the in-service bit is _not_ set. The test
|
||||
* must be done before sending an EOI so it can't be done if
|
||||
* we are using AUTO_EOI_1.
|
||||
*
|
||||
* XXX AUTO_EOI_1 is now standard.
|
||||
*/
|
||||
if (intrcnt[NR_DEVICES + d] <= 5)
|
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log(LOG_ERR, "stray irq %d\n", d);
|
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|
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@ -1,6 +1,6 @@
|
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/*
|
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* from: vector.s, 386BSD 0.1 unknown origin
|
||||
* $Id: vector.s,v 1.13 1995/10/28 16:58:05 markm Exp $
|
||||
* $Id: vector.s,v 1.14 1995/11/04 16:00:56 markm Exp $
|
||||
*/
|
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|
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#include <i386/isa/icu.h>
|
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@ -11,29 +11,15 @@
|
||||
#define IRQ_BIT(irq_num) (1 << ((irq_num) % 8))
|
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#define IRQ_BYTE(irq_num) ((irq_num) / 8)
|
||||
|
||||
#ifdef AUTO_EOI_1
|
||||
#define ENABLE_ICU1 /* use auto-EOI to reduce i/o */
|
||||
#define OUTB_ICU1
|
||||
#else
|
||||
#define ENABLE_ICU1 \
|
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movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \
|
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OUTB_ICU1 /* ... to clear in service bit */
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#define OUTB_ICU1 \
|
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FASTER_NOP ; \
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outb %al,$IO_ICU1
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#endif
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|
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#ifdef AUTO_EOI_2
|
||||
/*
|
||||
* The data sheet says no auto-EOI on slave, but it sometimes works.
|
||||
*/
|
||||
#define ENABLE_ICU1_AND_2 ENABLE_ICU1
|
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#define ENABLE_ICU2
|
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#else
|
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#define ENABLE_ICU1_AND_2 \
|
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movb $ICU_EOI,%al ; /* as above */ \
|
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FASTER_NOP ; \
|
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outb %al,$IO_ICU2 ; /* but do second icu first ... */ \
|
||||
OUTB_ICU1 /* ... then first icu (if !AUTO_EOI_1) */
|
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#define ENABLE_ICU2 \
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movb $ICU_EOI,%al ; \
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outb %al,$IO_ICU2 ;
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#endif
|
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#ifdef FAST_INTR_HANDLER_USES_ES
|
||||
@ -174,7 +160,6 @@ IDTVEC(intr/**/irq_num) ; \
|
||||
movb _imen + IRQ_BYTE(irq_num),%al ; \
|
||||
orb $IRQ_BIT(irq_num),%al ; \
|
||||
movb %al,_imen + IRQ_BYTE(irq_num) ; \
|
||||
FASTER_NOP ; \
|
||||
outb %al,$icu+1 ; \
|
||||
enable_icus ; \
|
||||
incl _cnt+V_INTR ; /* tally interrupts */ \
|
||||
@ -197,7 +182,6 @@ Xresume/**/irq_num: ; \
|
||||
movb _imen + IRQ_BYTE(irq_num),%al ; \
|
||||
andb $~IRQ_BIT(irq_num),%al ; \
|
||||
movb %al,_imen + IRQ_BYTE(irq_num) ; \
|
||||
FASTER_NOP ; \
|
||||
outb %al,$icu+1 ; \
|
||||
sti ; /* XXX _doreti repeats the cli/sti */ \
|
||||
/* Add this interrupt to the pool of entropy */ \
|
||||
@ -218,38 +202,38 @@ Xresume/**/irq_num: ; \
|
||||
iret
|
||||
|
||||
MCOUNT_LABEL(bintr)
|
||||
FAST_INTR(0, ENABLE_ICU1)
|
||||
FAST_INTR(1, ENABLE_ICU1)
|
||||
FAST_INTR(2, ENABLE_ICU1)
|
||||
FAST_INTR(3, ENABLE_ICU1)
|
||||
FAST_INTR(4, ENABLE_ICU1)
|
||||
FAST_INTR(5, ENABLE_ICU1)
|
||||
FAST_INTR(6, ENABLE_ICU1)
|
||||
FAST_INTR(7, ENABLE_ICU1)
|
||||
FAST_INTR(8, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(9, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(10, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(11, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(12, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(13, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(14, ENABLE_ICU1_AND_2)
|
||||
FAST_INTR(15, ENABLE_ICU1_AND_2)
|
||||
INTR(0, IO_ICU1, ENABLE_ICU1, al)
|
||||
INTR(1, IO_ICU1, ENABLE_ICU1, al)
|
||||
INTR(2, IO_ICU1, ENABLE_ICU1, al)
|
||||
INTR(3, IO_ICU1, ENABLE_ICU1, al)
|
||||
INTR(4, IO_ICU1, ENABLE_ICU1, al)
|
||||
INTR(5, IO_ICU1, ENABLE_ICU1, al)
|
||||
INTR(6, IO_ICU1, ENABLE_ICU1, al)
|
||||
INTR(7, IO_ICU1, ENABLE_ICU1, al)
|
||||
INTR(8, IO_ICU2, ENABLE_ICU1_AND_2, ah)
|
||||
INTR(9, IO_ICU2, ENABLE_ICU1_AND_2, ah)
|
||||
INTR(10, IO_ICU2, ENABLE_ICU1_AND_2, ah)
|
||||
INTR(11, IO_ICU2, ENABLE_ICU1_AND_2, ah)
|
||||
INTR(12, IO_ICU2, ENABLE_ICU1_AND_2, ah)
|
||||
INTR(13, IO_ICU2, ENABLE_ICU1_AND_2, ah)
|
||||
INTR(14, IO_ICU2, ENABLE_ICU1_AND_2, ah)
|
||||
INTR(15, IO_ICU2, ENABLE_ICU1_AND_2, ah)
|
||||
FAST_INTR(0,)
|
||||
FAST_INTR(1,)
|
||||
FAST_INTR(2,)
|
||||
FAST_INTR(3,)
|
||||
FAST_INTR(4,)
|
||||
FAST_INTR(5,)
|
||||
FAST_INTR(6,)
|
||||
FAST_INTR(7,)
|
||||
FAST_INTR(8, ENABLE_ICU2)
|
||||
FAST_INTR(9, ENABLE_ICU2)
|
||||
FAST_INTR(10, ENABLE_ICU2)
|
||||
FAST_INTR(11, ENABLE_ICU2)
|
||||
FAST_INTR(12, ENABLE_ICU2)
|
||||
FAST_INTR(13, ENABLE_ICU2)
|
||||
FAST_INTR(14, ENABLE_ICU2)
|
||||
FAST_INTR(15, ENABLE_ICU2)
|
||||
INTR(0, IO_ICU1,, al)
|
||||
INTR(1, IO_ICU1,, al)
|
||||
INTR(2, IO_ICU1,, al)
|
||||
INTR(3, IO_ICU1,, al)
|
||||
INTR(4, IO_ICU1,, al)
|
||||
INTR(5, IO_ICU1,, al)
|
||||
INTR(6, IO_ICU1,, al)
|
||||
INTR(7, IO_ICU1,, al)
|
||||
INTR(8, IO_ICU2, ENABLE_ICU2, ah)
|
||||
INTR(9, IO_ICU2, ENABLE_ICU2, ah)
|
||||
INTR(10, IO_ICU2, ENABLE_ICU2, ah)
|
||||
INTR(11, IO_ICU2, ENABLE_ICU2, ah)
|
||||
INTR(12, IO_ICU2, ENABLE_ICU2, ah)
|
||||
INTR(13, IO_ICU2, ENABLE_ICU2, ah)
|
||||
INTR(14, IO_ICU2, ENABLE_ICU2, ah)
|
||||
INTR(15, IO_ICU2, ENABLE_ICU2, ah)
|
||||
MCOUNT_LABEL(eintr)
|
||||
|
||||
.data
|
||||
|
||||
Loading…
Reference in New Issue
Block a user