Make mips_postboot_fixup work when building the kernel with clang+lld
The compiler/linker can align fake_preload anyway it would like. When building the kernel with gcc+bfd this always happened to be a multiple of 8. When I built the kernel with clang and linked with lld fake_preload happened to only be aligned to 4 bytes which caused a an ADDRS trap because the compiler will emit sd instructions to store to this buffer. Reviewed By: jhb, imp Approved By: jhb (mentor) Differential Revision: https://reviews.freebsd.org/D14018
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=328932
@ -383,7 +383,11 @@ mips_vector_init(void)
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void
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mips_postboot_fixup(void)
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{
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static char fake_preload[256];
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/*
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* We store u_long sized objects into the reload area, so the array
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* must be so aligned. The standard allows any alignment for char data.
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*/
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static char fake_preload[256] _Alignas(_Alignof(u_long));
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caddr_t preload_ptr = (caddr_t)&fake_preload[0];
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size_t size = 0;
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