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Make mips_postboot_fixup work when building the kernel with clang+lld

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The compiler/linker can align fake_preload anyway it would like. When
building the kernel with gcc+bfd this always happened to be a multiple of 8.
When I built the kernel with clang and linked with lld fake_preload
happened to only be aligned to 4 bytes which caused a an ADDRS trap because
the compiler will emit sd instructions to store to this buffer.

Reviewed By:	jhb, imp
Approved By:	jhb (mentor)
Differential Revision: https://reviews.freebsd.org/D14018
This commit is contained in:
Alex Richardson 2018-02-06 15:41:15 +00:00
parent 52d7a78f17
commit e911aac76a
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=328932
1 changed files with 5 additions and 1 deletions
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6
sys/mips/mips/machdep.c
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@ -383,7 +383,11 @@ mips_vector_init(void)
void
mips_postboot_fixup(void)
{
static char fake_preload[256];
/*
* We store u_long sized objects into the reload area, so the array
* must be so aligned. The standard allows any alignment for char data.
*/
static char fake_preload[256] _Alignas(_Alignof(u_long));
caddr_t preload_ptr = (caddr_t)&fake_preload[0];
size_t size = 0;