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Enable use of the PCIe connected wifi on the DB120 (AR9344) board.

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The on-board NIC is an 3x3 AR9380 with 5GHz only.

* enable pci code in AR9344_BASE
* enable ath_pci and the firmware loading bits in DB120
* add in the relevant hints in DB120.hints to inform the probe/attach
  code where the PCIe fixup data is for the onboard chip.

This is only relevant for a default development board.  I also have a
DB120 with the on-board PCIe wifi NIC disabled and it's exposed as
a real PCIe slot (to put normal PCIe NICs in); the fixup code will need
to be disabled to make this work correctly.

Tested:

* DB120
This commit is contained in:
Adrian Chadd 2014-02-14 05:25:15 +00:00
parent 73a9ec2e15
commit e952166b53
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=261871
4 changed files with 20 additions and 0 deletions
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3
sys/mips/conf/AR934X_BASE
View File

@ -102,6 +102,9 @@ options USB_DEBUG
options USB_HOST_ALIGN=32 # AR71XX (MIPS in general?) requires this
device ehci
device pci
device ar724x_pci
device scbus
device umass
device da

4
sys/mips/conf/AR934X_BASE.hints
View File

@ -22,6 +22,10 @@ hint.ehci.0.maddr=0x1b000100
hint.ehci.0.msize=0x00001000
hint.ehci.0.irq=1
# pci
hint.pcib.0.at="nexus0"
hint.pcib.0.irq=0
hint.arge.0.at="nexus0"
hint.arge.0.maddr=0x19000000
hint.arge.0.msize=0x1000

6
sys/mips/conf/DB120
View File

@ -42,5 +42,11 @@ options GEOM_UNCOMPRESS
# Used for the static uboot partition map
device geom_map
# yes, this board has a PCI connected atheros device
device ath_pci
options AR71XX_ATH_EEPROM
device firmware # Used by the above
options ATH_EEPROM_FIRMWARE
# Boot off of the rootfs, as defined in the geom_map setup.
options ROOTDEVNAME=\"ufs:map/rootfs.uncompress\"

7
sys/mips/conf/DB120.hints
View File

@ -60,6 +60,13 @@ hint.ath.0.eepromsize=16384
# host registers on the NIC) and then we teach ath where
# to find it.
# ath1 hint - pcie slot 0
hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000
hint.pcib.0.bus.0.0.0.ath_fixup_size=16384
# ath0 - eeprom comes from here
hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
# flash layout:
#
# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)