Switch to using the TSC code in i386/i386/tsc.c.
This commit is contained in:
phk
parent
85caad2949
commit
ea4f5a71da
@ -138,9 +138,6 @@ int statclock_disable;
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#endif
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u_int timer_freq = TIMER_FREQ;
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int timer0_max_count;
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uint64_t tsc_freq;
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int tsc_is_broken;
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u_int tsc_present;
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int wall_cmos_clock; /* wall CMOS clock assumed if != 0 */
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struct mtx clock_lock;
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@ -173,17 +170,8 @@ static u_char timer2_state;
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static void (*timer_func)(struct clockframe *frame) = hardclock;
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static unsigned i8254_get_timecount(struct timecounter *tc);
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static unsigned tsc_get_timecount(struct timecounter *tc);
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static void set_timer_freq(u_int freq, int intr_freq);
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static struct timecounter tsc_timecounter = {
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tsc_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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~0u, /* counter_mask */
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0, /* frequency */
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"TSC" /* name */
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};
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static struct timecounter i8254_timecounter = {
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i8254_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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@ -592,7 +580,6 @@ readrtc(int port)
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static u_int
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calibrate_clocks(void)
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{
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u_int64_t old_tsc;
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u_int count, prev_count, tot_count;
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int sec, start_sec, timeout;
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@ -630,11 +617,6 @@ calibrate_clocks(void)
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goto fail;
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tot_count = 0;
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if (tsc_present)
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old_tsc = rdtsc();
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else
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old_tsc = 0; /* shut up gcc */
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/*
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* Wait for the mc146818A seconds counter to change. Read the i8254
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* counter for each iteration since this is convenient and only
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@ -663,16 +645,7 @@ calibrate_clocks(void)
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goto fail;
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}
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/*
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* Read the cpu cycle counter. The timing considerations are
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* similar to those for the i8254 clock.
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*/
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if (tsc_present)
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tsc_freq = rdtsc() - old_tsc;
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if (bootverbose) {
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if (tsc_present)
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printf("TSC clock: %ju Hz, ", (intmax_t)tsc_freq);
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printf("i8254 clock: %u Hz\n", tot_count);
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}
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return (tot_count);
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@ -747,11 +720,6 @@ startrtclock()
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{
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u_int delta, freq;
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if (cpu_feature & CPUID_TSC)
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tsc_present = 1;
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else
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tsc_present = 0;
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, RTCSB_24HR);
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@ -785,68 +753,13 @@ startrtclock()
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printf(
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"%d Hz differs from default of %d Hz by more than 1%%\n",
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freq, timer_freq);
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tsc_freq = 0;
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}
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set_timer_freq(timer_freq, hz);
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i8254_timecounter.tc_frequency = timer_freq;
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tc_init(&i8254_timecounter);
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#ifndef CLK_USE_TSC_CALIBRATION
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if (tsc_freq != 0) {
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if (bootverbose)
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printf(
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"CLK_USE_TSC_CALIBRATION not specified - using old calibration method\n");
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tsc_freq = 0;
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}
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#endif
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if (tsc_present && tsc_freq == 0) {
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/*
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* Calibration of the i586 clock relative to the mc146818A
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* clock failed. Do a less accurate calibration relative
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* to the i8254 clock.
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*/
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u_int64_t old_tsc = rdtsc();
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DELAY(1000000);
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tsc_freq = rdtsc() - old_tsc;
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#ifdef CLK_USE_TSC_CALIBRATION
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if (bootverbose)
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printf("TSC clock: %ju Hz (Method B)\n",
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(intmax_t)tsc_freq);
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#endif
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}
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#if !defined(SMP)
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/*
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* We can not use the TSC in SMP mode, until we figure out a
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* cheap (impossible), reliable and precise (yeah right!) way
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* to synchronize the TSCs of all the CPUs.
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* Curse Intel for leaving the counter out of the I/O APIC.
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*/
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/*
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* We can not use the TSC if we support APM. Precise timekeeping
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* on an APM'ed machine is at best a fools pursuit, since
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* any and all of the time spent in various SMM code can't
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* be reliably accounted for. Reading the RTC is your only
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* source of reliable time info. The i8254 looses too of course
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* but we need to have some kind of time...
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* We don't know at this point whether APM is going to be used
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* or not, nor when it might be activated. Play it safe.
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*/
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if (power_pm_get_type() == POWER_PM_TYPE_APM) {
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if (bootverbose)
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printf("TSC initialization skipped: APM enabled.\n");
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return;
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}
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if (tsc_present && tsc_freq != 0 && !tsc_is_broken) {
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tsc_timecounter.tc_frequency = tsc_freq;
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tc_init(&tsc_timecounter);
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}
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#endif /* !defined(SMP) */
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init_TSC();
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}
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/*
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@ -1218,26 +1131,6 @@ sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
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SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
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0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
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static int
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sysctl_machdep_tsc_freq(SYSCTL_HANDLER_ARGS)
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{
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int error;
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uint64_t freq;
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if (tsc_timecounter.tc_frequency == 0)
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return (EOPNOTSUPP);
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freq = tsc_freq;
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error = sysctl_handle_int(oidp, &freq, sizeof(freq), req);
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if (error == 0 && req->newptr != NULL) {
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tsc_freq = freq;
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tsc_timecounter.tc_frequency = tsc_freq;
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}
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return (error);
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}
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SYSCTL_PROC(_machdep, OID_AUTO, tsc_freq, CTLTYPE_QUAD | CTLFLAG_RW,
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0, sizeof(u_int), sysctl_machdep_tsc_freq, "IU", "");
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static unsigned
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i8254_get_timecount(struct timecounter *tc)
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{
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@ -1274,12 +1167,6 @@ i8254_get_timecount(struct timecounter *tc)
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return (count);
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}
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static unsigned
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tsc_get_timecount(struct timecounter *tc)
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{
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return (rdtsc());
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}
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#ifdef DEV_ISA
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/*
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* Attach to the ISA PnP descriptors for the timer and realtime clock.
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@ -231,6 +231,7 @@ i386/i386/pmap.c standard
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i386/i386/support.s standard
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i386/i386/swtch.s standard
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i386/i386/sys_machdep.c standard
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i386/i386/tsc.c standard
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i386/i386/trap.c standard
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i386/i386/vm86.c standard
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i386/i386/vm_machdep.c standard
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@ -138,9 +138,6 @@ int statclock_disable;
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#endif
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u_int timer_freq = TIMER_FREQ;
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int timer0_max_count;
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uint64_t tsc_freq;
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int tsc_is_broken;
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u_int tsc_present;
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int wall_cmos_clock; /* wall CMOS clock assumed if != 0 */
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struct mtx clock_lock;
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@ -173,17 +170,8 @@ static u_char timer2_state;
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static void (*timer_func)(struct clockframe *frame) = hardclock;
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static unsigned i8254_get_timecount(struct timecounter *tc);
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static unsigned tsc_get_timecount(struct timecounter *tc);
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static void set_timer_freq(u_int freq, int intr_freq);
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static struct timecounter tsc_timecounter = {
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tsc_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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~0u, /* counter_mask */
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0, /* frequency */
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"TSC" /* name */
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};
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static struct timecounter i8254_timecounter = {
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i8254_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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@ -592,7 +580,6 @@ readrtc(int port)
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static u_int
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calibrate_clocks(void)
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{
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u_int64_t old_tsc;
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u_int count, prev_count, tot_count;
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int sec, start_sec, timeout;
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@ -630,11 +617,6 @@ calibrate_clocks(void)
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goto fail;
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tot_count = 0;
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if (tsc_present)
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old_tsc = rdtsc();
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else
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old_tsc = 0; /* shut up gcc */
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/*
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* Wait for the mc146818A seconds counter to change. Read the i8254
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* counter for each iteration since this is convenient and only
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@ -663,16 +645,7 @@ calibrate_clocks(void)
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goto fail;
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}
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/*
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* Read the cpu cycle counter. The timing considerations are
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* similar to those for the i8254 clock.
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*/
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if (tsc_present)
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tsc_freq = rdtsc() - old_tsc;
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if (bootverbose) {
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if (tsc_present)
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printf("TSC clock: %ju Hz, ", (intmax_t)tsc_freq);
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printf("i8254 clock: %u Hz\n", tot_count);
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}
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return (tot_count);
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@ -747,11 +720,6 @@ startrtclock()
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{
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u_int delta, freq;
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if (cpu_feature & CPUID_TSC)
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tsc_present = 1;
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else
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tsc_present = 0;
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, RTCSB_24HR);
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@ -785,68 +753,13 @@ startrtclock()
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printf(
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"%d Hz differs from default of %d Hz by more than 1%%\n",
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freq, timer_freq);
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tsc_freq = 0;
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}
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set_timer_freq(timer_freq, hz);
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i8254_timecounter.tc_frequency = timer_freq;
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tc_init(&i8254_timecounter);
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#ifndef CLK_USE_TSC_CALIBRATION
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if (tsc_freq != 0) {
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if (bootverbose)
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printf(
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"CLK_USE_TSC_CALIBRATION not specified - using old calibration method\n");
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tsc_freq = 0;
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}
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#endif
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if (tsc_present && tsc_freq == 0) {
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/*
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* Calibration of the i586 clock relative to the mc146818A
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* clock failed. Do a less accurate calibration relative
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* to the i8254 clock.
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*/
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u_int64_t old_tsc = rdtsc();
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DELAY(1000000);
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tsc_freq = rdtsc() - old_tsc;
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#ifdef CLK_USE_TSC_CALIBRATION
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if (bootverbose)
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printf("TSC clock: %ju Hz (Method B)\n",
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(intmax_t)tsc_freq);
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#endif
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}
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#if !defined(SMP)
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/*
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* We can not use the TSC in SMP mode, until we figure out a
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* cheap (impossible), reliable and precise (yeah right!) way
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* to synchronize the TSCs of all the CPUs.
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* Curse Intel for leaving the counter out of the I/O APIC.
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*/
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/*
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* We can not use the TSC if we support APM. Precise timekeeping
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* on an APM'ed machine is at best a fools pursuit, since
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* any and all of the time spent in various SMM code can't
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* be reliably accounted for. Reading the RTC is your only
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* source of reliable time info. The i8254 looses too of course
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* but we need to have some kind of time...
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* We don't know at this point whether APM is going to be used
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* or not, nor when it might be activated. Play it safe.
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*/
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if (power_pm_get_type() == POWER_PM_TYPE_APM) {
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if (bootverbose)
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printf("TSC initialization skipped: APM enabled.\n");
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return;
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}
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if (tsc_present && tsc_freq != 0 && !tsc_is_broken) {
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tsc_timecounter.tc_frequency = tsc_freq;
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tc_init(&tsc_timecounter);
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}
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#endif /* !defined(SMP) */
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init_TSC();
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}
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/*
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@ -1218,26 +1131,6 @@ sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
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SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
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0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
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static int
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sysctl_machdep_tsc_freq(SYSCTL_HANDLER_ARGS)
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{
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int error;
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uint64_t freq;
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if (tsc_timecounter.tc_frequency == 0)
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return (EOPNOTSUPP);
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freq = tsc_freq;
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error = sysctl_handle_int(oidp, &freq, sizeof(freq), req);
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if (error == 0 && req->newptr != NULL) {
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tsc_freq = freq;
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tsc_timecounter.tc_frequency = tsc_freq;
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}
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return (error);
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}
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SYSCTL_PROC(_machdep, OID_AUTO, tsc_freq, CTLTYPE_QUAD | CTLFLAG_RW,
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0, sizeof(u_int), sysctl_machdep_tsc_freq, "IU", "");
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static unsigned
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i8254_get_timecount(struct timecounter *tc)
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{
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@ -1274,12 +1167,6 @@ i8254_get_timecount(struct timecounter *tc)
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return (count);
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}
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static unsigned
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tsc_get_timecount(struct timecounter *tc)
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{
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return (rdtsc());
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}
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#ifdef DEV_ISA
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/*
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* Attach to the ISA PnP descriptors for the timer and realtime clock.
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115
sys/isa/atrtc.c
115
sys/isa/atrtc.c
@ -138,9 +138,6 @@ int statclock_disable;
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#endif
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u_int timer_freq = TIMER_FREQ;
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int timer0_max_count;
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uint64_t tsc_freq;
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int tsc_is_broken;
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u_int tsc_present;
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int wall_cmos_clock; /* wall CMOS clock assumed if != 0 */
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struct mtx clock_lock;
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@ -173,17 +170,8 @@ static u_char timer2_state;
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static void (*timer_func)(struct clockframe *frame) = hardclock;
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static unsigned i8254_get_timecount(struct timecounter *tc);
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static unsigned tsc_get_timecount(struct timecounter *tc);
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static void set_timer_freq(u_int freq, int intr_freq);
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static struct timecounter tsc_timecounter = {
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tsc_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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~0u, /* counter_mask */
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0, /* frequency */
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"TSC" /* name */
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};
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static struct timecounter i8254_timecounter = {
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i8254_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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@ -592,7 +580,6 @@ readrtc(int port)
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static u_int
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calibrate_clocks(void)
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{
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u_int64_t old_tsc;
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u_int count, prev_count, tot_count;
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int sec, start_sec, timeout;
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@ -630,11 +617,6 @@ calibrate_clocks(void)
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goto fail;
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tot_count = 0;
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if (tsc_present)
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old_tsc = rdtsc();
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else
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old_tsc = 0; /* shut up gcc */
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/*
|
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* Wait for the mc146818A seconds counter to change. Read the i8254
|
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* counter for each iteration since this is convenient and only
|
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@ -663,16 +645,7 @@ calibrate_clocks(void)
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goto fail;
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}
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/*
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* Read the cpu cycle counter. The timing considerations are
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* similar to those for the i8254 clock.
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*/
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if (tsc_present)
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tsc_freq = rdtsc() - old_tsc;
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if (bootverbose) {
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if (tsc_present)
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printf("TSC clock: %ju Hz, ", (intmax_t)tsc_freq);
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printf("i8254 clock: %u Hz\n", tot_count);
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}
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return (tot_count);
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@ -747,11 +720,6 @@ startrtclock()
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{
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u_int delta, freq;
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if (cpu_feature & CPUID_TSC)
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tsc_present = 1;
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else
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tsc_present = 0;
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, RTCSB_24HR);
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@ -785,68 +753,13 @@ startrtclock()
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printf(
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"%d Hz differs from default of %d Hz by more than 1%%\n",
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freq, timer_freq);
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tsc_freq = 0;
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}
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set_timer_freq(timer_freq, hz);
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i8254_timecounter.tc_frequency = timer_freq;
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tc_init(&i8254_timecounter);
|
||||
|
||||
#ifndef CLK_USE_TSC_CALIBRATION
|
||||
if (tsc_freq != 0) {
|
||||
if (bootverbose)
|
||||
printf(
|
||||
"CLK_USE_TSC_CALIBRATION not specified - using old calibration method\n");
|
||||
tsc_freq = 0;
|
||||
}
|
||||
#endif
|
||||
if (tsc_present && tsc_freq == 0) {
|
||||
/*
|
||||
* Calibration of the i586 clock relative to the mc146818A
|
||||
* clock failed. Do a less accurate calibration relative
|
||||
* to the i8254 clock.
|
||||
*/
|
||||
u_int64_t old_tsc = rdtsc();
|
||||
|
||||
DELAY(1000000);
|
||||
tsc_freq = rdtsc() - old_tsc;
|
||||
#ifdef CLK_USE_TSC_CALIBRATION
|
||||
if (bootverbose)
|
||||
printf("TSC clock: %ju Hz (Method B)\n",
|
||||
(intmax_t)tsc_freq);
|
||||
#endif
|
||||
}
|
||||
|
||||
#if !defined(SMP)
|
||||
/*
|
||||
* We can not use the TSC in SMP mode, until we figure out a
|
||||
* cheap (impossible), reliable and precise (yeah right!) way
|
||||
* to synchronize the TSCs of all the CPUs.
|
||||
* Curse Intel for leaving the counter out of the I/O APIC.
|
||||
*/
|
||||
|
||||
/*
|
||||
* We can not use the TSC if we support APM. Precise timekeeping
|
||||
* on an APM'ed machine is at best a fools pursuit, since
|
||||
* any and all of the time spent in various SMM code can't
|
||||
* be reliably accounted for. Reading the RTC is your only
|
||||
* source of reliable time info. The i8254 looses too of course
|
||||
* but we need to have some kind of time...
|
||||
* We don't know at this point whether APM is going to be used
|
||||
* or not, nor when it might be activated. Play it safe.
|
||||
*/
|
||||
if (power_pm_get_type() == POWER_PM_TYPE_APM) {
|
||||
if (bootverbose)
|
||||
printf("TSC initialization skipped: APM enabled.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (tsc_present && tsc_freq != 0 && !tsc_is_broken) {
|
||||
tsc_timecounter.tc_frequency = tsc_freq;
|
||||
tc_init(&tsc_timecounter);
|
||||
}
|
||||
|
||||
#endif /* !defined(SMP) */
|
||||
init_TSC();
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1218,26 +1131,6 @@ sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
|
||||
SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
|
||||
0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
|
||||
|
||||
static int
|
||||
sysctl_machdep_tsc_freq(SYSCTL_HANDLER_ARGS)
|
||||
{
|
||||
int error;
|
||||
uint64_t freq;
|
||||
|
||||
if (tsc_timecounter.tc_frequency == 0)
|
||||
return (EOPNOTSUPP);
|
||||
freq = tsc_freq;
|
||||
error = sysctl_handle_int(oidp, &freq, sizeof(freq), req);
|
||||
if (error == 0 && req->newptr != NULL) {
|
||||
tsc_freq = freq;
|
||||
tsc_timecounter.tc_frequency = tsc_freq;
|
||||
}
|
||||
return (error);
|
||||
}
|
||||
|
||||
SYSCTL_PROC(_machdep, OID_AUTO, tsc_freq, CTLTYPE_QUAD | CTLFLAG_RW,
|
||||
0, sizeof(u_int), sysctl_machdep_tsc_freq, "IU", "");
|
||||
|
||||
static unsigned
|
||||
i8254_get_timecount(struct timecounter *tc)
|
||||
{
|
||||
@ -1274,12 +1167,6 @@ i8254_get_timecount(struct timecounter *tc)
|
||||
return (count);
|
||||
}
|
||||
|
||||
static unsigned
|
||||
tsc_get_timecount(struct timecounter *tc)
|
||||
{
|
||||
return (rdtsc());
|
||||
}
|
||||
|
||||
#ifdef DEV_ISA
|
||||
/*
|
||||
* Attach to the ISA PnP descriptors for the timer and realtime clock.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user