athk: import common code for ath1?k drivers
Import common ISC-licensed athk parts assumed to be based on Linux kvalo/ath.git master at 6bae9de622d3ef4805aba40e763eb4b0975c4f6d. The only modification should be for FreeBSD module handling in main.c. Add the module build framework unconnected to the build for now. These files will be shared by ath1?k drivers. MFC after: 2 months
This commit is contained in:
Bjoern A. Zeeb
parent
06a1103fe3
commit
ebacd8013f
335
sys/contrib/dev/athk/ath.h
Normal file
335
sys/contrib/dev/athk/ath.h
Normal file
@ -0,0 +1,335 @@
|
||||
/*
|
||||
* Copyright (c) 2008-2009 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef ATH_H
|
||||
#define ATH_H
|
||||
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/if_ether.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <net/mac80211.h>
|
||||
|
||||
/*
|
||||
* The key cache is used for h/w cipher state and also for
|
||||
* tracking station state such as the current tx antenna.
|
||||
* We also setup a mapping table between key cache slot indices
|
||||
* and station state to short-circuit node lookups on rx.
|
||||
* Different parts have different size key caches. We handle
|
||||
* up to ATH_KEYMAX entries (could dynamically allocate state).
|
||||
*/
|
||||
#define ATH_KEYMAX 128 /* max key cache size we handle */
|
||||
|
||||
struct ath_ani {
|
||||
bool caldone;
|
||||
unsigned int longcal_timer;
|
||||
unsigned int shortcal_timer;
|
||||
unsigned int resetcal_timer;
|
||||
unsigned int checkani_timer;
|
||||
struct timer_list timer;
|
||||
};
|
||||
|
||||
struct ath_cycle_counters {
|
||||
u32 cycles;
|
||||
u32 rx_busy;
|
||||
u32 rx_frame;
|
||||
u32 tx_frame;
|
||||
};
|
||||
|
||||
enum ath_device_state {
|
||||
ATH_HW_UNAVAILABLE,
|
||||
ATH_HW_INITIALIZED,
|
||||
};
|
||||
|
||||
enum ath_op_flags {
|
||||
ATH_OP_INVALID,
|
||||
ATH_OP_BEACONS,
|
||||
ATH_OP_ANI_RUN,
|
||||
ATH_OP_PRIM_STA_VIF,
|
||||
ATH_OP_HW_RESET,
|
||||
ATH_OP_SCANNING,
|
||||
ATH_OP_MULTI_CHANNEL,
|
||||
ATH_OP_WOW_ENABLED,
|
||||
};
|
||||
|
||||
enum ath_bus_type {
|
||||
ATH_PCI,
|
||||
ATH_AHB,
|
||||
ATH_USB,
|
||||
};
|
||||
|
||||
struct reg_dmn_pair_mapping {
|
||||
u16 reg_domain;
|
||||
u16 reg_5ghz_ctl;
|
||||
u16 reg_2ghz_ctl;
|
||||
};
|
||||
|
||||
struct ath_regulatory {
|
||||
char alpha2[2];
|
||||
enum nl80211_dfs_regions region;
|
||||
u16 country_code;
|
||||
u16 max_power_level;
|
||||
u16 current_rd;
|
||||
int16_t power_limit;
|
||||
struct reg_dmn_pair_mapping *regpair;
|
||||
};
|
||||
|
||||
enum ath_crypt_caps {
|
||||
ATH_CRYPT_CAP_CIPHER_AESCCM = BIT(0),
|
||||
ATH_CRYPT_CAP_MIC_COMBINED = BIT(1),
|
||||
};
|
||||
|
||||
struct ath_keyval {
|
||||
u8 kv_type;
|
||||
u8 kv_pad;
|
||||
u16 kv_len;
|
||||
u8 kv_val[16]; /* TK */
|
||||
u8 kv_mic[8]; /* Michael MIC key */
|
||||
u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware
|
||||
* supports both MIC keys in the same key cache entry;
|
||||
* in that case, kv_mic is the RX key) */
|
||||
};
|
||||
|
||||
enum ath_cipher {
|
||||
ATH_CIPHER_WEP = 0,
|
||||
ATH_CIPHER_AES_OCB = 1,
|
||||
ATH_CIPHER_AES_CCM = 2,
|
||||
ATH_CIPHER_CKIP = 3,
|
||||
ATH_CIPHER_TKIP = 4,
|
||||
ATH_CIPHER_CLR = 5,
|
||||
ATH_CIPHER_MIC = 127
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ath_ops - Register read/write operations
|
||||
*
|
||||
* @read: Register read
|
||||
* @multi_read: Multiple register read
|
||||
* @write: Register write
|
||||
* @enable_write_buffer: Enable multiple register writes
|
||||
* @write_flush: flush buffered register writes and disable buffering
|
||||
*/
|
||||
struct ath_ops {
|
||||
unsigned int (*read)(void *, u32 reg_offset);
|
||||
void (*multi_read)(void *, u32 *addr, u32 *val, u16 count);
|
||||
void (*write)(void *, u32 val, u32 reg_offset);
|
||||
void (*enable_write_buffer)(void *);
|
||||
void (*write_flush) (void *);
|
||||
u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr);
|
||||
void (*enable_rmw_buffer)(void *);
|
||||
void (*rmw_flush) (void *);
|
||||
|
||||
};
|
||||
|
||||
struct ath_common;
|
||||
struct ath_bus_ops;
|
||||
|
||||
struct ath_ps_ops {
|
||||
void (*wakeup)(struct ath_common *common);
|
||||
void (*restore)(struct ath_common *common);
|
||||
};
|
||||
|
||||
struct ath_common {
|
||||
void *ah;
|
||||
void *priv;
|
||||
struct ieee80211_hw *hw;
|
||||
int debug_mask;
|
||||
enum ath_device_state state;
|
||||
unsigned long op_flags;
|
||||
|
||||
struct ath_ani ani;
|
||||
|
||||
u16 cachelsz;
|
||||
u16 curaid;
|
||||
u8 macaddr[ETH_ALEN];
|
||||
u8 curbssid[ETH_ALEN] __aligned(2);
|
||||
u8 bssidmask[ETH_ALEN];
|
||||
|
||||
u32 rx_bufsize;
|
||||
|
||||
u32 keymax;
|
||||
DECLARE_BITMAP(keymap, ATH_KEYMAX);
|
||||
DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX);
|
||||
DECLARE_BITMAP(ccmp_keymap, ATH_KEYMAX);
|
||||
enum ath_crypt_caps crypt_caps;
|
||||
|
||||
unsigned int clockrate;
|
||||
|
||||
spinlock_t cc_lock;
|
||||
struct ath_cycle_counters cc_ani;
|
||||
struct ath_cycle_counters cc_survey;
|
||||
|
||||
struct ath_regulatory regulatory;
|
||||
struct ath_regulatory reg_world_copy;
|
||||
const struct ath_ops *ops;
|
||||
const struct ath_bus_ops *bus_ops;
|
||||
const struct ath_ps_ops *ps_ops;
|
||||
|
||||
bool btcoex_enabled;
|
||||
bool disable_ani;
|
||||
bool bt_ant_diversity;
|
||||
|
||||
int last_rssi;
|
||||
struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
|
||||
};
|
||||
|
||||
static inline const struct ath_ps_ops *ath_ps_ops(struct ath_common *common)
|
||||
{
|
||||
return common->ps_ops;
|
||||
}
|
||||
|
||||
struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
|
||||
u32 len,
|
||||
gfp_t gfp_mask);
|
||||
bool ath_is_mybeacon(struct ath_common *common, struct ieee80211_hdr *hdr);
|
||||
|
||||
void ath_hw_setbssidmask(struct ath_common *common);
|
||||
void ath_key_delete(struct ath_common *common, u8 hw_key_idx);
|
||||
int ath_key_config(struct ath_common *common,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta,
|
||||
struct ieee80211_key_conf *key);
|
||||
bool ath_hw_keyreset(struct ath_common *common, u16 entry);
|
||||
bool ath_hw_keysetmac(struct ath_common *common, u16 entry, const u8 *mac);
|
||||
void ath_hw_cycle_counters_update(struct ath_common *common);
|
||||
int32_t ath_hw_get_listen_time(struct ath_common *common);
|
||||
|
||||
__printf(3, 4)
|
||||
void ath_printk(const char *level, const struct ath_common *common,
|
||||
const char *fmt, ...);
|
||||
|
||||
#define ath_emerg(common, fmt, ...) \
|
||||
ath_printk(KERN_EMERG, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_alert(common, fmt, ...) \
|
||||
ath_printk(KERN_ALERT, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_crit(common, fmt, ...) \
|
||||
ath_printk(KERN_CRIT, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_err(common, fmt, ...) \
|
||||
ath_printk(KERN_ERR, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_warn(common, fmt, ...) \
|
||||
ath_printk(KERN_WARNING, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_notice(common, fmt, ...) \
|
||||
ath_printk(KERN_NOTICE, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_info(common, fmt, ...) \
|
||||
ath_printk(KERN_INFO, common, fmt, ##__VA_ARGS__)
|
||||
|
||||
/**
|
||||
* enum ath_debug_level - atheros wireless debug level
|
||||
*
|
||||
* @ATH_DBG_RESET: reset processing
|
||||
* @ATH_DBG_QUEUE: hardware queue management
|
||||
* @ATH_DBG_EEPROM: eeprom processing
|
||||
* @ATH_DBG_CALIBRATE: periodic calibration
|
||||
* @ATH_DBG_INTERRUPT: interrupt processing
|
||||
* @ATH_DBG_REGULATORY: regulatory processing
|
||||
* @ATH_DBG_ANI: adaptive noise immunitive processing
|
||||
* @ATH_DBG_XMIT: basic xmit operation
|
||||
* @ATH_DBG_BEACON: beacon handling
|
||||
* @ATH_DBG_CONFIG: configuration of the hardware
|
||||
* @ATH_DBG_FATAL: fatal errors, this is the default, DBG_DEFAULT
|
||||
* @ATH_DBG_PS: power save processing
|
||||
* @ATH_DBG_HWTIMER: hardware timer handling
|
||||
* @ATH_DBG_BTCOEX: bluetooth coexistance
|
||||
* @ATH_DBG_BSTUCK: stuck beacons
|
||||
* @ATH_DBG_MCI: Message Coexistence Interface, a private protocol
|
||||
* used exclusively for WLAN-BT coexistence starting from
|
||||
* AR9462.
|
||||
* @ATH_DBG_DFS: radar datection
|
||||
* @ATH_DBG_WOW: Wake on Wireless
|
||||
* @ATH_DBG_DYNACK: dynack handling
|
||||
* @ATH_DBG_SPECTRAL_SCAN: FFT spectral scan
|
||||
* @ATH_DBG_ANY: enable all debugging
|
||||
*
|
||||
* The debug level is used to control the amount and type of debugging output
|
||||
* we want to see. Each driver has its own method for enabling debugging and
|
||||
* modifying debug level states -- but this is typically done through a
|
||||
* module parameter 'debug' along with a respective 'debug' debugfs file
|
||||
* entry.
|
||||
*/
|
||||
enum ATH_DEBUG {
|
||||
ATH_DBG_RESET = 0x00000001,
|
||||
ATH_DBG_QUEUE = 0x00000002,
|
||||
ATH_DBG_EEPROM = 0x00000004,
|
||||
ATH_DBG_CALIBRATE = 0x00000008,
|
||||
ATH_DBG_INTERRUPT = 0x00000010,
|
||||
ATH_DBG_REGULATORY = 0x00000020,
|
||||
ATH_DBG_ANI = 0x00000040,
|
||||
ATH_DBG_XMIT = 0x00000080,
|
||||
ATH_DBG_BEACON = 0x00000100,
|
||||
ATH_DBG_CONFIG = 0x00000200,
|
||||
ATH_DBG_FATAL = 0x00000400,
|
||||
ATH_DBG_PS = 0x00000800,
|
||||
ATH_DBG_BTCOEX = 0x00001000,
|
||||
ATH_DBG_WMI = 0x00002000,
|
||||
ATH_DBG_BSTUCK = 0x00004000,
|
||||
ATH_DBG_MCI = 0x00008000,
|
||||
ATH_DBG_DFS = 0x00010000,
|
||||
ATH_DBG_WOW = 0x00020000,
|
||||
ATH_DBG_CHAN_CTX = 0x00040000,
|
||||
ATH_DBG_DYNACK = 0x00080000,
|
||||
ATH_DBG_SPECTRAL_SCAN = 0x00100000,
|
||||
ATH_DBG_ANY = 0xffffffff
|
||||
};
|
||||
|
||||
#define ATH_DBG_DEFAULT (ATH_DBG_FATAL)
|
||||
#define ATH_DBG_MAX_LEN 512
|
||||
|
||||
#ifdef CONFIG_ATH_DEBUG
|
||||
|
||||
#define ath_dbg(common, dbg_mask, fmt, ...) \
|
||||
do { \
|
||||
if ((common)->debug_mask & ATH_DBG_##dbg_mask) \
|
||||
ath_printk(KERN_DEBUG, common, fmt, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
#define ATH_DBG_WARN(foo, arg...) WARN(foo, arg)
|
||||
#define ATH_DBG_WARN_ON_ONCE(foo) WARN_ON_ONCE(foo)
|
||||
|
||||
#else
|
||||
|
||||
static inline __attribute__ ((format (printf, 3, 4)))
|
||||
void _ath_dbg(struct ath_common *common, enum ATH_DEBUG dbg_mask,
|
||||
const char *fmt, ...)
|
||||
{
|
||||
}
|
||||
#define ath_dbg(common, dbg_mask, fmt, ...) \
|
||||
_ath_dbg(common, ATH_DBG_##dbg_mask, fmt, ##__VA_ARGS__)
|
||||
|
||||
#define ATH_DBG_WARN(foo, arg...) do {} while (0)
|
||||
#define ATH_DBG_WARN_ON_ONCE(foo) ({ \
|
||||
int __ret_warn_once = !!(foo); \
|
||||
unlikely(__ret_warn_once); \
|
||||
})
|
||||
|
||||
#endif /* CONFIG_ATH_DEBUG */
|
||||
|
||||
/** Returns string describing opmode, or NULL if unknown mode. */
|
||||
#ifdef CONFIG_ATH_DEBUG
|
||||
const char *ath_opmode_to_string(enum nl80211_iftype opmode);
|
||||
#else
|
||||
static inline const char *ath_opmode_to_string(enum nl80211_iftype opmode)
|
||||
{
|
||||
return "UNKNOWN";
|
||||
}
|
||||
#endif
|
||||
|
||||
extern const char *ath_bus_type_strings[];
|
||||
static inline const char *ath_bus_type_to_string(enum ath_bus_type bustype)
|
||||
{
|
||||
return ath_bus_type_strings[bustype];
|
||||
}
|
||||
|
||||
#endif /* ATH_H */
|
||||
49
sys/contrib/dev/athk/debug.c
Normal file
49
sys/contrib/dev/athk/debug.c
Normal file
@ -0,0 +1,49 @@
|
||||
/*
|
||||
* Copyright (c) 2009 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/export.h>
|
||||
#include "ath.h"
|
||||
|
||||
const char *ath_opmode_to_string(enum nl80211_iftype opmode)
|
||||
{
|
||||
switch (opmode) {
|
||||
case NL80211_IFTYPE_UNSPECIFIED:
|
||||
return "UNSPEC";
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
return "ADHOC";
|
||||
case NL80211_IFTYPE_STATION:
|
||||
return "STATION";
|
||||
case NL80211_IFTYPE_AP:
|
||||
return "AP";
|
||||
case NL80211_IFTYPE_AP_VLAN:
|
||||
return "AP-VLAN";
|
||||
case NL80211_IFTYPE_WDS:
|
||||
return "WDS";
|
||||
case NL80211_IFTYPE_MONITOR:
|
||||
return "MONITOR";
|
||||
case NL80211_IFTYPE_MESH_POINT:
|
||||
return "MESH";
|
||||
case NL80211_IFTYPE_P2P_CLIENT:
|
||||
return "P2P-CLIENT";
|
||||
case NL80211_IFTYPE_P2P_GO:
|
||||
return "P2P-GO";
|
||||
case NL80211_IFTYPE_OCB:
|
||||
return "OCB";
|
||||
default:
|
||||
return "UNKNOWN";
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(ath_opmode_to_string);
|
||||
377
sys/contrib/dev/athk/dfs_pattern_detector.c
Normal file
377
sys/contrib/dev/athk/dfs_pattern_detector.c
Normal file
@ -0,0 +1,377 @@
|
||||
/*
|
||||
* Copyright (c) 2012 Neratec Solutions AG
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/slab.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#include "dfs_pattern_detector.h"
|
||||
#include "dfs_pri_detector.h"
|
||||
#include "ath.h"
|
||||
|
||||
/**
|
||||
* struct radar_types - contains array of patterns defined for one DFS domain
|
||||
* @region: regulatory DFS region
|
||||
* @num_radar_types: number of radar types to follow
|
||||
* @radar_types: radar types array
|
||||
*/
|
||||
struct radar_types {
|
||||
enum nl80211_dfs_regions region;
|
||||
u32 num_radar_types;
|
||||
const struct radar_detector_specs *radar_types;
|
||||
};
|
||||
|
||||
/* percentage on ppb threshold to trigger detection */
|
||||
#define MIN_PPB_THRESH 50
|
||||
#define PPB_THRESH_RATE(PPB, RATE) ((PPB * RATE + 100 - RATE) / 100)
|
||||
#define PPB_THRESH(PPB) PPB_THRESH_RATE(PPB, MIN_PPB_THRESH)
|
||||
#define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF)
|
||||
/* percentage of pulse width tolerance */
|
||||
#define WIDTH_TOLERANCE 5
|
||||
#define WIDTH_LOWER(X) ((X*(100-WIDTH_TOLERANCE)+50)/100)
|
||||
#define WIDTH_UPPER(X) ((X*(100+WIDTH_TOLERANCE)+50)/100)
|
||||
|
||||
#define ETSI_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB, CHIRP) \
|
||||
{ \
|
||||
ID, WIDTH_LOWER(WMIN), WIDTH_UPPER(WMAX), \
|
||||
(PRF2PRI(PMAX) - PRI_TOLERANCE), \
|
||||
(PRF2PRI(PMIN) * PRF + PRI_TOLERANCE), PRF, PPB * PRF, \
|
||||
PPB_THRESH(PPB), PRI_TOLERANCE, CHIRP \
|
||||
}
|
||||
|
||||
/* radar types as defined by ETSI EN-301-893 v1.5.1 */
|
||||
static const struct radar_detector_specs etsi_radar_ref_types_v15[] = {
|
||||
ETSI_PATTERN(0, 0, 1, 700, 700, 1, 18, false),
|
||||
ETSI_PATTERN(1, 0, 5, 200, 1000, 1, 10, false),
|
||||
ETSI_PATTERN(2, 0, 15, 200, 1600, 1, 15, false),
|
||||
ETSI_PATTERN(3, 0, 15, 2300, 4000, 1, 25, false),
|
||||
ETSI_PATTERN(4, 20, 30, 2000, 4000, 1, 20, false),
|
||||
ETSI_PATTERN(5, 0, 2, 300, 400, 3, 10, false),
|
||||
ETSI_PATTERN(6, 0, 2, 400, 1200, 3, 15, false),
|
||||
};
|
||||
|
||||
static const struct radar_types etsi_radar_types_v15 = {
|
||||
.region = NL80211_DFS_ETSI,
|
||||
.num_radar_types = ARRAY_SIZE(etsi_radar_ref_types_v15),
|
||||
.radar_types = etsi_radar_ref_types_v15,
|
||||
};
|
||||
|
||||
#define FCC_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB, CHIRP) \
|
||||
{ \
|
||||
ID, WIDTH_LOWER(WMIN), WIDTH_UPPER(WMAX), \
|
||||
PMIN - PRI_TOLERANCE, \
|
||||
PMAX * PRF + PRI_TOLERANCE, PRF, PPB * PRF, \
|
||||
PPB_THRESH(PPB), PRI_TOLERANCE, CHIRP \
|
||||
}
|
||||
|
||||
/* radar types released on August 14, 2014
|
||||
* type 1 PRI values randomly selected within the range of 518 and 3066.
|
||||
* divide it to 3 groups is good enough for both of radar detection and
|
||||
* avoiding false detection based on practical test results
|
||||
* collected for more than a year.
|
||||
*/
|
||||
static const struct radar_detector_specs fcc_radar_ref_types[] = {
|
||||
FCC_PATTERN(0, 0, 1, 1428, 1428, 1, 18, false),
|
||||
FCC_PATTERN(101, 0, 1, 518, 938, 1, 57, false),
|
||||
FCC_PATTERN(102, 0, 1, 938, 2000, 1, 27, false),
|
||||
FCC_PATTERN(103, 0, 1, 2000, 3066, 1, 18, false),
|
||||
FCC_PATTERN(2, 0, 5, 150, 230, 1, 23, false),
|
||||
FCC_PATTERN(3, 6, 10, 200, 500, 1, 16, false),
|
||||
FCC_PATTERN(4, 11, 20, 200, 500, 1, 12, false),
|
||||
FCC_PATTERN(5, 50, 100, 1000, 2000, 1, 1, true),
|
||||
FCC_PATTERN(6, 0, 1, 333, 333, 1, 9, false),
|
||||
};
|
||||
|
||||
static const struct radar_types fcc_radar_types = {
|
||||
.region = NL80211_DFS_FCC,
|
||||
.num_radar_types = ARRAY_SIZE(fcc_radar_ref_types),
|
||||
.radar_types = fcc_radar_ref_types,
|
||||
};
|
||||
|
||||
#define JP_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB, RATE, CHIRP) \
|
||||
{ \
|
||||
ID, WIDTH_LOWER(WMIN), WIDTH_UPPER(WMAX), \
|
||||
PMIN - PRI_TOLERANCE, \
|
||||
PMAX * PRF + PRI_TOLERANCE, PRF, PPB * PRF, \
|
||||
PPB_THRESH_RATE(PPB, RATE), PRI_TOLERANCE, CHIRP \
|
||||
}
|
||||
static const struct radar_detector_specs jp_radar_ref_types[] = {
|
||||
JP_PATTERN(0, 0, 1, 1428, 1428, 1, 18, 29, false),
|
||||
JP_PATTERN(1, 2, 3, 3846, 3846, 1, 18, 29, false),
|
||||
JP_PATTERN(2, 0, 1, 1388, 1388, 1, 18, 50, false),
|
||||
JP_PATTERN(3, 0, 4, 4000, 4000, 1, 18, 50, false),
|
||||
JP_PATTERN(4, 0, 5, 150, 230, 1, 23, 50, false),
|
||||
JP_PATTERN(5, 6, 10, 200, 500, 1, 16, 50, false),
|
||||
JP_PATTERN(6, 11, 20, 200, 500, 1, 12, 50, false),
|
||||
JP_PATTERN(7, 50, 100, 1000, 2000, 1, 3, 50, true),
|
||||
JP_PATTERN(5, 0, 1, 333, 333, 1, 9, 50, false),
|
||||
};
|
||||
|
||||
static const struct radar_types jp_radar_types = {
|
||||
.region = NL80211_DFS_JP,
|
||||
.num_radar_types = ARRAY_SIZE(jp_radar_ref_types),
|
||||
.radar_types = jp_radar_ref_types,
|
||||
};
|
||||
|
||||
static const struct radar_types *dfs_domains[] = {
|
||||
&etsi_radar_types_v15,
|
||||
&fcc_radar_types,
|
||||
&jp_radar_types,
|
||||
};
|
||||
|
||||
/**
|
||||
* get_dfs_domain_radar_types() - get radar types for a given DFS domain
|
||||
* @region: regulatory DFS region
|
||||
*
|
||||
* Return value: radar_types ptr on success, NULL if DFS domain is not supported
|
||||
*/
|
||||
static const struct radar_types *
|
||||
get_dfs_domain_radar_types(enum nl80211_dfs_regions region)
|
||||
{
|
||||
u32 i;
|
||||
for (i = 0; i < ARRAY_SIZE(dfs_domains); i++) {
|
||||
if (dfs_domains[i]->region == region)
|
||||
return dfs_domains[i];
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* struct channel_detector - detector elements for a DFS channel
|
||||
* @head: list_head
|
||||
* @freq: frequency for this channel detector in MHz
|
||||
* @detectors: array of dynamically created detector elements for this freq
|
||||
*
|
||||
* Channel detectors are required to provide multi-channel DFS detection, e.g.
|
||||
* to support off-channel scanning. A pattern detector has a list of channels
|
||||
* radar pulses have been reported for in the past.
|
||||
*/
|
||||
struct channel_detector {
|
||||
struct list_head head;
|
||||
u16 freq;
|
||||
struct pri_detector **detectors;
|
||||
};
|
||||
|
||||
/* channel_detector_reset() - reset detector lines for a given channel */
|
||||
static void channel_detector_reset(struct dfs_pattern_detector *dpd,
|
||||
struct channel_detector *cd)
|
||||
{
|
||||
u32 i;
|
||||
if (cd == NULL)
|
||||
return;
|
||||
for (i = 0; i < dpd->num_radar_types; i++)
|
||||
cd->detectors[i]->reset(cd->detectors[i], dpd->last_pulse_ts);
|
||||
}
|
||||
|
||||
/* channel_detector_exit() - destructor */
|
||||
static void channel_detector_exit(struct dfs_pattern_detector *dpd,
|
||||
struct channel_detector *cd)
|
||||
{
|
||||
u32 i;
|
||||
if (cd == NULL)
|
||||
return;
|
||||
list_del(&cd->head);
|
||||
if (cd->detectors) {
|
||||
for (i = 0; i < dpd->num_radar_types; i++) {
|
||||
struct pri_detector *de = cd->detectors[i];
|
||||
if (de != NULL)
|
||||
de->exit(de);
|
||||
}
|
||||
}
|
||||
kfree(cd->detectors);
|
||||
kfree(cd);
|
||||
}
|
||||
|
||||
static struct channel_detector *
|
||||
channel_detector_create(struct dfs_pattern_detector *dpd, u16 freq)
|
||||
{
|
||||
u32 i;
|
||||
struct channel_detector *cd;
|
||||
|
||||
cd = kmalloc(sizeof(*cd), GFP_ATOMIC);
|
||||
if (cd == NULL)
|
||||
goto fail;
|
||||
|
||||
INIT_LIST_HEAD(&cd->head);
|
||||
cd->freq = freq;
|
||||
cd->detectors = kmalloc_array(dpd->num_radar_types,
|
||||
sizeof(*cd->detectors), GFP_ATOMIC);
|
||||
if (cd->detectors == NULL)
|
||||
goto fail;
|
||||
|
||||
for (i = 0; i < dpd->num_radar_types; i++) {
|
||||
const struct radar_detector_specs *rs = &dpd->radar_spec[i];
|
||||
struct pri_detector *de = pri_detector_init(rs);
|
||||
if (de == NULL)
|
||||
goto fail;
|
||||
cd->detectors[i] = de;
|
||||
}
|
||||
list_add(&cd->head, &dpd->channel_detectors);
|
||||
return cd;
|
||||
|
||||
fail:
|
||||
ath_dbg(dpd->common, DFS,
|
||||
"failed to allocate channel_detector for freq=%d\n", freq);
|
||||
channel_detector_exit(dpd, cd);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* channel_detector_get() - get channel detector for given frequency
|
||||
* @dpd: DPD instance pointer
|
||||
* @freq: freq frequency in MHz
|
||||
*
|
||||
* Return value: pointer to channel detector on success, NULL otherwise
|
||||
*
|
||||
* Return existing channel detector for the given frequency or return a
|
||||
* newly create one.
|
||||
*/
|
||||
static struct channel_detector *
|
||||
channel_detector_get(struct dfs_pattern_detector *dpd, u16 freq)
|
||||
{
|
||||
struct channel_detector *cd;
|
||||
list_for_each_entry(cd, &dpd->channel_detectors, head) {
|
||||
if (cd->freq == freq)
|
||||
return cd;
|
||||
}
|
||||
return channel_detector_create(dpd, freq);
|
||||
}
|
||||
|
||||
/*
|
||||
* DFS Pattern Detector
|
||||
*/
|
||||
|
||||
/* dpd_reset(): reset all channel detectors */
|
||||
static void dpd_reset(struct dfs_pattern_detector *dpd)
|
||||
{
|
||||
struct channel_detector *cd;
|
||||
list_for_each_entry(cd, &dpd->channel_detectors, head)
|
||||
channel_detector_reset(dpd, cd);
|
||||
|
||||
}
|
||||
static void dpd_exit(struct dfs_pattern_detector *dpd)
|
||||
{
|
||||
struct channel_detector *cd, *cd0;
|
||||
list_for_each_entry_safe(cd, cd0, &dpd->channel_detectors, head)
|
||||
channel_detector_exit(dpd, cd);
|
||||
kfree(dpd);
|
||||
}
|
||||
|
||||
static bool
|
||||
dpd_add_pulse(struct dfs_pattern_detector *dpd, struct pulse_event *event,
|
||||
struct radar_detector_specs *rs)
|
||||
{
|
||||
u32 i;
|
||||
struct channel_detector *cd;
|
||||
|
||||
/*
|
||||
* pulses received for a non-supported or un-initialized
|
||||
* domain are treated as detected radars for fail-safety
|
||||
*/
|
||||
if (dpd->region == NL80211_DFS_UNSET)
|
||||
return true;
|
||||
|
||||
cd = channel_detector_get(dpd, event->freq);
|
||||
if (cd == NULL)
|
||||
return false;
|
||||
|
||||
/* reset detector on time stamp wraparound, caused by TSF reset */
|
||||
if (event->ts < dpd->last_pulse_ts)
|
||||
dpd_reset(dpd);
|
||||
dpd->last_pulse_ts = event->ts;
|
||||
|
||||
/* do type individual pattern matching */
|
||||
for (i = 0; i < dpd->num_radar_types; i++) {
|
||||
struct pri_detector *pd = cd->detectors[i];
|
||||
struct pri_sequence *ps = pd->add_pulse(pd, event);
|
||||
if (ps != NULL) {
|
||||
if (rs != NULL)
|
||||
memcpy(rs, pd->rs, sizeof(*rs));
|
||||
ath_dbg(dpd->common, DFS,
|
||||
"DFS: radar found on freq=%d: id=%d, pri=%d, "
|
||||
"count=%d, count_false=%d\n",
|
||||
event->freq, pd->rs->type_id,
|
||||
ps->pri, ps->count, ps->count_falses);
|
||||
pd->reset(pd, dpd->last_pulse_ts);
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
static struct ath_dfs_pool_stats
|
||||
dpd_get_stats(struct dfs_pattern_detector *dpd)
|
||||
{
|
||||
return global_dfs_pool_stats;
|
||||
}
|
||||
|
||||
static bool dpd_set_domain(struct dfs_pattern_detector *dpd,
|
||||
enum nl80211_dfs_regions region)
|
||||
{
|
||||
const struct radar_types *rt;
|
||||
struct channel_detector *cd, *cd0;
|
||||
|
||||
if (dpd->region == region)
|
||||
return true;
|
||||
|
||||
dpd->region = NL80211_DFS_UNSET;
|
||||
|
||||
rt = get_dfs_domain_radar_types(region);
|
||||
if (rt == NULL)
|
||||
return false;
|
||||
|
||||
/* delete all channel detectors for previous DFS domain */
|
||||
list_for_each_entry_safe(cd, cd0, &dpd->channel_detectors, head)
|
||||
channel_detector_exit(dpd, cd);
|
||||
dpd->radar_spec = rt->radar_types;
|
||||
dpd->num_radar_types = rt->num_radar_types;
|
||||
|
||||
dpd->region = region;
|
||||
return true;
|
||||
}
|
||||
|
||||
static const struct dfs_pattern_detector default_dpd = {
|
||||
.exit = dpd_exit,
|
||||
.set_dfs_domain = dpd_set_domain,
|
||||
.add_pulse = dpd_add_pulse,
|
||||
.get_stats = dpd_get_stats,
|
||||
.region = NL80211_DFS_UNSET,
|
||||
};
|
||||
|
||||
struct dfs_pattern_detector *
|
||||
dfs_pattern_detector_init(struct ath_common *common,
|
||||
enum nl80211_dfs_regions region)
|
||||
{
|
||||
struct dfs_pattern_detector *dpd;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_CFG80211_CERTIFICATION_ONUS))
|
||||
return NULL;
|
||||
|
||||
dpd = kmalloc(sizeof(*dpd), GFP_KERNEL);
|
||||
if (dpd == NULL)
|
||||
return NULL;
|
||||
|
||||
*dpd = default_dpd;
|
||||
INIT_LIST_HEAD(&dpd->channel_detectors);
|
||||
|
||||
dpd->common = common;
|
||||
if (dpd->set_dfs_domain(dpd, region))
|
||||
return dpd;
|
||||
|
||||
ath_dbg(common, DFS,"Could not set DFS domain to %d", region);
|
||||
kfree(dpd);
|
||||
return NULL;
|
||||
}
|
||||
EXPORT_SYMBOL(dfs_pattern_detector_init);
|
||||
122
sys/contrib/dev/athk/dfs_pattern_detector.h
Normal file
122
sys/contrib/dev/athk/dfs_pattern_detector.h
Normal file
@ -0,0 +1,122 @@
|
||||
/*
|
||||
* Copyright (c) 2012 Neratec Solutions AG
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef DFS_PATTERN_DETECTOR_H
|
||||
#define DFS_PATTERN_DETECTOR_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/nl80211.h>
|
||||
|
||||
/* tolerated deviation of radar time stamp in usecs on both sides
|
||||
* TODO: this might need to be HW-dependent
|
||||
*/
|
||||
#define PRI_TOLERANCE 16
|
||||
|
||||
/**
|
||||
* struct ath_dfs_pool_stats - DFS Statistics for global pools
|
||||
*/
|
||||
struct ath_dfs_pool_stats {
|
||||
u32 pool_reference;
|
||||
u32 pulse_allocated;
|
||||
u32 pulse_alloc_error;
|
||||
u32 pulse_used;
|
||||
u32 pseq_allocated;
|
||||
u32 pseq_alloc_error;
|
||||
u32 pseq_used;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct pulse_event - describing pulses reported by PHY
|
||||
* @ts: pulse time stamp in us
|
||||
* @freq: channel frequency in MHz
|
||||
* @width: pulse duration in us
|
||||
* @rssi: rssi of radar event
|
||||
* @chirp: chirp detected in pulse
|
||||
*/
|
||||
struct pulse_event {
|
||||
u64 ts;
|
||||
u16 freq;
|
||||
u8 width;
|
||||
u8 rssi;
|
||||
bool chirp;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct radar_detector_specs - detector specs for a radar pattern type
|
||||
* @type_id: pattern type, as defined by regulatory
|
||||
* @width_min: minimum radar pulse width in [us]
|
||||
* @width_max: maximum radar pulse width in [us]
|
||||
* @pri_min: minimum pulse repetition interval in [us] (including tolerance)
|
||||
* @pri_max: minimum pri in [us] (including tolerance)
|
||||
* @num_pri: maximum number of different pri for this type
|
||||
* @ppb: pulses per bursts for this type
|
||||
* @ppb_thresh: number of pulses required to trigger detection
|
||||
* @max_pri_tolerance: pulse time stamp tolerance on both sides [us]
|
||||
* @chirp: chirp required for the radar pattern
|
||||
*/
|
||||
struct radar_detector_specs {
|
||||
u8 type_id;
|
||||
u8 width_min;
|
||||
u8 width_max;
|
||||
u16 pri_min;
|
||||
u16 pri_max;
|
||||
u8 num_pri;
|
||||
u8 ppb;
|
||||
u8 ppb_thresh;
|
||||
u8 max_pri_tolerance;
|
||||
bool chirp;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct dfs_pattern_detector - DFS pattern detector
|
||||
* @exit(): destructor
|
||||
* @set_dfs_domain(): set DFS domain, resets detector lines upon domain changes
|
||||
* @add_pulse(): add radar pulse to detector, returns true on detection
|
||||
* @region: active DFS region, NL80211_DFS_UNSET until set
|
||||
* @num_radar_types: number of different radar types
|
||||
* @last_pulse_ts: time stamp of last valid pulse in usecs
|
||||
* @radar_detector_specs: array of radar detection specs
|
||||
* @channel_detectors: list connecting channel_detector elements
|
||||
*/
|
||||
struct dfs_pattern_detector {
|
||||
void (*exit)(struct dfs_pattern_detector *dpd);
|
||||
bool (*set_dfs_domain)(struct dfs_pattern_detector *dpd,
|
||||
enum nl80211_dfs_regions region);
|
||||
bool (*add_pulse)(struct dfs_pattern_detector *dpd,
|
||||
struct pulse_event *pe,
|
||||
struct radar_detector_specs *rs);
|
||||
|
||||
struct ath_dfs_pool_stats (*get_stats)(struct dfs_pattern_detector *dpd);
|
||||
enum nl80211_dfs_regions region;
|
||||
u8 num_radar_types;
|
||||
u64 last_pulse_ts;
|
||||
/* needed for ath_dbg() */
|
||||
struct ath_common *common;
|
||||
|
||||
const struct radar_detector_specs *radar_spec;
|
||||
struct list_head channel_detectors;
|
||||
};
|
||||
|
||||
/**
|
||||
* dfs_pattern_detector_init() - constructor for pattern detector class
|
||||
* @param region: DFS domain to be used, can be NL80211_DFS_UNSET at creation
|
||||
* @return instance pointer on success, NULL otherwise
|
||||
*/
|
||||
extern struct dfs_pattern_detector *
|
||||
dfs_pattern_detector_init(struct ath_common *common,
|
||||
enum nl80211_dfs_regions region);
|
||||
#endif /* DFS_PATTERN_DETECTOR_H */
|
||||
436
sys/contrib/dev/athk/dfs_pri_detector.c
Normal file
436
sys/contrib/dev/athk/dfs_pri_detector.c
Normal file
@ -0,0 +1,436 @@
|
||||
/*
|
||||
* Copyright (c) 2012 Neratec Solutions AG
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include "ath.h"
|
||||
#include "dfs_pattern_detector.h"
|
||||
#include "dfs_pri_detector.h"
|
||||
|
||||
struct ath_dfs_pool_stats global_dfs_pool_stats = {};
|
||||
|
||||
#define DFS_POOL_STAT_INC(c) (global_dfs_pool_stats.c++)
|
||||
#define DFS_POOL_STAT_DEC(c) (global_dfs_pool_stats.c--)
|
||||
#define GET_PRI_TO_USE(MIN, MAX, RUNTIME) \
|
||||
(MIN + PRI_TOLERANCE == MAX - PRI_TOLERANCE ? \
|
||||
MIN + PRI_TOLERANCE : RUNTIME)
|
||||
|
||||
/*
|
||||
* struct pulse_elem - elements in pulse queue
|
||||
*/
|
||||
struct pulse_elem {
|
||||
struct list_head head;
|
||||
u64 ts;
|
||||
};
|
||||
|
||||
/*
|
||||
* pde_get_multiple() - get number of multiples considering a given tolerance
|
||||
* Return value: factor if abs(val - factor*fraction) <= tolerance, 0 otherwise
|
||||
*/
|
||||
static u32 pde_get_multiple(u32 val, u32 fraction, u32 tolerance)
|
||||
{
|
||||
u32 remainder;
|
||||
u32 factor;
|
||||
u32 delta;
|
||||
|
||||
if (fraction == 0)
|
||||
return 0;
|
||||
|
||||
delta = (val < fraction) ? (fraction - val) : (val - fraction);
|
||||
|
||||
if (delta <= tolerance)
|
||||
/* val and fraction are within tolerance */
|
||||
return 1;
|
||||
|
||||
factor = val / fraction;
|
||||
remainder = val % fraction;
|
||||
if (remainder > tolerance) {
|
||||
/* no exact match */
|
||||
if ((fraction - remainder) <= tolerance)
|
||||
/* remainder is within tolerance */
|
||||
factor++;
|
||||
else
|
||||
factor = 0;
|
||||
}
|
||||
return factor;
|
||||
}
|
||||
|
||||
/*
|
||||
* DOC: Singleton Pulse and Sequence Pools
|
||||
*
|
||||
* Instances of pri_sequence and pulse_elem are kept in singleton pools to
|
||||
* reduce the number of dynamic allocations. They are shared between all
|
||||
* instances and grow up to the peak number of simultaneously used objects.
|
||||
*
|
||||
* Memory is freed after all references to the pools are released.
|
||||
*/
|
||||
static u32 singleton_pool_references;
|
||||
static LIST_HEAD(pulse_pool);
|
||||
static LIST_HEAD(pseq_pool);
|
||||
static DEFINE_SPINLOCK(pool_lock);
|
||||
|
||||
static void pool_register_ref(void)
|
||||
{
|
||||
spin_lock_bh(&pool_lock);
|
||||
singleton_pool_references++;
|
||||
DFS_POOL_STAT_INC(pool_reference);
|
||||
spin_unlock_bh(&pool_lock);
|
||||
}
|
||||
|
||||
static void pool_deregister_ref(void)
|
||||
{
|
||||
spin_lock_bh(&pool_lock);
|
||||
singleton_pool_references--;
|
||||
DFS_POOL_STAT_DEC(pool_reference);
|
||||
if (singleton_pool_references == 0) {
|
||||
/* free singleton pools with no references left */
|
||||
struct pri_sequence *ps, *ps0;
|
||||
struct pulse_elem *p, *p0;
|
||||
|
||||
list_for_each_entry_safe(p, p0, &pulse_pool, head) {
|
||||
list_del(&p->head);
|
||||
DFS_POOL_STAT_DEC(pulse_allocated);
|
||||
kfree(p);
|
||||
}
|
||||
list_for_each_entry_safe(ps, ps0, &pseq_pool, head) {
|
||||
list_del(&ps->head);
|
||||
DFS_POOL_STAT_DEC(pseq_allocated);
|
||||
kfree(ps);
|
||||
}
|
||||
}
|
||||
spin_unlock_bh(&pool_lock);
|
||||
}
|
||||
|
||||
static void pool_put_pulse_elem(struct pulse_elem *pe)
|
||||
{
|
||||
spin_lock_bh(&pool_lock);
|
||||
list_add(&pe->head, &pulse_pool);
|
||||
DFS_POOL_STAT_DEC(pulse_used);
|
||||
spin_unlock_bh(&pool_lock);
|
||||
}
|
||||
|
||||
static void pool_put_pseq_elem(struct pri_sequence *pse)
|
||||
{
|
||||
spin_lock_bh(&pool_lock);
|
||||
list_add(&pse->head, &pseq_pool);
|
||||
DFS_POOL_STAT_DEC(pseq_used);
|
||||
spin_unlock_bh(&pool_lock);
|
||||
}
|
||||
|
||||
static struct pri_sequence *pool_get_pseq_elem(void)
|
||||
{
|
||||
struct pri_sequence *pse = NULL;
|
||||
spin_lock_bh(&pool_lock);
|
||||
if (!list_empty(&pseq_pool)) {
|
||||
pse = list_first_entry(&pseq_pool, struct pri_sequence, head);
|
||||
list_del(&pse->head);
|
||||
DFS_POOL_STAT_INC(pseq_used);
|
||||
}
|
||||
spin_unlock_bh(&pool_lock);
|
||||
return pse;
|
||||
}
|
||||
|
||||
static struct pulse_elem *pool_get_pulse_elem(void)
|
||||
{
|
||||
struct pulse_elem *pe = NULL;
|
||||
spin_lock_bh(&pool_lock);
|
||||
if (!list_empty(&pulse_pool)) {
|
||||
pe = list_first_entry(&pulse_pool, struct pulse_elem, head);
|
||||
list_del(&pe->head);
|
||||
DFS_POOL_STAT_INC(pulse_used);
|
||||
}
|
||||
spin_unlock_bh(&pool_lock);
|
||||
return pe;
|
||||
}
|
||||
|
||||
static struct pulse_elem *pulse_queue_get_tail(struct pri_detector *pde)
|
||||
{
|
||||
struct list_head *l = &pde->pulses;
|
||||
if (list_empty(l))
|
||||
return NULL;
|
||||
return list_entry(l->prev, struct pulse_elem, head);
|
||||
}
|
||||
|
||||
static bool pulse_queue_dequeue(struct pri_detector *pde)
|
||||
{
|
||||
struct pulse_elem *p = pulse_queue_get_tail(pde);
|
||||
if (p != NULL) {
|
||||
list_del_init(&p->head);
|
||||
pde->count--;
|
||||
/* give it back to pool */
|
||||
pool_put_pulse_elem(p);
|
||||
}
|
||||
return (pde->count > 0);
|
||||
}
|
||||
|
||||
/* remove pulses older than window */
|
||||
static void pulse_queue_check_window(struct pri_detector *pde)
|
||||
{
|
||||
u64 min_valid_ts;
|
||||
struct pulse_elem *p;
|
||||
|
||||
/* there is no delta time with less than 2 pulses */
|
||||
if (pde->count < 2)
|
||||
return;
|
||||
|
||||
if (pde->last_ts <= pde->window_size)
|
||||
return;
|
||||
|
||||
min_valid_ts = pde->last_ts - pde->window_size;
|
||||
while ((p = pulse_queue_get_tail(pde)) != NULL) {
|
||||
if (p->ts >= min_valid_ts)
|
||||
return;
|
||||
pulse_queue_dequeue(pde);
|
||||
}
|
||||
}
|
||||
|
||||
static bool pulse_queue_enqueue(struct pri_detector *pde, u64 ts)
|
||||
{
|
||||
struct pulse_elem *p = pool_get_pulse_elem();
|
||||
if (p == NULL) {
|
||||
p = kmalloc(sizeof(*p), GFP_ATOMIC);
|
||||
if (p == NULL) {
|
||||
DFS_POOL_STAT_INC(pulse_alloc_error);
|
||||
return false;
|
||||
}
|
||||
DFS_POOL_STAT_INC(pulse_allocated);
|
||||
DFS_POOL_STAT_INC(pulse_used);
|
||||
}
|
||||
INIT_LIST_HEAD(&p->head);
|
||||
p->ts = ts;
|
||||
list_add(&p->head, &pde->pulses);
|
||||
pde->count++;
|
||||
pde->last_ts = ts;
|
||||
pulse_queue_check_window(pde);
|
||||
if (pde->count >= pde->max_count)
|
||||
pulse_queue_dequeue(pde);
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool pseq_handler_create_sequences(struct pri_detector *pde,
|
||||
u64 ts, u32 min_count)
|
||||
{
|
||||
struct pulse_elem *p;
|
||||
list_for_each_entry(p, &pde->pulses, head) {
|
||||
struct pri_sequence ps, *new_ps;
|
||||
struct pulse_elem *p2;
|
||||
u32 tmp_false_count;
|
||||
u64 min_valid_ts;
|
||||
u32 delta_ts = ts - p->ts;
|
||||
|
||||
if (delta_ts < pde->rs->pri_min)
|
||||
/* ignore too small pri */
|
||||
continue;
|
||||
|
||||
if (delta_ts > pde->rs->pri_max)
|
||||
/* stop on too large pri (sorted list) */
|
||||
break;
|
||||
|
||||
/* build a new sequence with new potential pri */
|
||||
ps.count = 2;
|
||||
ps.count_falses = 0;
|
||||
ps.first_ts = p->ts;
|
||||
ps.last_ts = ts;
|
||||
ps.pri = GET_PRI_TO_USE(pde->rs->pri_min,
|
||||
pde->rs->pri_max, ts - p->ts);
|
||||
ps.dur = ps.pri * (pde->rs->ppb - 1)
|
||||
+ 2 * pde->rs->max_pri_tolerance;
|
||||
|
||||
p2 = p;
|
||||
tmp_false_count = 0;
|
||||
min_valid_ts = ts - ps.dur;
|
||||
/* check which past pulses are candidates for new sequence */
|
||||
list_for_each_entry_continue(p2, &pde->pulses, head) {
|
||||
u32 factor;
|
||||
if (p2->ts < min_valid_ts)
|
||||
/* stop on crossing window border */
|
||||
break;
|
||||
/* check if pulse match (multi)PRI */
|
||||
factor = pde_get_multiple(ps.last_ts - p2->ts, ps.pri,
|
||||
pde->rs->max_pri_tolerance);
|
||||
if (factor > 0) {
|
||||
ps.count++;
|
||||
ps.first_ts = p2->ts;
|
||||
/*
|
||||
* on match, add the intermediate falses
|
||||
* and reset counter
|
||||
*/
|
||||
ps.count_falses += tmp_false_count;
|
||||
tmp_false_count = 0;
|
||||
} else {
|
||||
/* this is a potential false one */
|
||||
tmp_false_count++;
|
||||
}
|
||||
}
|
||||
if (ps.count <= min_count)
|
||||
/* did not reach minimum count, drop sequence */
|
||||
continue;
|
||||
|
||||
/* this is a valid one, add it */
|
||||
ps.deadline_ts = ps.first_ts + ps.dur;
|
||||
new_ps = pool_get_pseq_elem();
|
||||
if (new_ps == NULL) {
|
||||
new_ps = kmalloc(sizeof(*new_ps), GFP_ATOMIC);
|
||||
if (new_ps == NULL) {
|
||||
DFS_POOL_STAT_INC(pseq_alloc_error);
|
||||
return false;
|
||||
}
|
||||
DFS_POOL_STAT_INC(pseq_allocated);
|
||||
DFS_POOL_STAT_INC(pseq_used);
|
||||
}
|
||||
memcpy(new_ps, &ps, sizeof(ps));
|
||||
INIT_LIST_HEAD(&new_ps->head);
|
||||
list_add(&new_ps->head, &pde->sequences);
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
/* check new ts and add to all matching existing sequences */
|
||||
static u32
|
||||
pseq_handler_add_to_existing_seqs(struct pri_detector *pde, u64 ts)
|
||||
{
|
||||
u32 max_count = 0;
|
||||
struct pri_sequence *ps, *ps2;
|
||||
list_for_each_entry_safe(ps, ps2, &pde->sequences, head) {
|
||||
u32 delta_ts;
|
||||
u32 factor;
|
||||
|
||||
/* first ensure that sequence is within window */
|
||||
if (ts > ps->deadline_ts) {
|
||||
list_del_init(&ps->head);
|
||||
pool_put_pseq_elem(ps);
|
||||
continue;
|
||||
}
|
||||
|
||||
delta_ts = ts - ps->last_ts;
|
||||
factor = pde_get_multiple(delta_ts, ps->pri,
|
||||
pde->rs->max_pri_tolerance);
|
||||
if (factor > 0) {
|
||||
ps->last_ts = ts;
|
||||
ps->count++;
|
||||
|
||||
if (max_count < ps->count)
|
||||
max_count = ps->count;
|
||||
} else {
|
||||
ps->count_falses++;
|
||||
}
|
||||
}
|
||||
return max_count;
|
||||
}
|
||||
|
||||
static struct pri_sequence *
|
||||
pseq_handler_check_detection(struct pri_detector *pde)
|
||||
{
|
||||
struct pri_sequence *ps;
|
||||
|
||||
if (list_empty(&pde->sequences))
|
||||
return NULL;
|
||||
|
||||
list_for_each_entry(ps, &pde->sequences, head) {
|
||||
/*
|
||||
* we assume to have enough matching confidence if we
|
||||
* 1) have enough pulses
|
||||
* 2) have more matching than false pulses
|
||||
*/
|
||||
if ((ps->count >= pde->rs->ppb_thresh) &&
|
||||
(ps->count * pde->rs->num_pri >= ps->count_falses))
|
||||
return ps;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
/* free pulse queue and sequences list and give objects back to pools */
|
||||
static void pri_detector_reset(struct pri_detector *pde, u64 ts)
|
||||
{
|
||||
struct pri_sequence *ps, *ps0;
|
||||
struct pulse_elem *p, *p0;
|
||||
list_for_each_entry_safe(ps, ps0, &pde->sequences, head) {
|
||||
list_del_init(&ps->head);
|
||||
pool_put_pseq_elem(ps);
|
||||
}
|
||||
list_for_each_entry_safe(p, p0, &pde->pulses, head) {
|
||||
list_del_init(&p->head);
|
||||
pool_put_pulse_elem(p);
|
||||
}
|
||||
pde->count = 0;
|
||||
pde->last_ts = ts;
|
||||
}
|
||||
|
||||
static void pri_detector_exit(struct pri_detector *de)
|
||||
{
|
||||
pri_detector_reset(de, 0);
|
||||
pool_deregister_ref();
|
||||
kfree(de);
|
||||
}
|
||||
|
||||
static struct pri_sequence *pri_detector_add_pulse(struct pri_detector *de,
|
||||
struct pulse_event *event)
|
||||
{
|
||||
u32 max_updated_seq;
|
||||
struct pri_sequence *ps;
|
||||
u64 ts = event->ts;
|
||||
const struct radar_detector_specs *rs = de->rs;
|
||||
|
||||
/* ignore pulses not within width range */
|
||||
if ((rs->width_min > event->width) || (rs->width_max < event->width))
|
||||
return NULL;
|
||||
|
||||
if ((ts - de->last_ts) < rs->max_pri_tolerance)
|
||||
/* if delta to last pulse is too short, don't use this pulse */
|
||||
return NULL;
|
||||
/* radar detector spec needs chirp, but not detected */
|
||||
if (rs->chirp && rs->chirp != event->chirp)
|
||||
return NULL;
|
||||
|
||||
de->last_ts = ts;
|
||||
|
||||
max_updated_seq = pseq_handler_add_to_existing_seqs(de, ts);
|
||||
|
||||
if (!pseq_handler_create_sequences(de, ts, max_updated_seq)) {
|
||||
pri_detector_reset(de, ts);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
ps = pseq_handler_check_detection(de);
|
||||
|
||||
if (ps == NULL)
|
||||
pulse_queue_enqueue(de, ts);
|
||||
|
||||
return ps;
|
||||
}
|
||||
|
||||
struct pri_detector *pri_detector_init(const struct radar_detector_specs *rs)
|
||||
{
|
||||
struct pri_detector *de;
|
||||
|
||||
de = kzalloc(sizeof(*de), GFP_ATOMIC);
|
||||
if (de == NULL)
|
||||
return NULL;
|
||||
de->exit = pri_detector_exit;
|
||||
de->add_pulse = pri_detector_add_pulse;
|
||||
de->reset = pri_detector_reset;
|
||||
|
||||
INIT_LIST_HEAD(&de->sequences);
|
||||
INIT_LIST_HEAD(&de->pulses);
|
||||
de->window_size = rs->pri_max * rs->ppb * rs->num_pri;
|
||||
de->max_count = rs->ppb * 2;
|
||||
de->rs = rs;
|
||||
|
||||
pool_register_ref();
|
||||
return de;
|
||||
}
|
||||
78
sys/contrib/dev/athk/dfs_pri_detector.h
Normal file
78
sys/contrib/dev/athk/dfs_pri_detector.h
Normal file
@ -0,0 +1,78 @@
|
||||
/*
|
||||
* Copyright (c) 2012 Neratec Solutions AG
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef DFS_PRI_DETECTOR_H
|
||||
#define DFS_PRI_DETECTOR_H
|
||||
|
||||
#include <linux/list.h>
|
||||
|
||||
extern struct ath_dfs_pool_stats global_dfs_pool_stats;
|
||||
|
||||
/**
|
||||
* struct pri_sequence - sequence of pulses matching one PRI
|
||||
* @head: list_head
|
||||
* @pri: pulse repetition interval (PRI) in usecs
|
||||
* @dur: duration of sequence in usecs
|
||||
* @count: number of pulses in this sequence
|
||||
* @count_falses: number of not matching pulses in this sequence
|
||||
* @first_ts: time stamp of first pulse in usecs
|
||||
* @last_ts: time stamp of last pulse in usecs
|
||||
* @deadline_ts: deadline when this sequence becomes invalid (first_ts + dur)
|
||||
*/
|
||||
struct pri_sequence {
|
||||
struct list_head head;
|
||||
u32 pri;
|
||||
u32 dur;
|
||||
u32 count;
|
||||
u32 count_falses;
|
||||
u64 first_ts;
|
||||
u64 last_ts;
|
||||
u64 deadline_ts;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct pri_detector - PRI detector element for a dedicated radar type
|
||||
* @exit(): destructor
|
||||
* @add_pulse(): add pulse event, returns pri_sequence if pattern was detected
|
||||
* @reset(): clear states and reset to given time stamp
|
||||
* @rs: detector specs for this detector element
|
||||
* @last_ts: last pulse time stamp considered for this element in usecs
|
||||
* @sequences: list_head holding potential pulse sequences
|
||||
* @pulses: list connecting pulse_elem objects
|
||||
* @count: number of pulses in queue
|
||||
* @max_count: maximum number of pulses to be queued
|
||||
* @window_size: window size back from newest pulse time stamp in usecs
|
||||
*/
|
||||
struct pri_detector {
|
||||
void (*exit) (struct pri_detector *de);
|
||||
struct pri_sequence *
|
||||
(*add_pulse)(struct pri_detector *de, struct pulse_event *e);
|
||||
void (*reset) (struct pri_detector *de, u64 ts);
|
||||
|
||||
const struct radar_detector_specs *rs;
|
||||
|
||||
/* private: internal use only */
|
||||
u64 last_ts;
|
||||
struct list_head sequences;
|
||||
struct list_head pulses;
|
||||
u32 count;
|
||||
u32 max_count;
|
||||
u32 window_size;
|
||||
};
|
||||
|
||||
struct pri_detector *pri_detector_init(const struct radar_detector_specs *rs);
|
||||
|
||||
#endif /* DFS_PRI_DETECTOR_H */
|
||||
190
sys/contrib/dev/athk/hw.c
Normal file
190
sys/contrib/dev/athk/hw.c
Normal file
@ -0,0 +1,190 @@
|
||||
/*
|
||||
* Copyright (c) 2009 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/export.h>
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
#include "ath.h"
|
||||
#include "reg.h"
|
||||
|
||||
#define REG_READ (common->ops->read)
|
||||
#define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)
|
||||
|
||||
/**
|
||||
* ath_hw_setbssidmask - filter out bssids we listen
|
||||
*
|
||||
* @common: the ath_common struct for the device.
|
||||
*
|
||||
* BSSID masking is a method used by AR5212 and newer hardware to inform PCU
|
||||
* which bits of the interface's MAC address should be looked at when trying
|
||||
* to decide which packets to ACK. In station mode and AP mode with a single
|
||||
* BSS every bit matters since we lock to only one BSS. In AP mode with
|
||||
* multiple BSSes (virtual interfaces) not every bit matters because hw must
|
||||
* accept frames for all BSSes and so we tweak some bits of our mac address
|
||||
* in order to have multiple BSSes.
|
||||
*
|
||||
* NOTE: This is a simple filter and does *not* filter out all
|
||||
* relevant frames. Some frames that are not for us might get ACKed from us
|
||||
* by PCU because they just match the mask.
|
||||
*
|
||||
* When handling multiple BSSes you can get the BSSID mask by computing the
|
||||
* set of ~ ( MAC XOR BSSID ) for all bssids we handle.
|
||||
*
|
||||
* When you do this you are essentially computing the common bits of all your
|
||||
* BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with
|
||||
* the MAC address to obtain the relevant bits and compare the result with
|
||||
* (frame's BSSID & mask) to see if they match.
|
||||
*
|
||||
* Simple example: on your card you have have two BSSes you have created with
|
||||
* BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.
|
||||
* There is another BSSID-03 but you are not part of it. For simplicity's sake,
|
||||
* assuming only 4 bits for a mac address and for BSSIDs you can then have:
|
||||
*
|
||||
* \
|
||||
* MAC: 0001 |
|
||||
* BSSID-01: 0100 | --> Belongs to us
|
||||
* BSSID-02: 1001 |
|
||||
* /
|
||||
* -------------------
|
||||
* BSSID-03: 0110 | --> External
|
||||
* -------------------
|
||||
*
|
||||
* Our bssid_mask would then be:
|
||||
*
|
||||
* On loop iteration for BSSID-01:
|
||||
* ~(0001 ^ 0100) -> ~(0101)
|
||||
* -> 1010
|
||||
* bssid_mask = 1010
|
||||
*
|
||||
* On loop iteration for BSSID-02:
|
||||
* bssid_mask &= ~(0001 ^ 1001)
|
||||
* bssid_mask = (1010) & ~(0001 ^ 1001)
|
||||
* bssid_mask = (1010) & ~(1000)
|
||||
* bssid_mask = (1010) & (0111)
|
||||
* bssid_mask = 0010
|
||||
*
|
||||
* A bssid_mask of 0010 means "only pay attention to the second least
|
||||
* significant bit". This is because its the only bit common
|
||||
* amongst the MAC and all BSSIDs we support. To findout what the real
|
||||
* common bit is we can simply "&" the bssid_mask now with any BSSID we have
|
||||
* or our MAC address (we assume the hardware uses the MAC address).
|
||||
*
|
||||
* Now, suppose there's an incoming frame for BSSID-03:
|
||||
*
|
||||
* IFRAME-01: 0110
|
||||
*
|
||||
* An easy eye-inspeciton of this already should tell you that this frame
|
||||
* will not pass our check. This is because the bssid_mask tells the
|
||||
* hardware to only look at the second least significant bit and the
|
||||
* common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB
|
||||
* as 1, which does not match 0.
|
||||
*
|
||||
* So with IFRAME-01 we *assume* the hardware will do:
|
||||
*
|
||||
* allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
|
||||
* --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;
|
||||
* --> allow = (0010) == 0000 ? 1 : 0;
|
||||
* --> allow = 0
|
||||
*
|
||||
* Lets now test a frame that should work:
|
||||
*
|
||||
* IFRAME-02: 0001 (we should allow)
|
||||
*
|
||||
* allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
|
||||
* --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;
|
||||
* --> allow = (0000) == (0000)
|
||||
* --> allow = 1
|
||||
*
|
||||
* Other examples:
|
||||
*
|
||||
* IFRAME-03: 0100 --> allowed
|
||||
* IFRAME-04: 1001 --> allowed
|
||||
* IFRAME-05: 1101 --> allowed but its not for us!!!
|
||||
*
|
||||
*/
|
||||
void ath_hw_setbssidmask(struct ath_common *common)
|
||||
{
|
||||
void *ah = common->ah;
|
||||
u32 id1;
|
||||
|
||||
REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));
|
||||
id1 = REG_READ(ah, AR_STA_ID1) & ~AR_STA_ID1_SADH_MASK;
|
||||
id1 |= get_unaligned_le16(common->macaddr + 4);
|
||||
REG_WRITE(ah, AR_STA_ID1, id1);
|
||||
|
||||
REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));
|
||||
REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));
|
||||
}
|
||||
EXPORT_SYMBOL(ath_hw_setbssidmask);
|
||||
|
||||
|
||||
/**
|
||||
* ath_hw_cycle_counters_update - common function to update cycle counters
|
||||
*
|
||||
* @common: the ath_common struct for the device.
|
||||
*
|
||||
* This function is used to update all cycle counters in one place.
|
||||
* It has to be called while holding common->cc_lock!
|
||||
*/
|
||||
void ath_hw_cycle_counters_update(struct ath_common *common)
|
||||
{
|
||||
u32 cycles, busy, rx, tx;
|
||||
void *ah = common->ah;
|
||||
|
||||
/* freeze */
|
||||
REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
|
||||
|
||||
/* read */
|
||||
cycles = REG_READ(ah, AR_CCCNT);
|
||||
busy = REG_READ(ah, AR_RCCNT);
|
||||
rx = REG_READ(ah, AR_RFCNT);
|
||||
tx = REG_READ(ah, AR_TFCNT);
|
||||
|
||||
/* clear */
|
||||
REG_WRITE(ah, AR_CCCNT, 0);
|
||||
REG_WRITE(ah, AR_RFCNT, 0);
|
||||
REG_WRITE(ah, AR_RCCNT, 0);
|
||||
REG_WRITE(ah, AR_TFCNT, 0);
|
||||
|
||||
/* unfreeze */
|
||||
REG_WRITE(ah, AR_MIBC, 0);
|
||||
|
||||
/* update all cycle counters here */
|
||||
common->cc_ani.cycles += cycles;
|
||||
common->cc_ani.rx_busy += busy;
|
||||
common->cc_ani.rx_frame += rx;
|
||||
common->cc_ani.tx_frame += tx;
|
||||
|
||||
common->cc_survey.cycles += cycles;
|
||||
common->cc_survey.rx_busy += busy;
|
||||
common->cc_survey.rx_frame += rx;
|
||||
common->cc_survey.tx_frame += tx;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_hw_cycle_counters_update);
|
||||
|
||||
int32_t ath_hw_get_listen_time(struct ath_common *common)
|
||||
{
|
||||
struct ath_cycle_counters *cc = &common->cc_ani;
|
||||
int32_t listen_time;
|
||||
|
||||
listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /
|
||||
(common->clockrate * 1000);
|
||||
|
||||
memset(cc, 0, sizeof(*cc));
|
||||
|
||||
return listen_time;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_hw_get_listen_time);
|
||||
618
sys/contrib/dev/athk/key.c
Normal file
618
sys/contrib/dev/athk/key.c
Normal file
@ -0,0 +1,618 @@
|
||||
/*
|
||||
* Copyright (c) 2009 Atheros Communications Inc.
|
||||
* Copyright (c) 2010 Bruno Randolf <br1@einfach.org>
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/export.h>
|
||||
#include <asm/unaligned.h>
|
||||
#include <net/mac80211.h>
|
||||
|
||||
#include "ath.h"
|
||||
#include "reg.h"
|
||||
|
||||
#define REG_READ (common->ops->read)
|
||||
#define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)
|
||||
#define ENABLE_REGWRITE_BUFFER(_ah) \
|
||||
if (common->ops->enable_write_buffer) \
|
||||
common->ops->enable_write_buffer((_ah));
|
||||
|
||||
#define REGWRITE_BUFFER_FLUSH(_ah) \
|
||||
if (common->ops->write_flush) \
|
||||
common->ops->write_flush((_ah));
|
||||
|
||||
|
||||
#define IEEE80211_WEP_NKID 4 /* number of key ids */
|
||||
|
||||
/************************/
|
||||
/* Key Cache Management */
|
||||
/************************/
|
||||
|
||||
bool ath_hw_keyreset(struct ath_common *common, u16 entry)
|
||||
{
|
||||
u32 keyType;
|
||||
void *ah = common->ah;
|
||||
|
||||
if (entry >= common->keymax) {
|
||||
ath_err(common, "keyreset: keycache entry %u out of range\n",
|
||||
entry);
|
||||
return false;
|
||||
}
|
||||
|
||||
keyType = REG_READ(ah, AR_KEYTABLE_TYPE(entry));
|
||||
|
||||
ENABLE_REGWRITE_BUFFER(ah);
|
||||
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), AR_KEYTABLE_TYPE_CLR);
|
||||
REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0);
|
||||
|
||||
if (keyType == AR_KEYTABLE_TYPE_TKIP) {
|
||||
u16 micentry = entry + 64;
|
||||
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);
|
||||
if (common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED) {
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),
|
||||
AR_KEYTABLE_TYPE_CLR);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
REGWRITE_BUFFER_FLUSH(ah);
|
||||
|
||||
return true;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_hw_keyreset);
|
||||
|
||||
bool ath_hw_keysetmac(struct ath_common *common, u16 entry, const u8 *mac)
|
||||
{
|
||||
u32 macHi, macLo;
|
||||
u32 unicast_flag = AR_KEYTABLE_VALID;
|
||||
void *ah = common->ah;
|
||||
|
||||
if (entry >= common->keymax) {
|
||||
ath_err(common, "keysetmac: keycache entry %u out of range\n",
|
||||
entry);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (mac != NULL) {
|
||||
/*
|
||||
* AR_KEYTABLE_VALID indicates that the address is a unicast
|
||||
* address, which must match the transmitter address for
|
||||
* decrypting frames.
|
||||
* Not setting this bit allows the hardware to use the key
|
||||
* for multicast frame decryption.
|
||||
*/
|
||||
if (mac[0] & 0x01)
|
||||
unicast_flag = 0;
|
||||
|
||||
macLo = get_unaligned_le32(mac);
|
||||
macHi = get_unaligned_le16(mac + 4);
|
||||
macLo >>= 1;
|
||||
macLo |= (macHi & 1) << 31;
|
||||
macHi >>= 1;
|
||||
} else {
|
||||
macLo = macHi = 0;
|
||||
}
|
||||
ENABLE_REGWRITE_BUFFER(ah);
|
||||
|
||||
REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo);
|
||||
REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | unicast_flag);
|
||||
|
||||
REGWRITE_BUFFER_FLUSH(ah);
|
||||
|
||||
return true;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_hw_keysetmac);
|
||||
|
||||
static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry,
|
||||
const struct ath_keyval *k,
|
||||
const u8 *mac)
|
||||
{
|
||||
void *ah = common->ah;
|
||||
u32 key0, key1, key2, key3, key4;
|
||||
u32 keyType;
|
||||
|
||||
if (entry >= common->keymax) {
|
||||
ath_err(common, "set-entry: keycache entry %u out of range\n",
|
||||
entry);
|
||||
return false;
|
||||
}
|
||||
|
||||
switch (k->kv_type) {
|
||||
case ATH_CIPHER_AES_OCB:
|
||||
keyType = AR_KEYTABLE_TYPE_AES;
|
||||
break;
|
||||
case ATH_CIPHER_AES_CCM:
|
||||
if (!(common->crypt_caps & ATH_CRYPT_CAP_CIPHER_AESCCM)) {
|
||||
ath_dbg(common, ANY,
|
||||
"AES-CCM not supported by this mac rev\n");
|
||||
return false;
|
||||
}
|
||||
keyType = AR_KEYTABLE_TYPE_CCM;
|
||||
break;
|
||||
case ATH_CIPHER_TKIP:
|
||||
keyType = AR_KEYTABLE_TYPE_TKIP;
|
||||
if (entry + 64 >= common->keymax) {
|
||||
ath_dbg(common, ANY,
|
||||
"entry %u inappropriate for TKIP\n", entry);
|
||||
return false;
|
||||
}
|
||||
break;
|
||||
case ATH_CIPHER_WEP:
|
||||
if (k->kv_len < WLAN_KEY_LEN_WEP40) {
|
||||
ath_dbg(common, ANY, "WEP key length %u too small\n",
|
||||
k->kv_len);
|
||||
return false;
|
||||
}
|
||||
if (k->kv_len <= WLAN_KEY_LEN_WEP40)
|
||||
keyType = AR_KEYTABLE_TYPE_40;
|
||||
else if (k->kv_len <= WLAN_KEY_LEN_WEP104)
|
||||
keyType = AR_KEYTABLE_TYPE_104;
|
||||
else
|
||||
keyType = AR_KEYTABLE_TYPE_128;
|
||||
break;
|
||||
case ATH_CIPHER_CLR:
|
||||
keyType = AR_KEYTABLE_TYPE_CLR;
|
||||
break;
|
||||
default:
|
||||
ath_err(common, "cipher %u not supported\n", k->kv_type);
|
||||
return false;
|
||||
}
|
||||
|
||||
key0 = get_unaligned_le32(k->kv_val + 0);
|
||||
key1 = get_unaligned_le16(k->kv_val + 4);
|
||||
key2 = get_unaligned_le32(k->kv_val + 6);
|
||||
key3 = get_unaligned_le16(k->kv_val + 10);
|
||||
key4 = get_unaligned_le32(k->kv_val + 12);
|
||||
if (k->kv_len <= WLAN_KEY_LEN_WEP104)
|
||||
key4 &= 0xff;
|
||||
|
||||
/*
|
||||
* Note: Key cache registers access special memory area that requires
|
||||
* two 32-bit writes to actually update the values in the internal
|
||||
* memory. Consequently, the exact order and pairs used here must be
|
||||
* maintained.
|
||||
*/
|
||||
|
||||
if (keyType == AR_KEYTABLE_TYPE_TKIP) {
|
||||
u16 micentry = entry + 64;
|
||||
|
||||
/*
|
||||
* Write inverted key[47:0] first to avoid Michael MIC errors
|
||||
* on frames that could be sent or received at the same time.
|
||||
* The correct key will be written in the end once everything
|
||||
* else is ready.
|
||||
*/
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), ~key0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), ~key1);
|
||||
|
||||
/* Write key[95:48] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);
|
||||
|
||||
/* Write key[127:96] and key type */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);
|
||||
|
||||
/* Write MAC address for the entry */
|
||||
(void) ath_hw_keysetmac(common, entry, mac);
|
||||
|
||||
if (common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED) {
|
||||
/*
|
||||
* TKIP uses two key cache entries:
|
||||
* Michael MIC TX/RX keys in the same key cache entry
|
||||
* (idx = main index + 64):
|
||||
* key0 [31:0] = RX key [31:0]
|
||||
* key1 [15:0] = TX key [31:16]
|
||||
* key1 [31:16] = reserved
|
||||
* key2 [31:0] = RX key [63:32]
|
||||
* key3 [15:0] = TX key [15:0]
|
||||
* key3 [31:16] = reserved
|
||||
* key4 [31:0] = TX key [63:32]
|
||||
*/
|
||||
u32 mic0, mic1, mic2, mic3, mic4;
|
||||
|
||||
mic0 = get_unaligned_le32(k->kv_mic + 0);
|
||||
mic2 = get_unaligned_le32(k->kv_mic + 4);
|
||||
mic1 = get_unaligned_le16(k->kv_txmic + 2) & 0xffff;
|
||||
mic3 = get_unaligned_le16(k->kv_txmic + 0) & 0xffff;
|
||||
mic4 = get_unaligned_le32(k->kv_txmic + 4);
|
||||
|
||||
ENABLE_REGWRITE_BUFFER(ah);
|
||||
|
||||
/* Write RX[31:0] and TX[31:16] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), mic1);
|
||||
|
||||
/* Write RX[63:32] and TX[15:0] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), mic3);
|
||||
|
||||
/* Write TX[63:32] and keyType(reserved) */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), mic4);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),
|
||||
AR_KEYTABLE_TYPE_CLR);
|
||||
|
||||
REGWRITE_BUFFER_FLUSH(ah);
|
||||
|
||||
} else {
|
||||
/*
|
||||
* TKIP uses four key cache entries (two for group
|
||||
* keys):
|
||||
* Michael MIC TX/RX keys are in different key cache
|
||||
* entries (idx = main index + 64 for TX and
|
||||
* main index + 32 + 96 for RX):
|
||||
* key0 [31:0] = TX/RX MIC key [31:0]
|
||||
* key1 [31:0] = reserved
|
||||
* key2 [31:0] = TX/RX MIC key [63:32]
|
||||
* key3 [31:0] = reserved
|
||||
* key4 [31:0] = reserved
|
||||
*
|
||||
* Upper layer code will call this function separately
|
||||
* for TX and RX keys when these registers offsets are
|
||||
* used.
|
||||
*/
|
||||
u32 mic0, mic2;
|
||||
|
||||
mic0 = get_unaligned_le32(k->kv_mic + 0);
|
||||
mic2 = get_unaligned_le32(k->kv_mic + 4);
|
||||
|
||||
ENABLE_REGWRITE_BUFFER(ah);
|
||||
|
||||
/* Write MIC key[31:0] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);
|
||||
|
||||
/* Write MIC key[63:32] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);
|
||||
|
||||
/* Write TX[63:32] and keyType(reserved) */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),
|
||||
AR_KEYTABLE_TYPE_CLR);
|
||||
|
||||
REGWRITE_BUFFER_FLUSH(ah);
|
||||
}
|
||||
|
||||
ENABLE_REGWRITE_BUFFER(ah);
|
||||
|
||||
/* MAC address registers are reserved for the MIC entry */
|
||||
REG_WRITE(ah, AR_KEYTABLE_MAC0(micentry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_MAC1(micentry), 0);
|
||||
|
||||
/*
|
||||
* Write the correct (un-inverted) key[47:0] last to enable
|
||||
* TKIP now that all other registers are set with correct
|
||||
* values.
|
||||
*/
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);
|
||||
|
||||
REGWRITE_BUFFER_FLUSH(ah);
|
||||
} else {
|
||||
ENABLE_REGWRITE_BUFFER(ah);
|
||||
|
||||
/* Write key[47:0] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);
|
||||
|
||||
/* Write key[95:48] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);
|
||||
|
||||
/* Write key[127:96] and key type */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);
|
||||
|
||||
REGWRITE_BUFFER_FLUSH(ah);
|
||||
|
||||
/* Write MAC address for the entry */
|
||||
(void) ath_hw_keysetmac(common, entry, mac);
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
|
||||
struct ath_keyval *hk, const u8 *addr,
|
||||
bool authenticator)
|
||||
{
|
||||
const u8 *key_rxmic;
|
||||
const u8 *key_txmic;
|
||||
|
||||
key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
|
||||
key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
|
||||
|
||||
if (addr == NULL) {
|
||||
/*
|
||||
* Group key installation - only two key cache entries are used
|
||||
* regardless of splitmic capability since group key is only
|
||||
* used either for TX or RX.
|
||||
*/
|
||||
if (authenticator) {
|
||||
memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
|
||||
memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
|
||||
} else {
|
||||
memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
|
||||
memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
|
||||
}
|
||||
return ath_hw_set_keycache_entry(common, keyix, hk, addr);
|
||||
}
|
||||
if (common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED) {
|
||||
/* TX and RX keys share the same key cache entry. */
|
||||
memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
|
||||
memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
|
||||
return ath_hw_set_keycache_entry(common, keyix, hk, addr);
|
||||
}
|
||||
|
||||
/* Separate key cache entries for TX and RX */
|
||||
|
||||
/* TX key goes at first index, RX key at +32. */
|
||||
memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
|
||||
if (!ath_hw_set_keycache_entry(common, keyix, hk, NULL)) {
|
||||
/* TX MIC entry failed. No need to proceed further */
|
||||
ath_err(common, "Setting TX MIC Key Failed\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
|
||||
/* XXX delete tx key on failure? */
|
||||
return ath_hw_set_keycache_entry(common, keyix + 32, hk, addr);
|
||||
}
|
||||
|
||||
static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
|
||||
if (test_bit(i, common->keymap) ||
|
||||
test_bit(i + 64, common->keymap))
|
||||
continue; /* At least one part of TKIP key allocated */
|
||||
if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED) &&
|
||||
(test_bit(i + 32, common->keymap) ||
|
||||
test_bit(i + 64 + 32, common->keymap)))
|
||||
continue; /* At least one part of TKIP key allocated */
|
||||
|
||||
/* Found a free slot for a TKIP key */
|
||||
return i;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ath_reserve_key_cache_slot(struct ath_common *common,
|
||||
u32 cipher)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (cipher == WLAN_CIPHER_SUITE_TKIP)
|
||||
return ath_reserve_key_cache_slot_tkip(common);
|
||||
|
||||
/* First, try to find slots that would not be available for TKIP. */
|
||||
if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)) {
|
||||
for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
|
||||
if (!test_bit(i, common->keymap) &&
|
||||
(test_bit(i + 32, common->keymap) ||
|
||||
test_bit(i + 64, common->keymap) ||
|
||||
test_bit(i + 64 + 32, common->keymap)))
|
||||
return i;
|
||||
if (!test_bit(i + 32, common->keymap) &&
|
||||
(test_bit(i, common->keymap) ||
|
||||
test_bit(i + 64, common->keymap) ||
|
||||
test_bit(i + 64 + 32, common->keymap)))
|
||||
return i + 32;
|
||||
if (!test_bit(i + 64, common->keymap) &&
|
||||
(test_bit(i , common->keymap) ||
|
||||
test_bit(i + 32, common->keymap) ||
|
||||
test_bit(i + 64 + 32, common->keymap)))
|
||||
return i + 64;
|
||||
if (!test_bit(i + 64 + 32, common->keymap) &&
|
||||
(test_bit(i, common->keymap) ||
|
||||
test_bit(i + 32, common->keymap) ||
|
||||
test_bit(i + 64, common->keymap)))
|
||||
return i + 64 + 32;
|
||||
}
|
||||
} else {
|
||||
for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
|
||||
if (!test_bit(i, common->keymap) &&
|
||||
test_bit(i + 64, common->keymap))
|
||||
return i;
|
||||
if (test_bit(i, common->keymap) &&
|
||||
!test_bit(i + 64, common->keymap))
|
||||
return i + 64;
|
||||
}
|
||||
}
|
||||
|
||||
/* No partially used TKIP slots, pick any available slot */
|
||||
for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
|
||||
/* Do not allow slots that could be needed for TKIP group keys
|
||||
* to be used. This limitation could be removed if we know that
|
||||
* TKIP will not be used. */
|
||||
if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
|
||||
continue;
|
||||
if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)) {
|
||||
if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
|
||||
continue;
|
||||
if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
|
||||
continue;
|
||||
}
|
||||
|
||||
if (!test_bit(i, common->keymap))
|
||||
return i; /* Found a free slot for a key */
|
||||
}
|
||||
|
||||
/* No free slot found */
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
* Configure encryption in the HW.
|
||||
*/
|
||||
int ath_key_config(struct ath_common *common,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta,
|
||||
struct ieee80211_key_conf *key)
|
||||
{
|
||||
struct ath_keyval hk;
|
||||
const u8 *mac = NULL;
|
||||
u8 gmac[ETH_ALEN];
|
||||
int ret = 0;
|
||||
int idx;
|
||||
|
||||
memset(&hk, 0, sizeof(hk));
|
||||
|
||||
switch (key->cipher) {
|
||||
case 0:
|
||||
hk.kv_type = ATH_CIPHER_CLR;
|
||||
break;
|
||||
case WLAN_CIPHER_SUITE_WEP40:
|
||||
case WLAN_CIPHER_SUITE_WEP104:
|
||||
hk.kv_type = ATH_CIPHER_WEP;
|
||||
break;
|
||||
case WLAN_CIPHER_SUITE_TKIP:
|
||||
hk.kv_type = ATH_CIPHER_TKIP;
|
||||
break;
|
||||
case WLAN_CIPHER_SUITE_CCMP:
|
||||
hk.kv_type = ATH_CIPHER_AES_CCM;
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
hk.kv_len = key->keylen;
|
||||
if (key->keylen)
|
||||
memcpy(hk.kv_val, key->key, key->keylen);
|
||||
|
||||
if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
|
||||
switch (vif->type) {
|
||||
case NL80211_IFTYPE_AP:
|
||||
memcpy(gmac, vif->addr, ETH_ALEN);
|
||||
gmac[0] |= 0x01;
|
||||
mac = gmac;
|
||||
idx = ath_reserve_key_cache_slot(common, key->cipher);
|
||||
break;
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
if (!sta) {
|
||||
idx = key->keyidx;
|
||||
break;
|
||||
}
|
||||
memcpy(gmac, sta->addr, ETH_ALEN);
|
||||
gmac[0] |= 0x01;
|
||||
mac = gmac;
|
||||
idx = ath_reserve_key_cache_slot(common, key->cipher);
|
||||
break;
|
||||
default:
|
||||
idx = key->keyidx;
|
||||
break;
|
||||
}
|
||||
} else if (key->keyidx) {
|
||||
if (WARN_ON(!sta))
|
||||
return -EOPNOTSUPP;
|
||||
mac = sta->addr;
|
||||
|
||||
if (vif->type != NL80211_IFTYPE_AP) {
|
||||
/* Only keyidx 0 should be used with unicast key, but
|
||||
* allow this for client mode for now. */
|
||||
idx = key->keyidx;
|
||||
} else
|
||||
return -EIO;
|
||||
} else {
|
||||
if (WARN_ON(!sta))
|
||||
return -EOPNOTSUPP;
|
||||
mac = sta->addr;
|
||||
|
||||
idx = ath_reserve_key_cache_slot(common, key->cipher);
|
||||
}
|
||||
|
||||
if (idx < 0)
|
||||
return -ENOSPC; /* no free key cache entries */
|
||||
|
||||
if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
|
||||
ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
|
||||
vif->type == NL80211_IFTYPE_AP);
|
||||
else
|
||||
ret = ath_hw_set_keycache_entry(common, idx, &hk, mac);
|
||||
|
||||
if (!ret)
|
||||
return -EIO;
|
||||
|
||||
set_bit(idx, common->keymap);
|
||||
if (key->cipher == WLAN_CIPHER_SUITE_CCMP)
|
||||
set_bit(idx, common->ccmp_keymap);
|
||||
|
||||
if (key->cipher == WLAN_CIPHER_SUITE_TKIP) {
|
||||
set_bit(idx + 64, common->keymap);
|
||||
set_bit(idx, common->tkip_keymap);
|
||||
set_bit(idx + 64, common->tkip_keymap);
|
||||
if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)) {
|
||||
set_bit(idx + 32, common->keymap);
|
||||
set_bit(idx + 64 + 32, common->keymap);
|
||||
set_bit(idx + 32, common->tkip_keymap);
|
||||
set_bit(idx + 64 + 32, common->tkip_keymap);
|
||||
}
|
||||
}
|
||||
|
||||
return idx;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_key_config);
|
||||
|
||||
/*
|
||||
* Delete Key.
|
||||
*/
|
||||
void ath_key_delete(struct ath_common *common, u8 hw_key_idx)
|
||||
{
|
||||
/* Leave CCMP and TKIP (main key) configured to avoid disabling
|
||||
* encryption for potentially pending frames already in a TXQ with the
|
||||
* keyix pointing to this key entry. Instead, only clear the MAC address
|
||||
* to prevent RX processing from using this key cache entry.
|
||||
*/
|
||||
if (test_bit(hw_key_idx, common->ccmp_keymap) ||
|
||||
test_bit(hw_key_idx, common->tkip_keymap))
|
||||
ath_hw_keysetmac(common, hw_key_idx, NULL);
|
||||
else
|
||||
ath_hw_keyreset(common, hw_key_idx);
|
||||
if (hw_key_idx < IEEE80211_WEP_NKID)
|
||||
return;
|
||||
|
||||
clear_bit(hw_key_idx, common->keymap);
|
||||
clear_bit(hw_key_idx, common->ccmp_keymap);
|
||||
if (!test_bit(hw_key_idx, common->tkip_keymap))
|
||||
return;
|
||||
|
||||
clear_bit(hw_key_idx + 64, common->keymap);
|
||||
|
||||
clear_bit(hw_key_idx, common->tkip_keymap);
|
||||
clear_bit(hw_key_idx + 64, common->tkip_keymap);
|
||||
|
||||
if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)) {
|
||||
ath_hw_keyreset(common, hw_key_idx + 32);
|
||||
clear_bit(hw_key_idx + 32, common->keymap);
|
||||
clear_bit(hw_key_idx + 64 + 32, common->keymap);
|
||||
|
||||
clear_bit(hw_key_idx + 32, common->tkip_keymap);
|
||||
clear_bit(hw_key_idx + 64 + 32, common->tkip_keymap);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(ath_key_delete);
|
||||
104
sys/contrib/dev/athk/main.c
Normal file
104
sys/contrib/dev/athk/main.c
Normal file
@ -0,0 +1,104 @@
|
||||
/*
|
||||
* Copyright (c) 2009 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "ath.h"
|
||||
#include "trace.h"
|
||||
|
||||
MODULE_AUTHOR("Atheros Communications");
|
||||
MODULE_DESCRIPTION("Shared library for Atheros wireless LAN cards.");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
#if defined(__FreeBSD__)
|
||||
MODULE_VERSION(athk_common, 1);
|
||||
MODULE_DEPEND(athk_common, linuxkpi, 1, 1, 1);
|
||||
MODULE_DEPEND(athk_common, linuxkpi_wlan, 1, 1, 1);
|
||||
#endif
|
||||
|
||||
struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
|
||||
u32 len,
|
||||
gfp_t gfp_mask)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
u32 off;
|
||||
|
||||
/*
|
||||
* Cache-line-align. This is important (for the
|
||||
* 5210 at least) as not doing so causes bogus data
|
||||
* in rx'd frames.
|
||||
*/
|
||||
|
||||
/* Note: the kernel can allocate a value greater than
|
||||
* what we ask it to give us. We really only need 4 KB as that
|
||||
* is this hardware supports and in fact we need at least 3849
|
||||
* as that is the MAX AMSDU size this hardware supports.
|
||||
* Unfortunately this means we may get 8 KB here from the
|
||||
* kernel... and that is actually what is observed on some
|
||||
* systems :( */
|
||||
skb = __dev_alloc_skb(len + common->cachelsz - 1, gfp_mask);
|
||||
if (skb != NULL) {
|
||||
off = ((unsigned long) skb->data) % common->cachelsz;
|
||||
if (off != 0)
|
||||
skb_reserve(skb, common->cachelsz - off);
|
||||
} else {
|
||||
pr_err("skbuff alloc of size %u failed\n", len);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return skb;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_rxbuf_alloc);
|
||||
|
||||
bool ath_is_mybeacon(struct ath_common *common, struct ieee80211_hdr *hdr)
|
||||
{
|
||||
return ieee80211_is_beacon(hdr->frame_control) &&
|
||||
!is_zero_ether_addr(common->curbssid) &&
|
||||
ether_addr_equal_64bits(hdr->addr3, common->curbssid);
|
||||
}
|
||||
EXPORT_SYMBOL(ath_is_mybeacon);
|
||||
|
||||
void ath_printk(const char *level, const struct ath_common* common,
|
||||
const char *fmt, ...)
|
||||
{
|
||||
struct va_format vaf;
|
||||
va_list args;
|
||||
|
||||
va_start(args, fmt);
|
||||
|
||||
vaf.fmt = fmt;
|
||||
vaf.va = &args;
|
||||
|
||||
if (common && common->hw && common->hw->wiphy) {
|
||||
printk("%sath: %s: %pV",
|
||||
level, wiphy_name(common->hw->wiphy), &vaf);
|
||||
trace_ath_log(common->hw->wiphy, &vaf);
|
||||
} else {
|
||||
printk("%sath: %pV", level, &vaf);
|
||||
}
|
||||
|
||||
va_end(args);
|
||||
}
|
||||
EXPORT_SYMBOL(ath_printk);
|
||||
|
||||
const char *ath_bus_type_strings[] = {
|
||||
[ATH_PCI] = "pci",
|
||||
[ATH_AHB] = "ahb",
|
||||
[ATH_USB] = "usb",
|
||||
};
|
||||
EXPORT_SYMBOL(ath_bus_type_strings);
|
||||
65
sys/contrib/dev/athk/reg.h
Normal file
65
sys/contrib/dev/athk/reg.h
Normal file
@ -0,0 +1,65 @@
|
||||
/*
|
||||
* Copyright (c) 2008-2009 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef ATH_REGISTERS_H
|
||||
#define ATH_REGISTERS_H
|
||||
|
||||
#define AR_MIBC 0x0040
|
||||
#define AR_MIBC_COW 0x00000001
|
||||
#define AR_MIBC_FMC 0x00000002
|
||||
#define AR_MIBC_CMC 0x00000004
|
||||
#define AR_MIBC_MCS 0x00000008
|
||||
|
||||
#define AR_STA_ID0 0x8000
|
||||
#define AR_STA_ID1 0x8004
|
||||
#define AR_STA_ID1_SADH_MASK 0x0000ffff
|
||||
|
||||
/*
|
||||
* BSSID mask registers. See ath_hw_set_bssid_mask()
|
||||
* for detailed documentation about these registers.
|
||||
*/
|
||||
#define AR_BSSMSKL 0x80e0
|
||||
#define AR_BSSMSKU 0x80e4
|
||||
|
||||
#define AR_TFCNT 0x80ec
|
||||
#define AR_RFCNT 0x80f0
|
||||
#define AR_RCCNT 0x80f4
|
||||
#define AR_CCCNT 0x80f8
|
||||
|
||||
#define AR_KEYTABLE_0 0x8800
|
||||
#define AR_KEYTABLE(_n) (AR_KEYTABLE_0 + ((_n)*32))
|
||||
#define AR_KEY_CACHE_SIZE 128
|
||||
#define AR_RSVD_KEYTABLE_ENTRIES 4
|
||||
#define AR_KEY_TYPE 0x00000007
|
||||
#define AR_KEYTABLE_TYPE_40 0x00000000
|
||||
#define AR_KEYTABLE_TYPE_104 0x00000001
|
||||
#define AR_KEYTABLE_TYPE_128 0x00000003
|
||||
#define AR_KEYTABLE_TYPE_TKIP 0x00000004
|
||||
#define AR_KEYTABLE_TYPE_AES 0x00000005
|
||||
#define AR_KEYTABLE_TYPE_CCM 0x00000006
|
||||
#define AR_KEYTABLE_TYPE_CLR 0x00000007
|
||||
#define AR_KEYTABLE_ANT 0x00000008
|
||||
#define AR_KEYTABLE_VALID 0x00008000
|
||||
#define AR_KEYTABLE_KEY0(_n) (AR_KEYTABLE(_n) + 0)
|
||||
#define AR_KEYTABLE_KEY1(_n) (AR_KEYTABLE(_n) + 4)
|
||||
#define AR_KEYTABLE_KEY2(_n) (AR_KEYTABLE(_n) + 8)
|
||||
#define AR_KEYTABLE_KEY3(_n) (AR_KEYTABLE(_n) + 12)
|
||||
#define AR_KEYTABLE_KEY4(_n) (AR_KEYTABLE(_n) + 16)
|
||||
#define AR_KEYTABLE_TYPE(_n) (AR_KEYTABLE(_n) + 20)
|
||||
#define AR_KEYTABLE_MAC0(_n) (AR_KEYTABLE(_n) + 24)
|
||||
#define AR_KEYTABLE_MAC1(_n) (AR_KEYTABLE(_n) + 28)
|
||||
|
||||
#endif /* ATH_REGISTERS_H */
|
||||
812
sys/contrib/dev/athk/regd.c
Normal file
812
sys/contrib/dev/athk/regd.c
Normal file
@ -0,0 +1,812 @@
|
||||
/*
|
||||
* Copyright (c) 2008-2009 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/export.h>
|
||||
#include <net/cfg80211.h>
|
||||
#include <net/mac80211.h>
|
||||
#include "regd.h"
|
||||
#include "regd_common.h"
|
||||
|
||||
static int __ath_regd_init(struct ath_regulatory *reg);
|
||||
|
||||
/*
|
||||
* This is a set of common rules used by our world regulatory domains.
|
||||
* We have 12 world regulatory domains. To save space we consolidate
|
||||
* the regulatory domains in 5 structures by frequency and change
|
||||
* the flags on our reg_notifier() on a case by case basis.
|
||||
*/
|
||||
|
||||
/* Only these channels all allow active scan on all world regulatory domains */
|
||||
#define ATH_2GHZ_CH01_11 REG_RULE(2412-10, 2462+10, 40, 0, 20, 0)
|
||||
|
||||
/* We enable active scan on these a case by case basis by regulatory domain */
|
||||
#define ATH_2GHZ_CH12_13 REG_RULE(2467-10, 2472+10, 40, 0, 20,\
|
||||
NL80211_RRF_NO_IR)
|
||||
#define ATH_2GHZ_CH14 REG_RULE(2484-10, 2484+10, 40, 0, 20,\
|
||||
NL80211_RRF_NO_IR | \
|
||||
NL80211_RRF_NO_OFDM)
|
||||
|
||||
/* We allow IBSS on these on a case by case basis by regulatory domain */
|
||||
#define ATH_5GHZ_5150_5350 REG_RULE(5150-10, 5350+10, 80, 0, 30,\
|
||||
NL80211_RRF_NO_IR)
|
||||
#define ATH_5GHZ_5470_5850 REG_RULE(5470-10, 5850+10, 80, 0, 30,\
|
||||
NL80211_RRF_NO_IR)
|
||||
#define ATH_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 80, 0, 30,\
|
||||
NL80211_RRF_NO_IR)
|
||||
|
||||
#define ATH_2GHZ_ALL ATH_2GHZ_CH01_11, \
|
||||
ATH_2GHZ_CH12_13, \
|
||||
ATH_2GHZ_CH14
|
||||
|
||||
#define ATH_5GHZ_ALL ATH_5GHZ_5150_5350, \
|
||||
ATH_5GHZ_5470_5850
|
||||
|
||||
/* This one skips what we call "mid band" */
|
||||
#define ATH_5GHZ_NO_MIDBAND ATH_5GHZ_5150_5350, \
|
||||
ATH_5GHZ_5725_5850
|
||||
|
||||
/* Can be used for:
|
||||
* 0x60, 0x61, 0x62 */
|
||||
static const struct ieee80211_regdomain ath_world_regdom_60_61_62 = {
|
||||
.n_reg_rules = 5,
|
||||
.alpha2 = "99",
|
||||
.reg_rules = {
|
||||
ATH_2GHZ_ALL,
|
||||
ATH_5GHZ_ALL,
|
||||
}
|
||||
};
|
||||
|
||||
/* Can be used by 0x63 and 0x65 */
|
||||
static const struct ieee80211_regdomain ath_world_regdom_63_65 = {
|
||||
.n_reg_rules = 4,
|
||||
.alpha2 = "99",
|
||||
.reg_rules = {
|
||||
ATH_2GHZ_CH01_11,
|
||||
ATH_2GHZ_CH12_13,
|
||||
ATH_5GHZ_NO_MIDBAND,
|
||||
}
|
||||
};
|
||||
|
||||
/* Can be used by 0x64 only */
|
||||
static const struct ieee80211_regdomain ath_world_regdom_64 = {
|
||||
.n_reg_rules = 3,
|
||||
.alpha2 = "99",
|
||||
.reg_rules = {
|
||||
ATH_2GHZ_CH01_11,
|
||||
ATH_5GHZ_NO_MIDBAND,
|
||||
}
|
||||
};
|
||||
|
||||
/* Can be used by 0x66 and 0x69 */
|
||||
static const struct ieee80211_regdomain ath_world_regdom_66_69 = {
|
||||
.n_reg_rules = 3,
|
||||
.alpha2 = "99",
|
||||
.reg_rules = {
|
||||
ATH_2GHZ_CH01_11,
|
||||
ATH_5GHZ_ALL,
|
||||
}
|
||||
};
|
||||
|
||||
/* Can be used by 0x67, 0x68, 0x6A and 0x6C */
|
||||
static const struct ieee80211_regdomain ath_world_regdom_67_68_6A_6C = {
|
||||
.n_reg_rules = 4,
|
||||
.alpha2 = "99",
|
||||
.reg_rules = {
|
||||
ATH_2GHZ_CH01_11,
|
||||
ATH_2GHZ_CH12_13,
|
||||
ATH_5GHZ_ALL,
|
||||
}
|
||||
};
|
||||
|
||||
static bool dynamic_country_user_possible(struct ath_regulatory *reg)
|
||||
{
|
||||
if (IS_ENABLED(CONFIG_ATH_REG_DYNAMIC_USER_CERT_TESTING))
|
||||
return true;
|
||||
|
||||
switch (reg->country_code) {
|
||||
case CTRY_UNITED_STATES:
|
||||
case CTRY_JAPAN1:
|
||||
case CTRY_JAPAN2:
|
||||
case CTRY_JAPAN3:
|
||||
case CTRY_JAPAN4:
|
||||
case CTRY_JAPAN5:
|
||||
case CTRY_JAPAN6:
|
||||
case CTRY_JAPAN7:
|
||||
case CTRY_JAPAN8:
|
||||
case CTRY_JAPAN9:
|
||||
case CTRY_JAPAN10:
|
||||
case CTRY_JAPAN11:
|
||||
case CTRY_JAPAN12:
|
||||
case CTRY_JAPAN13:
|
||||
case CTRY_JAPAN14:
|
||||
case CTRY_JAPAN15:
|
||||
case CTRY_JAPAN16:
|
||||
case CTRY_JAPAN17:
|
||||
case CTRY_JAPAN18:
|
||||
case CTRY_JAPAN19:
|
||||
case CTRY_JAPAN20:
|
||||
case CTRY_JAPAN21:
|
||||
case CTRY_JAPAN22:
|
||||
case CTRY_JAPAN23:
|
||||
case CTRY_JAPAN24:
|
||||
case CTRY_JAPAN25:
|
||||
case CTRY_JAPAN26:
|
||||
case CTRY_JAPAN27:
|
||||
case CTRY_JAPAN28:
|
||||
case CTRY_JAPAN29:
|
||||
case CTRY_JAPAN30:
|
||||
case CTRY_JAPAN31:
|
||||
case CTRY_JAPAN32:
|
||||
case CTRY_JAPAN33:
|
||||
case CTRY_JAPAN34:
|
||||
case CTRY_JAPAN35:
|
||||
case CTRY_JAPAN36:
|
||||
case CTRY_JAPAN37:
|
||||
case CTRY_JAPAN38:
|
||||
case CTRY_JAPAN39:
|
||||
case CTRY_JAPAN40:
|
||||
case CTRY_JAPAN41:
|
||||
case CTRY_JAPAN42:
|
||||
case CTRY_JAPAN43:
|
||||
case CTRY_JAPAN44:
|
||||
case CTRY_JAPAN45:
|
||||
case CTRY_JAPAN46:
|
||||
case CTRY_JAPAN47:
|
||||
case CTRY_JAPAN48:
|
||||
case CTRY_JAPAN49:
|
||||
case CTRY_JAPAN50:
|
||||
case CTRY_JAPAN51:
|
||||
case CTRY_JAPAN52:
|
||||
case CTRY_JAPAN53:
|
||||
case CTRY_JAPAN54:
|
||||
case CTRY_JAPAN55:
|
||||
case CTRY_JAPAN56:
|
||||
case CTRY_JAPAN57:
|
||||
case CTRY_JAPAN58:
|
||||
case CTRY_JAPAN59:
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool ath_reg_dyn_country_user_allow(struct ath_regulatory *reg)
|
||||
{
|
||||
if (!IS_ENABLED(CONFIG_ATH_REG_DYNAMIC_USER_REG_HINTS))
|
||||
return false;
|
||||
if (!dynamic_country_user_possible(reg))
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
static inline bool is_wwr_sku(u16 regd)
|
||||
{
|
||||
return ((regd & COUNTRY_ERD_FLAG) != COUNTRY_ERD_FLAG) &&
|
||||
(((regd & WORLD_SKU_MASK) == WORLD_SKU_PREFIX) ||
|
||||
(regd == WORLD));
|
||||
}
|
||||
|
||||
static u16 ath_regd_get_eepromRD(struct ath_regulatory *reg)
|
||||
{
|
||||
return reg->current_rd & ~WORLDWIDE_ROAMING_FLAG;
|
||||
}
|
||||
|
||||
bool ath_is_world_regd(struct ath_regulatory *reg)
|
||||
{
|
||||
return is_wwr_sku(ath_regd_get_eepromRD(reg));
|
||||
}
|
||||
EXPORT_SYMBOL(ath_is_world_regd);
|
||||
|
||||
static const struct ieee80211_regdomain *ath_default_world_regdomain(void)
|
||||
{
|
||||
/* this is the most restrictive */
|
||||
return &ath_world_regdom_64;
|
||||
}
|
||||
|
||||
static const struct
|
||||
ieee80211_regdomain *ath_world_regdomain(struct ath_regulatory *reg)
|
||||
{
|
||||
switch (reg->regpair->reg_domain) {
|
||||
case 0x60:
|
||||
case 0x61:
|
||||
case 0x62:
|
||||
return &ath_world_regdom_60_61_62;
|
||||
case 0x63:
|
||||
case 0x65:
|
||||
return &ath_world_regdom_63_65;
|
||||
case 0x64:
|
||||
return &ath_world_regdom_64;
|
||||
case 0x66:
|
||||
case 0x69:
|
||||
return &ath_world_regdom_66_69;
|
||||
case 0x67:
|
||||
case 0x68:
|
||||
case 0x6A:
|
||||
case 0x6C:
|
||||
return &ath_world_regdom_67_68_6A_6C;
|
||||
default:
|
||||
WARN_ON(1);
|
||||
return ath_default_world_regdomain();
|
||||
}
|
||||
}
|
||||
|
||||
bool ath_is_49ghz_allowed(u16 regdomain)
|
||||
{
|
||||
/* possibly more */
|
||||
return regdomain == MKK9_MKKC;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_is_49ghz_allowed);
|
||||
|
||||
/* Frequency is one where radar detection is required */
|
||||
static bool ath_is_radar_freq(u16 center_freq,
|
||||
struct ath_regulatory *reg)
|
||||
|
||||
{
|
||||
if (reg->country_code == CTRY_INDIA)
|
||||
return (center_freq >= 5500 && center_freq <= 5700);
|
||||
return (center_freq >= 5260 && center_freq <= 5700);
|
||||
}
|
||||
|
||||
static void ath_force_clear_no_ir_chan(struct wiphy *wiphy,
|
||||
struct ieee80211_channel *ch)
|
||||
{
|
||||
const struct ieee80211_reg_rule *reg_rule;
|
||||
|
||||
reg_rule = freq_reg_info(wiphy, MHZ_TO_KHZ(ch->center_freq));
|
||||
if (IS_ERR(reg_rule))
|
||||
return;
|
||||
|
||||
if (!(reg_rule->flags & NL80211_RRF_NO_IR))
|
||||
if (ch->flags & IEEE80211_CHAN_NO_IR)
|
||||
ch->flags &= ~IEEE80211_CHAN_NO_IR;
|
||||
}
|
||||
|
||||
static void ath_force_clear_no_ir_freq(struct wiphy *wiphy, u16 center_freq)
|
||||
{
|
||||
struct ieee80211_channel *ch;
|
||||
|
||||
ch = ieee80211_get_channel(wiphy, center_freq);
|
||||
if (!ch)
|
||||
return;
|
||||
|
||||
ath_force_clear_no_ir_chan(wiphy, ch);
|
||||
}
|
||||
|
||||
static void ath_force_no_ir_chan(struct ieee80211_channel *ch)
|
||||
{
|
||||
ch->flags |= IEEE80211_CHAN_NO_IR;
|
||||
}
|
||||
|
||||
static void ath_force_no_ir_freq(struct wiphy *wiphy, u16 center_freq)
|
||||
{
|
||||
struct ieee80211_channel *ch;
|
||||
|
||||
ch = ieee80211_get_channel(wiphy, center_freq);
|
||||
if (!ch)
|
||||
return;
|
||||
|
||||
ath_force_no_ir_chan(ch);
|
||||
}
|
||||
|
||||
static void
|
||||
__ath_reg_apply_beaconing_flags(struct wiphy *wiphy,
|
||||
struct ath_regulatory *reg,
|
||||
enum nl80211_reg_initiator initiator,
|
||||
struct ieee80211_channel *ch)
|
||||
{
|
||||
if (ath_is_radar_freq(ch->center_freq, reg) ||
|
||||
(ch->flags & IEEE80211_CHAN_RADAR))
|
||||
return;
|
||||
|
||||
switch (initiator) {
|
||||
case NL80211_REGDOM_SET_BY_COUNTRY_IE:
|
||||
ath_force_clear_no_ir_chan(wiphy, ch);
|
||||
break;
|
||||
case NL80211_REGDOM_SET_BY_USER:
|
||||
if (ath_reg_dyn_country_user_allow(reg))
|
||||
ath_force_clear_no_ir_chan(wiphy, ch);
|
||||
break;
|
||||
default:
|
||||
if (ch->beacon_found)
|
||||
ch->flags &= ~IEEE80211_CHAN_NO_IR;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* These exception rules do not apply radar frequencies.
|
||||
*
|
||||
* - We enable initiating radiation if the country IE says its fine:
|
||||
* - If no country IE has been processed and a we determine we have
|
||||
* received a beacon on a channel we can enable initiating radiation.
|
||||
*/
|
||||
static void
|
||||
ath_reg_apply_beaconing_flags(struct wiphy *wiphy,
|
||||
struct ath_regulatory *reg,
|
||||
enum nl80211_reg_initiator initiator)
|
||||
{
|
||||
enum nl80211_band band;
|
||||
struct ieee80211_supported_band *sband;
|
||||
struct ieee80211_channel *ch;
|
||||
unsigned int i;
|
||||
|
||||
for (band = 0; band < NUM_NL80211_BANDS; band++) {
|
||||
if (!wiphy->bands[band])
|
||||
continue;
|
||||
sband = wiphy->bands[band];
|
||||
for (i = 0; i < sband->n_channels; i++) {
|
||||
ch = &sband->channels[i];
|
||||
__ath_reg_apply_beaconing_flags(wiphy, reg,
|
||||
initiator, ch);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* ath_reg_apply_ir_flags()
|
||||
* @wiphy: the wiphy to use
|
||||
* @reg: regulatory structure - used for country selection
|
||||
* @initiator: the regulatory hint initiator
|
||||
*
|
||||
* If no country IE has been received always enable passive scan
|
||||
* and no-ibss on these channels. This is only done for specific
|
||||
* regulatory SKUs.
|
||||
*
|
||||
* If a country IE has been received check its rule for this
|
||||
* channel first before enabling active scan. The passive scan
|
||||
* would have been enforced by the initial processing of our
|
||||
* custom regulatory domain.
|
||||
*/
|
||||
static void
|
||||
ath_reg_apply_ir_flags(struct wiphy *wiphy,
|
||||
struct ath_regulatory *reg,
|
||||
enum nl80211_reg_initiator initiator)
|
||||
{
|
||||
struct ieee80211_supported_band *sband;
|
||||
|
||||
sband = wiphy->bands[NL80211_BAND_2GHZ];
|
||||
if (!sband)
|
||||
return;
|
||||
|
||||
switch(initiator) {
|
||||
case NL80211_REGDOM_SET_BY_COUNTRY_IE:
|
||||
ath_force_clear_no_ir_freq(wiphy, 2467);
|
||||
ath_force_clear_no_ir_freq(wiphy, 2472);
|
||||
break;
|
||||
case NL80211_REGDOM_SET_BY_USER:
|
||||
if (!ath_reg_dyn_country_user_allow(reg))
|
||||
break;
|
||||
ath_force_clear_no_ir_freq(wiphy, 2467);
|
||||
ath_force_clear_no_ir_freq(wiphy, 2472);
|
||||
break;
|
||||
default:
|
||||
ath_force_no_ir_freq(wiphy, 2467);
|
||||
ath_force_no_ir_freq(wiphy, 2472);
|
||||
}
|
||||
}
|
||||
|
||||
/* Always apply Radar/DFS rules on freq range 5500 MHz - 5700 MHz */
|
||||
static void ath_reg_apply_radar_flags(struct wiphy *wiphy,
|
||||
struct ath_regulatory *reg)
|
||||
{
|
||||
struct ieee80211_supported_band *sband;
|
||||
struct ieee80211_channel *ch;
|
||||
unsigned int i;
|
||||
|
||||
if (!wiphy->bands[NL80211_BAND_5GHZ])
|
||||
return;
|
||||
|
||||
sband = wiphy->bands[NL80211_BAND_5GHZ];
|
||||
|
||||
for (i = 0; i < sband->n_channels; i++) {
|
||||
ch = &sband->channels[i];
|
||||
if (!ath_is_radar_freq(ch->center_freq, reg))
|
||||
continue;
|
||||
/* We always enable radar detection/DFS on this
|
||||
* frequency range. Additionally we also apply on
|
||||
* this frequency range:
|
||||
* - If STA mode does not yet have DFS supports disable
|
||||
* active scanning
|
||||
* - If adhoc mode does not support DFS yet then
|
||||
* disable adhoc in the frequency.
|
||||
* - If AP mode does not yet support radar detection/DFS
|
||||
* do not allow AP mode
|
||||
*/
|
||||
if (!(ch->flags & IEEE80211_CHAN_DISABLED))
|
||||
ch->flags |= IEEE80211_CHAN_RADAR |
|
||||
IEEE80211_CHAN_NO_IR;
|
||||
}
|
||||
}
|
||||
|
||||
static void ath_reg_apply_world_flags(struct wiphy *wiphy,
|
||||
enum nl80211_reg_initiator initiator,
|
||||
struct ath_regulatory *reg)
|
||||
{
|
||||
switch (reg->regpair->reg_domain) {
|
||||
case 0x60:
|
||||
case 0x63:
|
||||
case 0x66:
|
||||
case 0x67:
|
||||
case 0x6C:
|
||||
ath_reg_apply_beaconing_flags(wiphy, reg, initiator);
|
||||
break;
|
||||
case 0x68:
|
||||
ath_reg_apply_beaconing_flags(wiphy, reg, initiator);
|
||||
ath_reg_apply_ir_flags(wiphy, reg, initiator);
|
||||
break;
|
||||
default:
|
||||
if (ath_reg_dyn_country_user_allow(reg))
|
||||
ath_reg_apply_beaconing_flags(wiphy, reg, initiator);
|
||||
}
|
||||
}
|
||||
|
||||
u16 ath_regd_find_country_by_name(char *alpha2)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(allCountries); i++) {
|
||||
if (!memcmp(allCountries[i].isoName, alpha2, 2))
|
||||
return allCountries[i].countryCode;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_regd_find_country_by_name);
|
||||
|
||||
static int __ath_reg_dyn_country(struct wiphy *wiphy,
|
||||
struct ath_regulatory *reg,
|
||||
struct regulatory_request *request)
|
||||
{
|
||||
u16 country_code;
|
||||
|
||||
if (request->initiator == NL80211_REGDOM_SET_BY_COUNTRY_IE &&
|
||||
!ath_is_world_regd(reg))
|
||||
return -EINVAL;
|
||||
|
||||
country_code = ath_regd_find_country_by_name(request->alpha2);
|
||||
if (country_code == (u16) -1)
|
||||
return -EINVAL;
|
||||
|
||||
reg->current_rd = COUNTRY_ERD_FLAG;
|
||||
reg->current_rd |= country_code;
|
||||
|
||||
__ath_regd_init(reg);
|
||||
|
||||
ath_reg_apply_world_flags(wiphy, request->initiator, reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ath_reg_dyn_country(struct wiphy *wiphy,
|
||||
struct ath_regulatory *reg,
|
||||
struct regulatory_request *request)
|
||||
{
|
||||
if (__ath_reg_dyn_country(wiphy, reg, request))
|
||||
return;
|
||||
|
||||
printk(KERN_DEBUG "ath: regdomain 0x%0x "
|
||||
"dynamically updated by %s\n",
|
||||
reg->current_rd,
|
||||
reg_initiator_name(request->initiator));
|
||||
}
|
||||
|
||||
void ath_reg_notifier_apply(struct wiphy *wiphy,
|
||||
struct regulatory_request *request,
|
||||
struct ath_regulatory *reg)
|
||||
{
|
||||
struct ath_common *common = container_of(reg, struct ath_common,
|
||||
regulatory);
|
||||
/* We always apply this */
|
||||
ath_reg_apply_radar_flags(wiphy, reg);
|
||||
|
||||
/*
|
||||
* This would happen when we have sent a custom regulatory request
|
||||
* a world regulatory domain and the scheduler hasn't yet processed
|
||||
* any pending requests in the queue.
|
||||
*/
|
||||
if (!request)
|
||||
return;
|
||||
|
||||
reg->region = request->dfs_region;
|
||||
switch (request->initiator) {
|
||||
case NL80211_REGDOM_SET_BY_CORE:
|
||||
/*
|
||||
* If common->reg_world_copy is world roaming it means we *were*
|
||||
* world roaming... so we now have to restore that data.
|
||||
*/
|
||||
if (!ath_is_world_regd(&common->reg_world_copy))
|
||||
break;
|
||||
|
||||
memcpy(reg, &common->reg_world_copy,
|
||||
sizeof(struct ath_regulatory));
|
||||
break;
|
||||
case NL80211_REGDOM_SET_BY_DRIVER:
|
||||
break;
|
||||
case NL80211_REGDOM_SET_BY_USER:
|
||||
if (ath_reg_dyn_country_user_allow(reg))
|
||||
ath_reg_dyn_country(wiphy, reg, request);
|
||||
break;
|
||||
case NL80211_REGDOM_SET_BY_COUNTRY_IE:
|
||||
ath_reg_dyn_country(wiphy, reg, request);
|
||||
break;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(ath_reg_notifier_apply);
|
||||
|
||||
static bool ath_regd_is_eeprom_valid(struct ath_regulatory *reg)
|
||||
{
|
||||
u16 rd = ath_regd_get_eepromRD(reg);
|
||||
int i;
|
||||
|
||||
if (rd & COUNTRY_ERD_FLAG) {
|
||||
/* EEPROM value is a country code */
|
||||
u16 cc = rd & ~COUNTRY_ERD_FLAG;
|
||||
printk(KERN_DEBUG
|
||||
"ath: EEPROM indicates we should expect "
|
||||
"a country code\n");
|
||||
for (i = 0; i < ARRAY_SIZE(allCountries); i++)
|
||||
if (allCountries[i].countryCode == cc)
|
||||
return true;
|
||||
} else {
|
||||
/* EEPROM value is a regpair value */
|
||||
if (rd != CTRY_DEFAULT)
|
||||
printk(KERN_DEBUG "ath: EEPROM indicates we "
|
||||
"should expect a direct regpair map\n");
|
||||
for (i = 0; i < ARRAY_SIZE(regDomainPairs); i++)
|
||||
if (regDomainPairs[i].reg_domain == rd)
|
||||
return true;
|
||||
}
|
||||
printk(KERN_DEBUG
|
||||
"ath: invalid regulatory domain/country code 0x%x\n", rd);
|
||||
return false;
|
||||
}
|
||||
|
||||
/* EEPROM country code to regpair mapping */
|
||||
static struct country_code_to_enum_rd*
|
||||
ath_regd_find_country(u16 countryCode)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(allCountries); i++) {
|
||||
if (allCountries[i].countryCode == countryCode)
|
||||
return &allCountries[i];
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* EEPROM rd code to regpair mapping */
|
||||
static struct country_code_to_enum_rd*
|
||||
ath_regd_find_country_by_rd(int regdmn)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(allCountries); i++) {
|
||||
if (allCountries[i].regDmnEnum == regdmn)
|
||||
return &allCountries[i];
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Returns the map of the EEPROM set RD to a country code */
|
||||
static u16 ath_regd_get_default_country(u16 rd)
|
||||
{
|
||||
if (rd & COUNTRY_ERD_FLAG) {
|
||||
struct country_code_to_enum_rd *country = NULL;
|
||||
u16 cc = rd & ~COUNTRY_ERD_FLAG;
|
||||
|
||||
country = ath_regd_find_country(cc);
|
||||
if (country != NULL)
|
||||
return cc;
|
||||
}
|
||||
|
||||
return CTRY_DEFAULT;
|
||||
}
|
||||
|
||||
static struct reg_dmn_pair_mapping*
|
||||
ath_get_regpair(int regdmn)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (regdmn == NO_ENUMRD)
|
||||
return NULL;
|
||||
for (i = 0; i < ARRAY_SIZE(regDomainPairs); i++) {
|
||||
if (regDomainPairs[i].reg_domain == regdmn)
|
||||
return ®DomainPairs[i];
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int
|
||||
ath_regd_init_wiphy(struct ath_regulatory *reg,
|
||||
struct wiphy *wiphy,
|
||||
void (*reg_notifier)(struct wiphy *wiphy,
|
||||
struct regulatory_request *request))
|
||||
{
|
||||
const struct ieee80211_regdomain *regd;
|
||||
|
||||
wiphy->reg_notifier = reg_notifier;
|
||||
wiphy->regulatory_flags |= REGULATORY_STRICT_REG |
|
||||
REGULATORY_CUSTOM_REG;
|
||||
|
||||
if (ath_is_world_regd(reg)) {
|
||||
/*
|
||||
* Anything applied here (prior to wiphy registration) gets
|
||||
* saved on the wiphy orig_* parameters
|
||||
*/
|
||||
regd = ath_world_regdomain(reg);
|
||||
wiphy->regulatory_flags |= REGULATORY_COUNTRY_IE_FOLLOW_POWER;
|
||||
} else {
|
||||
/*
|
||||
* This gets applied in the case of the absence of CRDA,
|
||||
* it's our own custom world regulatory domain, similar to
|
||||
* cfg80211's but we enable passive scanning.
|
||||
*/
|
||||
regd = ath_default_world_regdomain();
|
||||
}
|
||||
|
||||
wiphy_apply_custom_regulatory(wiphy, regd);
|
||||
ath_reg_apply_radar_flags(wiphy, reg);
|
||||
ath_reg_apply_world_flags(wiphy, NL80211_REGDOM_SET_BY_DRIVER, reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Some users have reported their EEPROM programmed with
|
||||
* 0x8000 or 0x0 set, this is not a supported regulatory
|
||||
* domain but since we have more than one user with it we
|
||||
* need a solution for them. We default to 0x64, which is
|
||||
* the default Atheros world regulatory domain.
|
||||
*/
|
||||
static void ath_regd_sanitize(struct ath_regulatory *reg)
|
||||
{
|
||||
if (reg->current_rd != COUNTRY_ERD_FLAG && reg->current_rd != 0)
|
||||
return;
|
||||
printk(KERN_DEBUG "ath: EEPROM regdomain sanitized\n");
|
||||
reg->current_rd = 0x64;
|
||||
}
|
||||
|
||||
static int __ath_regd_init(struct ath_regulatory *reg)
|
||||
{
|
||||
struct country_code_to_enum_rd *country = NULL;
|
||||
u16 regdmn;
|
||||
|
||||
if (!reg)
|
||||
return -EINVAL;
|
||||
|
||||
ath_regd_sanitize(reg);
|
||||
|
||||
printk(KERN_DEBUG "ath: EEPROM regdomain: 0x%0x\n", reg->current_rd);
|
||||
|
||||
if (!ath_regd_is_eeprom_valid(reg)) {
|
||||
pr_err("Invalid EEPROM contents\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
regdmn = ath_regd_get_eepromRD(reg);
|
||||
reg->country_code = ath_regd_get_default_country(regdmn);
|
||||
|
||||
if (reg->country_code == CTRY_DEFAULT &&
|
||||
regdmn == CTRY_DEFAULT) {
|
||||
printk(KERN_DEBUG "ath: EEPROM indicates default "
|
||||
"country code should be used\n");
|
||||
reg->country_code = CTRY_UNITED_STATES;
|
||||
}
|
||||
|
||||
if (reg->country_code == CTRY_DEFAULT) {
|
||||
country = NULL;
|
||||
} else {
|
||||
printk(KERN_DEBUG "ath: doing EEPROM country->regdmn "
|
||||
"map search\n");
|
||||
country = ath_regd_find_country(reg->country_code);
|
||||
if (country == NULL) {
|
||||
printk(KERN_DEBUG
|
||||
"ath: no valid country maps found for "
|
||||
"country code: 0x%0x\n",
|
||||
reg->country_code);
|
||||
return -EINVAL;
|
||||
} else {
|
||||
regdmn = country->regDmnEnum;
|
||||
printk(KERN_DEBUG "ath: country maps to "
|
||||
"regdmn code: 0x%0x\n",
|
||||
regdmn);
|
||||
}
|
||||
}
|
||||
|
||||
reg->regpair = ath_get_regpair(regdmn);
|
||||
|
||||
if (!reg->regpair) {
|
||||
printk(KERN_DEBUG "ath: "
|
||||
"No regulatory domain pair found, cannot continue\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!country)
|
||||
country = ath_regd_find_country_by_rd(regdmn);
|
||||
|
||||
if (country) {
|
||||
reg->alpha2[0] = country->isoName[0];
|
||||
reg->alpha2[1] = country->isoName[1];
|
||||
} else {
|
||||
reg->alpha2[0] = '0';
|
||||
reg->alpha2[1] = '0';
|
||||
}
|
||||
|
||||
printk(KERN_DEBUG "ath: Country alpha2 being used: %c%c\n",
|
||||
reg->alpha2[0], reg->alpha2[1]);
|
||||
printk(KERN_DEBUG "ath: Regpair used: 0x%0x\n",
|
||||
reg->regpair->reg_domain);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
ath_regd_init(struct ath_regulatory *reg,
|
||||
struct wiphy *wiphy,
|
||||
void (*reg_notifier)(struct wiphy *wiphy,
|
||||
struct regulatory_request *request))
|
||||
{
|
||||
struct ath_common *common = container_of(reg, struct ath_common,
|
||||
regulatory);
|
||||
int r;
|
||||
|
||||
r = __ath_regd_init(reg);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
if (ath_is_world_regd(reg))
|
||||
memcpy(&common->reg_world_copy, reg,
|
||||
sizeof(struct ath_regulatory));
|
||||
|
||||
ath_regd_init_wiphy(reg, wiphy, reg_notifier);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_regd_init);
|
||||
|
||||
u32 ath_regd_get_band_ctl(struct ath_regulatory *reg,
|
||||
enum nl80211_band band)
|
||||
{
|
||||
if (!reg->regpair ||
|
||||
(reg->country_code == CTRY_DEFAULT &&
|
||||
is_wwr_sku(ath_regd_get_eepromRD(reg)))) {
|
||||
return SD_NO_CTL;
|
||||
}
|
||||
|
||||
if (ath_regd_get_eepromRD(reg) == CTRY_DEFAULT) {
|
||||
switch (reg->region) {
|
||||
case NL80211_DFS_FCC:
|
||||
return CTL_FCC;
|
||||
case NL80211_DFS_ETSI:
|
||||
return CTL_ETSI;
|
||||
case NL80211_DFS_JP:
|
||||
return CTL_MKK;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
switch (band) {
|
||||
case NL80211_BAND_2GHZ:
|
||||
return reg->regpair->reg_2ghz_ctl;
|
||||
case NL80211_BAND_5GHZ:
|
||||
return reg->regpair->reg_5ghz_ctl;
|
||||
default:
|
||||
return NO_CTL;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(ath_regd_get_band_ctl);
|
||||
273
sys/contrib/dev/athk/regd.h
Normal file
273
sys/contrib/dev/athk/regd.h
Normal file
@ -0,0 +1,273 @@
|
||||
/*
|
||||
* Copyright (c) 2008-2009 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef REGD_H
|
||||
#define REGD_H
|
||||
|
||||
#include <linux/nl80211.h>
|
||||
#include <net/cfg80211.h>
|
||||
|
||||
#include "ath.h"
|
||||
|
||||
enum ctl_group {
|
||||
CTL_FCC = 0x10,
|
||||
CTL_MKK = 0x40,
|
||||
CTL_ETSI = 0x30,
|
||||
};
|
||||
|
||||
#define SD_NO_CTL 0xE0
|
||||
#define NO_CTL 0xff
|
||||
#define CTL_11A 0
|
||||
#define CTL_11B 1
|
||||
#define CTL_11G 2
|
||||
#define CTL_2GHT20 5
|
||||
#define CTL_5GHT20 6
|
||||
#define CTL_2GHT40 7
|
||||
#define CTL_5GHT40 8
|
||||
|
||||
#define CTRY_DEBUG 0x1ff
|
||||
#define CTRY_DEFAULT 0
|
||||
|
||||
#define COUNTRY_ERD_FLAG 0x8000
|
||||
#define WORLDWIDE_ROAMING_FLAG 0x4000
|
||||
|
||||
#define MULTI_DOMAIN_MASK 0xFF00
|
||||
|
||||
#define WORLD_SKU_MASK 0x00F0
|
||||
#define WORLD_SKU_PREFIX 0x0060
|
||||
|
||||
#define CHANNEL_HALF_BW 10
|
||||
#define CHANNEL_QUARTER_BW 5
|
||||
|
||||
struct country_code_to_enum_rd {
|
||||
u16 countryCode;
|
||||
u16 regDmnEnum;
|
||||
const char *isoName;
|
||||
};
|
||||
|
||||
enum CountryCode {
|
||||
CTRY_ALBANIA = 8,
|
||||
CTRY_ALGERIA = 12,
|
||||
CTRY_ARGENTINA = 32,
|
||||
CTRY_ARMENIA = 51,
|
||||
CTRY_ARUBA = 533,
|
||||
CTRY_AUSTRALIA = 36,
|
||||
CTRY_AUSTRIA = 40,
|
||||
CTRY_AZERBAIJAN = 31,
|
||||
CTRY_BAHAMAS = 44,
|
||||
CTRY_BAHRAIN = 48,
|
||||
CTRY_BANGLADESH = 50,
|
||||
CTRY_BARBADOS = 52,
|
||||
CTRY_BELARUS = 112,
|
||||
CTRY_BELGIUM = 56,
|
||||
CTRY_BELIZE = 84,
|
||||
CTRY_BERMUDA = 60,
|
||||
CTRY_BOLIVIA = 68,
|
||||
CTRY_BOSNIA_HERZ = 70,
|
||||
CTRY_BRAZIL = 76,
|
||||
CTRY_BRUNEI_DARUSSALAM = 96,
|
||||
CTRY_BULGARIA = 100,
|
||||
CTRY_CAMBODIA = 116,
|
||||
CTRY_CANADA = 124,
|
||||
CTRY_CHILE = 152,
|
||||
CTRY_CHINA = 156,
|
||||
CTRY_COLOMBIA = 170,
|
||||
CTRY_COSTA_RICA = 188,
|
||||
CTRY_CROATIA = 191,
|
||||
CTRY_CYPRUS = 196,
|
||||
CTRY_CZECH = 203,
|
||||
CTRY_DENMARK = 208,
|
||||
CTRY_DOMINICAN_REPUBLIC = 214,
|
||||
CTRY_ECUADOR = 218,
|
||||
CTRY_EGYPT = 818,
|
||||
CTRY_EL_SALVADOR = 222,
|
||||
CTRY_ESTONIA = 233,
|
||||
CTRY_FAEROE_ISLANDS = 234,
|
||||
CTRY_FINLAND = 246,
|
||||
CTRY_FRANCE = 250,
|
||||
CTRY_GEORGIA = 268,
|
||||
CTRY_GERMANY = 276,
|
||||
CTRY_GREECE = 300,
|
||||
CTRY_GREENLAND = 304,
|
||||
CTRY_GRENADA = 308,
|
||||
CTRY_GUAM = 316,
|
||||
CTRY_GUATEMALA = 320,
|
||||
CTRY_HAITI = 332,
|
||||
CTRY_HONDURAS = 340,
|
||||
CTRY_HONG_KONG = 344,
|
||||
CTRY_HUNGARY = 348,
|
||||
CTRY_ICELAND = 352,
|
||||
CTRY_INDIA = 356,
|
||||
CTRY_INDONESIA = 360,
|
||||
CTRY_IRAN = 364,
|
||||
CTRY_IRAQ = 368,
|
||||
CTRY_IRELAND = 372,
|
||||
CTRY_ISRAEL = 376,
|
||||
CTRY_ITALY = 380,
|
||||
CTRY_JAMAICA = 388,
|
||||
CTRY_JAPAN = 392,
|
||||
CTRY_JORDAN = 400,
|
||||
CTRY_KAZAKHSTAN = 398,
|
||||
CTRY_KENYA = 404,
|
||||
CTRY_KOREA_NORTH = 408,
|
||||
CTRY_KOREA_ROC = 410,
|
||||
CTRY_KOREA_ROC2 = 411,
|
||||
CTRY_KOREA_ROC3 = 412,
|
||||
CTRY_KOREA_ROC4 = 413,
|
||||
CTRY_KUWAIT = 414,
|
||||
CTRY_LATVIA = 428,
|
||||
CTRY_LEBANON = 422,
|
||||
CTRY_LIBYA = 434,
|
||||
CTRY_LIECHTENSTEIN = 438,
|
||||
CTRY_LITHUANIA = 440,
|
||||
CTRY_LUXEMBOURG = 442,
|
||||
CTRY_MACAU = 446,
|
||||
CTRY_MACEDONIA = 807,
|
||||
CTRY_MALAYSIA = 458,
|
||||
CTRY_MALTA = 470,
|
||||
CTRY_MAURITIUS = 480,
|
||||
CTRY_MEXICO = 484,
|
||||
CTRY_MONACO = 492,
|
||||
CTRY_MONTENEGRO = 499,
|
||||
CTRY_MOROCCO = 504,
|
||||
CTRY_NEPAL = 524,
|
||||
CTRY_NETHERLANDS = 528,
|
||||
CTRY_NETHERLANDS_ANTILLES = 530,
|
||||
CTRY_NEW_ZEALAND = 554,
|
||||
CTRY_NICARAGUA = 558,
|
||||
CTRY_NORWAY = 578,
|
||||
CTRY_OMAN = 512,
|
||||
CTRY_PAKISTAN = 586,
|
||||
CTRY_PANAMA = 591,
|
||||
CTRY_PAPUA_NEW_GUINEA = 598,
|
||||
CTRY_PARAGUAY = 600,
|
||||
CTRY_PERU = 604,
|
||||
CTRY_PHILIPPINES = 608,
|
||||
CTRY_POLAND = 616,
|
||||
CTRY_PORTUGAL = 620,
|
||||
CTRY_PUERTO_RICO = 630,
|
||||
CTRY_QATAR = 634,
|
||||
CTRY_ROMANIA = 642,
|
||||
CTRY_RUSSIA = 643,
|
||||
CTRY_SAUDI_ARABIA = 682,
|
||||
CTRY_SERBIA = 688,
|
||||
CTRY_SERBIA_MONTENEGRO = 891,
|
||||
CTRY_SINGAPORE = 702,
|
||||
CTRY_SLOVAKIA = 703,
|
||||
CTRY_SLOVENIA = 705,
|
||||
CTRY_SOUTH_AFRICA = 710,
|
||||
CTRY_SPAIN = 724,
|
||||
CTRY_SRI_LANKA = 144,
|
||||
CTRY_SWEDEN = 752,
|
||||
CTRY_SWITZERLAND = 756,
|
||||
CTRY_SYRIA = 760,
|
||||
CTRY_TAIWAN = 158,
|
||||
CTRY_TANZANIA = 834,
|
||||
CTRY_THAILAND = 764,
|
||||
CTRY_TRINIDAD_Y_TOBAGO = 780,
|
||||
CTRY_TUNISIA = 788,
|
||||
CTRY_TURKEY = 792,
|
||||
CTRY_UAE = 784,
|
||||
CTRY_UGANDA = 800,
|
||||
CTRY_UKRAINE = 804,
|
||||
CTRY_UNITED_KINGDOM = 826,
|
||||
CTRY_UNITED_STATES = 840,
|
||||
CTRY_UNITED_STATES2 = 841,
|
||||
CTRY_UNITED_STATES_FCC49 = 842,
|
||||
CTRY_UNITED_STATES3 = 843,
|
||||
CTRY_URUGUAY = 858,
|
||||
CTRY_UZBEKISTAN = 860,
|
||||
CTRY_VENEZUELA = 862,
|
||||
CTRY_VIET_NAM = 704,
|
||||
CTRY_YEMEN = 887,
|
||||
CTRY_ZIMBABWE = 716,
|
||||
CTRY_JAPAN1 = 393,
|
||||
CTRY_JAPAN2 = 394,
|
||||
CTRY_JAPAN3 = 395,
|
||||
CTRY_JAPAN4 = 396,
|
||||
CTRY_JAPAN5 = 397,
|
||||
CTRY_JAPAN6 = 4006,
|
||||
CTRY_JAPAN7 = 4007,
|
||||
CTRY_JAPAN8 = 4008,
|
||||
CTRY_JAPAN9 = 4009,
|
||||
CTRY_JAPAN10 = 4010,
|
||||
CTRY_JAPAN11 = 4011,
|
||||
CTRY_JAPAN12 = 4012,
|
||||
CTRY_JAPAN13 = 4013,
|
||||
CTRY_JAPAN14 = 4014,
|
||||
CTRY_JAPAN15 = 4015,
|
||||
CTRY_JAPAN16 = 4016,
|
||||
CTRY_JAPAN17 = 4017,
|
||||
CTRY_JAPAN18 = 4018,
|
||||
CTRY_JAPAN19 = 4019,
|
||||
CTRY_JAPAN20 = 4020,
|
||||
CTRY_JAPAN21 = 4021,
|
||||
CTRY_JAPAN22 = 4022,
|
||||
CTRY_JAPAN23 = 4023,
|
||||
CTRY_JAPAN24 = 4024,
|
||||
CTRY_JAPAN25 = 4025,
|
||||
CTRY_JAPAN26 = 4026,
|
||||
CTRY_JAPAN27 = 4027,
|
||||
CTRY_JAPAN28 = 4028,
|
||||
CTRY_JAPAN29 = 4029,
|
||||
CTRY_JAPAN30 = 4030,
|
||||
CTRY_JAPAN31 = 4031,
|
||||
CTRY_JAPAN32 = 4032,
|
||||
CTRY_JAPAN33 = 4033,
|
||||
CTRY_JAPAN34 = 4034,
|
||||
CTRY_JAPAN35 = 4035,
|
||||
CTRY_JAPAN36 = 4036,
|
||||
CTRY_JAPAN37 = 4037,
|
||||
CTRY_JAPAN38 = 4038,
|
||||
CTRY_JAPAN39 = 4039,
|
||||
CTRY_JAPAN40 = 4040,
|
||||
CTRY_JAPAN41 = 4041,
|
||||
CTRY_JAPAN42 = 4042,
|
||||
CTRY_JAPAN43 = 4043,
|
||||
CTRY_JAPAN44 = 4044,
|
||||
CTRY_JAPAN45 = 4045,
|
||||
CTRY_JAPAN46 = 4046,
|
||||
CTRY_JAPAN47 = 4047,
|
||||
CTRY_JAPAN48 = 4048,
|
||||
CTRY_JAPAN49 = 4049,
|
||||
CTRY_JAPAN50 = 4050,
|
||||
CTRY_JAPAN51 = 4051,
|
||||
CTRY_JAPAN52 = 4052,
|
||||
CTRY_JAPAN53 = 4053,
|
||||
CTRY_JAPAN54 = 4054,
|
||||
CTRY_JAPAN55 = 4055,
|
||||
CTRY_JAPAN56 = 4056,
|
||||
CTRY_JAPAN57 = 4057,
|
||||
CTRY_JAPAN58 = 4058,
|
||||
CTRY_JAPAN59 = 4059,
|
||||
CTRY_AUSTRALIA2 = 5000,
|
||||
CTRY_CANADA2 = 5001,
|
||||
CTRY_BELGIUM2 = 5002
|
||||
};
|
||||
|
||||
bool ath_is_world_regd(struct ath_regulatory *reg);
|
||||
bool ath_is_49ghz_allowed(u16 redomain);
|
||||
u16 ath_regd_find_country_by_name(char *alpha2);
|
||||
int ath_regd_init(struct ath_regulatory *reg, struct wiphy *wiphy,
|
||||
void (*reg_notifier)(struct wiphy *wiphy,
|
||||
struct regulatory_request *request));
|
||||
u32 ath_regd_get_band_ctl(struct ath_regulatory *reg,
|
||||
enum nl80211_band band);
|
||||
void ath_reg_notifier_apply(struct wiphy *wiphy,
|
||||
struct regulatory_request *request,
|
||||
struct ath_regulatory *reg);
|
||||
|
||||
#endif
|
||||
503
sys/contrib/dev/athk/regd_common.h
Normal file
503
sys/contrib/dev/athk/regd_common.h
Normal file
@ -0,0 +1,503 @@
|
||||
/*
|
||||
* Copyright (c) 2008-2009 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef REGD_COMMON_H
|
||||
#define REGD_COMMON_H
|
||||
|
||||
enum EnumRd {
|
||||
NO_ENUMRD = 0x00,
|
||||
NULL1_WORLD = 0x03,
|
||||
NULL1_ETSIB = 0x07,
|
||||
NULL1_ETSIC = 0x08,
|
||||
FCC1_FCCA = 0x10,
|
||||
FCC1_WORLD = 0x11,
|
||||
FCC4_FCCA = 0x12,
|
||||
FCC5_FCCA = 0x13,
|
||||
FCC6_FCCA = 0x14,
|
||||
|
||||
FCC2_FCCA = 0x20,
|
||||
FCC2_WORLD = 0x21,
|
||||
FCC2_ETSIC = 0x22,
|
||||
FCC6_WORLD = 0x23,
|
||||
FRANCE_RES = 0x31,
|
||||
FCC3_FCCA = 0x3A,
|
||||
FCC3_WORLD = 0x3B,
|
||||
FCC3_ETSIC = 0x3F,
|
||||
|
||||
ETSI1_WORLD = 0x37,
|
||||
ETSI3_ETSIA = 0x32,
|
||||
ETSI2_WORLD = 0x35,
|
||||
ETSI3_WORLD = 0x36,
|
||||
ETSI4_WORLD = 0x30,
|
||||
ETSI4_ETSIC = 0x38,
|
||||
ETSI5_WORLD = 0x39,
|
||||
ETSI6_WORLD = 0x34,
|
||||
ETSI8_WORLD = 0x3D,
|
||||
ETSI9_WORLD = 0x3E,
|
||||
ETSI_RESERVED = 0x33,
|
||||
|
||||
MKK1_MKKA = 0x40,
|
||||
MKK1_MKKB = 0x41,
|
||||
APL4_WORLD = 0x42,
|
||||
MKK2_MKKA = 0x43,
|
||||
APL_RESERVED = 0x44,
|
||||
APL2_WORLD = 0x45,
|
||||
APL2_APLC = 0x46,
|
||||
APL3_WORLD = 0x47,
|
||||
MKK1_FCCA = 0x48,
|
||||
APL2_APLD = 0x49,
|
||||
MKK1_MKKA1 = 0x4A,
|
||||
MKK1_MKKA2 = 0x4B,
|
||||
MKK1_MKKC = 0x4C,
|
||||
APL2_FCCA = 0x4D,
|
||||
|
||||
APL3_FCCA = 0x50,
|
||||
APL1_WORLD = 0x52,
|
||||
APL1_FCCA = 0x53,
|
||||
APL1_APLA = 0x54,
|
||||
APL1_ETSIC = 0x55,
|
||||
APL2_ETSIC = 0x56,
|
||||
APL5_WORLD = 0x58,
|
||||
APL13_WORLD = 0x5A,
|
||||
APL6_WORLD = 0x5B,
|
||||
APL7_FCCA = 0x5C,
|
||||
APL8_WORLD = 0x5D,
|
||||
APL9_WORLD = 0x5E,
|
||||
APL10_WORLD = 0x5F,
|
||||
|
||||
WOR0_WORLD = 0x60,
|
||||
WOR1_WORLD = 0x61,
|
||||
WOR2_WORLD = 0x62,
|
||||
WOR3_WORLD = 0x63,
|
||||
WOR4_WORLD = 0x64,
|
||||
WOR5_ETSIC = 0x65,
|
||||
|
||||
WOR01_WORLD = 0x66,
|
||||
WOR02_WORLD = 0x67,
|
||||
EU1_WORLD = 0x68,
|
||||
|
||||
WOR9_WORLD = 0x69,
|
||||
WORA_WORLD = 0x6A,
|
||||
WORB_WORLD = 0x6B,
|
||||
WORC_WORLD = 0x6C,
|
||||
|
||||
MKK3_MKKB = 0x80,
|
||||
MKK3_MKKA2 = 0x81,
|
||||
MKK3_MKKC = 0x82,
|
||||
|
||||
MKK4_MKKB = 0x83,
|
||||
MKK4_MKKA2 = 0x84,
|
||||
MKK4_MKKC = 0x85,
|
||||
|
||||
MKK5_MKKB = 0x86,
|
||||
MKK5_MKKA2 = 0x87,
|
||||
MKK5_MKKC = 0x88,
|
||||
|
||||
MKK6_MKKB = 0x89,
|
||||
MKK6_MKKA2 = 0x8A,
|
||||
MKK6_MKKC = 0x8B,
|
||||
|
||||
MKK7_MKKB = 0x8C,
|
||||
MKK7_MKKA2 = 0x8D,
|
||||
MKK7_MKKC = 0x8E,
|
||||
|
||||
MKK8_MKKB = 0x8F,
|
||||
MKK8_MKKA2 = 0x90,
|
||||
MKK8_MKKC = 0x91,
|
||||
|
||||
MKK14_MKKA1 = 0x92,
|
||||
MKK15_MKKA1 = 0x93,
|
||||
|
||||
MKK10_FCCA = 0xD0,
|
||||
MKK10_MKKA1 = 0xD1,
|
||||
MKK10_MKKC = 0xD2,
|
||||
MKK10_MKKA2 = 0xD3,
|
||||
|
||||
MKK11_MKKA = 0xD4,
|
||||
MKK11_FCCA = 0xD5,
|
||||
MKK11_MKKA1 = 0xD6,
|
||||
MKK11_MKKC = 0xD7,
|
||||
MKK11_MKKA2 = 0xD8,
|
||||
|
||||
MKK12_MKKA = 0xD9,
|
||||
MKK12_FCCA = 0xDA,
|
||||
MKK12_MKKA1 = 0xDB,
|
||||
MKK12_MKKC = 0xDC,
|
||||
MKK12_MKKA2 = 0xDD,
|
||||
|
||||
MKK13_MKKB = 0xDE,
|
||||
|
||||
MKK3_MKKA = 0xF0,
|
||||
MKK3_MKKA1 = 0xF1,
|
||||
MKK3_FCCA = 0xF2,
|
||||
MKK4_MKKA = 0xF3,
|
||||
MKK4_MKKA1 = 0xF4,
|
||||
MKK4_FCCA = 0xF5,
|
||||
MKK9_MKKA = 0xF6,
|
||||
MKK10_MKKA = 0xF7,
|
||||
MKK6_MKKA1 = 0xF8,
|
||||
MKK6_FCCA = 0xF9,
|
||||
MKK7_MKKA1 = 0xFA,
|
||||
MKK7_FCCA = 0xFB,
|
||||
MKK9_FCCA = 0xFC,
|
||||
MKK9_MKKA1 = 0xFD,
|
||||
MKK9_MKKC = 0xFE,
|
||||
MKK9_MKKA2 = 0xFF,
|
||||
|
||||
WORLD = 0x0199,
|
||||
DEBUG_REG_DMN = 0x01ff,
|
||||
};
|
||||
|
||||
/* Regpair to CTL band mapping */
|
||||
static struct reg_dmn_pair_mapping regDomainPairs[] = {
|
||||
/* regpair, 5 GHz CTL, 2 GHz CTL */
|
||||
{NO_ENUMRD, DEBUG_REG_DMN, DEBUG_REG_DMN},
|
||||
{NULL1_WORLD, NO_CTL, CTL_ETSI},
|
||||
{NULL1_ETSIB, NO_CTL, CTL_ETSI},
|
||||
{NULL1_ETSIC, NO_CTL, CTL_ETSI},
|
||||
|
||||
{FCC2_FCCA, CTL_FCC, CTL_FCC},
|
||||
{FCC2_WORLD, CTL_FCC, CTL_ETSI},
|
||||
{FCC2_ETSIC, CTL_FCC, CTL_ETSI},
|
||||
{FCC3_FCCA, CTL_FCC, CTL_FCC},
|
||||
{FCC3_WORLD, CTL_FCC, CTL_ETSI},
|
||||
{FCC3_ETSIC, CTL_FCC, CTL_ETSI},
|
||||
{FCC4_FCCA, CTL_FCC, CTL_FCC},
|
||||
{FCC5_FCCA, CTL_FCC, CTL_FCC},
|
||||
{FCC6_FCCA, CTL_FCC, CTL_FCC},
|
||||
{FCC6_WORLD, CTL_FCC, CTL_ETSI},
|
||||
|
||||
{ETSI1_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{ETSI2_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{ETSI3_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{ETSI4_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{ETSI5_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{ETSI6_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{ETSI8_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{ETSI9_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
|
||||
/* XXX: For ETSI3_ETSIA, Was NO_CTL meant for the 2 GHz band ? */
|
||||
{ETSI3_ETSIA, CTL_ETSI, CTL_ETSI},
|
||||
{FRANCE_RES, CTL_ETSI, CTL_ETSI},
|
||||
|
||||
{FCC1_WORLD, CTL_FCC, CTL_ETSI},
|
||||
{FCC1_FCCA, CTL_FCC, CTL_FCC},
|
||||
{APL1_WORLD, CTL_FCC, CTL_ETSI},
|
||||
{APL2_WORLD, CTL_FCC, CTL_ETSI},
|
||||
{APL2_FCCA, CTL_FCC, CTL_FCC},
|
||||
{APL3_WORLD, CTL_FCC, CTL_ETSI},
|
||||
{APL4_WORLD, CTL_FCC, CTL_ETSI},
|
||||
{APL5_WORLD, CTL_FCC, CTL_ETSI},
|
||||
{APL13_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{APL6_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{APL8_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{APL9_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
{APL10_WORLD, CTL_ETSI, CTL_ETSI},
|
||||
|
||||
{APL3_FCCA, CTL_FCC, CTL_FCC},
|
||||
{APL7_FCCA, CTL_FCC, CTL_FCC},
|
||||
{APL1_ETSIC, CTL_FCC, CTL_ETSI},
|
||||
{APL2_ETSIC, CTL_FCC, CTL_ETSI},
|
||||
{APL2_APLD, CTL_FCC, NO_CTL},
|
||||
|
||||
{MKK1_MKKA, CTL_MKK, CTL_MKK},
|
||||
{MKK1_MKKB, CTL_MKK, CTL_MKK},
|
||||
{MKK1_FCCA, CTL_MKK, CTL_FCC},
|
||||
{MKK1_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK1_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK1_MKKC, CTL_MKK, CTL_MKK},
|
||||
|
||||
{MKK2_MKKA, CTL_MKK, CTL_MKK},
|
||||
{MKK3_MKKA, CTL_MKK, CTL_MKK},
|
||||
{MKK3_MKKB, CTL_MKK, CTL_MKK},
|
||||
{MKK3_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK3_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK3_MKKC, CTL_MKK, CTL_MKK},
|
||||
{MKK3_FCCA, CTL_MKK, CTL_FCC},
|
||||
|
||||
{MKK4_MKKA, CTL_MKK, CTL_MKK},
|
||||
{MKK4_MKKB, CTL_MKK, CTL_MKK},
|
||||
{MKK4_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK4_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK4_MKKC, CTL_MKK, CTL_MKK},
|
||||
{MKK4_FCCA, CTL_MKK, CTL_FCC},
|
||||
|
||||
{MKK5_MKKB, CTL_MKK, CTL_MKK},
|
||||
{MKK5_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK5_MKKC, CTL_MKK, CTL_MKK},
|
||||
|
||||
{MKK6_MKKB, CTL_MKK, CTL_MKK},
|
||||
{MKK6_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK6_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK6_MKKC, CTL_MKK, CTL_MKK},
|
||||
{MKK6_FCCA, CTL_MKK, CTL_FCC},
|
||||
|
||||
{MKK7_MKKB, CTL_MKK, CTL_MKK},
|
||||
{MKK7_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK7_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK7_MKKC, CTL_MKK, CTL_MKK},
|
||||
{MKK7_FCCA, CTL_MKK, CTL_FCC},
|
||||
|
||||
{MKK8_MKKB, CTL_MKK, CTL_MKK},
|
||||
{MKK8_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK8_MKKC, CTL_MKK, CTL_MKK},
|
||||
|
||||
{MKK9_MKKA, CTL_MKK, CTL_MKK},
|
||||
{MKK9_FCCA, CTL_MKK, CTL_FCC},
|
||||
{MKK9_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK9_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK9_MKKC, CTL_MKK, CTL_MKK},
|
||||
|
||||
{MKK10_MKKA, CTL_MKK, CTL_MKK},
|
||||
{MKK10_FCCA, CTL_MKK, CTL_FCC},
|
||||
{MKK10_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK10_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK10_MKKC, CTL_MKK, CTL_MKK},
|
||||
|
||||
{MKK11_MKKA, CTL_MKK, CTL_MKK},
|
||||
{MKK11_FCCA, CTL_MKK, CTL_FCC},
|
||||
{MKK11_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK11_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK11_MKKC, CTL_MKK, CTL_MKK},
|
||||
|
||||
{MKK12_MKKA, CTL_MKK, CTL_MKK},
|
||||
{MKK12_FCCA, CTL_MKK, CTL_FCC},
|
||||
{MKK12_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK12_MKKA2, CTL_MKK, CTL_MKK},
|
||||
{MKK12_MKKC, CTL_MKK, CTL_MKK},
|
||||
|
||||
{MKK13_MKKB, CTL_MKK, CTL_MKK},
|
||||
{MKK14_MKKA1, CTL_MKK, CTL_MKK},
|
||||
{MKK15_MKKA1, CTL_MKK, CTL_MKK},
|
||||
|
||||
{WOR0_WORLD, NO_CTL, NO_CTL},
|
||||
{WOR1_WORLD, NO_CTL, NO_CTL},
|
||||
{WOR2_WORLD, NO_CTL, NO_CTL},
|
||||
{WOR3_WORLD, NO_CTL, NO_CTL},
|
||||
{WOR4_WORLD, NO_CTL, NO_CTL},
|
||||
{WOR5_ETSIC, NO_CTL, NO_CTL},
|
||||
{WOR01_WORLD, NO_CTL, NO_CTL},
|
||||
{WOR02_WORLD, NO_CTL, NO_CTL},
|
||||
{EU1_WORLD, NO_CTL, NO_CTL},
|
||||
{WOR9_WORLD, NO_CTL, NO_CTL},
|
||||
{WORA_WORLD, NO_CTL, NO_CTL},
|
||||
{WORB_WORLD, NO_CTL, NO_CTL},
|
||||
{WORC_WORLD, NO_CTL, NO_CTL},
|
||||
};
|
||||
|
||||
static struct country_code_to_enum_rd allCountries[] = {
|
||||
{CTRY_DEBUG, NO_ENUMRD, "DB"},
|
||||
{CTRY_DEFAULT, FCC1_FCCA, "CO"},
|
||||
{CTRY_ALBANIA, ETSI1_WORLD, "AL"},
|
||||
{CTRY_ALGERIA, APL13_WORLD, "DZ"},
|
||||
{CTRY_ARGENTINA, FCC3_WORLD, "AR"},
|
||||
{CTRY_ARMENIA, ETSI4_WORLD, "AM"},
|
||||
{CTRY_ARUBA, ETSI1_WORLD, "AW"},
|
||||
{CTRY_AUSTRALIA, FCC3_WORLD, "AU"},
|
||||
{CTRY_AUSTRALIA2, FCC6_WORLD, "AU"},
|
||||
{CTRY_AUSTRIA, ETSI1_WORLD, "AT"},
|
||||
{CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ"},
|
||||
{CTRY_BAHAMAS, FCC3_WORLD, "BS"},
|
||||
{CTRY_BAHRAIN, APL6_WORLD, "BH"},
|
||||
{CTRY_BANGLADESH, APL1_WORLD, "BD"},
|
||||
{CTRY_BARBADOS, FCC2_WORLD, "BB"},
|
||||
{CTRY_BELARUS, ETSI1_WORLD, "BY"},
|
||||
{CTRY_BELGIUM, ETSI1_WORLD, "BE"},
|
||||
{CTRY_BELGIUM2, ETSI4_WORLD, "BL"},
|
||||
{CTRY_BELIZE, APL1_ETSIC, "BZ"},
|
||||
{CTRY_BERMUDA, FCC3_FCCA, "BM"},
|
||||
{CTRY_BOLIVIA, APL1_ETSIC, "BO"},
|
||||
{CTRY_BOSNIA_HERZ, ETSI1_WORLD, "BA"},
|
||||
{CTRY_BRAZIL, FCC3_WORLD, "BR"},
|
||||
{CTRY_BRUNEI_DARUSSALAM, APL6_WORLD, "BN"},
|
||||
{CTRY_BULGARIA, ETSI1_WORLD, "BG"},
|
||||
{CTRY_CAMBODIA, ETSI1_WORLD, "KH"},
|
||||
{CTRY_CANADA, FCC3_FCCA, "CA"},
|
||||
{CTRY_CANADA2, FCC6_FCCA, "CA"},
|
||||
{CTRY_CHILE, APL6_WORLD, "CL"},
|
||||
{CTRY_CHINA, APL1_WORLD, "CN"},
|
||||
{CTRY_COLOMBIA, FCC3_WORLD, "CO"},
|
||||
{CTRY_COSTA_RICA, FCC1_WORLD, "CR"},
|
||||
{CTRY_CROATIA, ETSI1_WORLD, "HR"},
|
||||
{CTRY_CYPRUS, ETSI1_WORLD, "CY"},
|
||||
{CTRY_CZECH, ETSI1_WORLD, "CZ"},
|
||||
{CTRY_DENMARK, ETSI1_WORLD, "DK"},
|
||||
{CTRY_DOMINICAN_REPUBLIC, FCC1_FCCA, "DO"},
|
||||
{CTRY_ECUADOR, FCC1_WORLD, "EC"},
|
||||
{CTRY_EGYPT, ETSI3_WORLD, "EG"},
|
||||
{CTRY_EL_SALVADOR, FCC1_WORLD, "SV"},
|
||||
{CTRY_ESTONIA, ETSI1_WORLD, "EE"},
|
||||
{CTRY_FINLAND, ETSI1_WORLD, "FI"},
|
||||
{CTRY_FRANCE, ETSI1_WORLD, "FR"},
|
||||
{CTRY_GEORGIA, ETSI4_WORLD, "GE"},
|
||||
{CTRY_GERMANY, ETSI1_WORLD, "DE"},
|
||||
{CTRY_GREECE, ETSI1_WORLD, "GR"},
|
||||
{CTRY_GREENLAND, ETSI1_WORLD, "GL"},
|
||||
{CTRY_GRENADA, FCC3_FCCA, "GD"},
|
||||
{CTRY_GUAM, FCC1_FCCA, "GU"},
|
||||
{CTRY_GUATEMALA, FCC1_FCCA, "GT"},
|
||||
{CTRY_HAITI, ETSI1_WORLD, "HT"},
|
||||
{CTRY_HONDURAS, FCC3_WORLD, "HN"},
|
||||
{CTRY_HONG_KONG, FCC3_WORLD, "HK"},
|
||||
{CTRY_HUNGARY, ETSI1_WORLD, "HU"},
|
||||
{CTRY_ICELAND, ETSI1_WORLD, "IS"},
|
||||
{CTRY_INDIA, APL6_WORLD, "IN"},
|
||||
{CTRY_INDONESIA, NULL1_WORLD, "ID"},
|
||||
{CTRY_IRAN, APL1_WORLD, "IR"},
|
||||
{CTRY_IRELAND, ETSI1_WORLD, "IE"},
|
||||
{CTRY_ISRAEL, ETSI3_WORLD, "IL"},
|
||||
{CTRY_ITALY, ETSI1_WORLD, "IT"},
|
||||
{CTRY_JAMAICA, FCC3_WORLD, "JM"},
|
||||
|
||||
{CTRY_JAPAN, MKK1_MKKA, "JP"},
|
||||
{CTRY_JAPAN1, MKK1_MKKB, "JP"},
|
||||
{CTRY_JAPAN2, MKK1_FCCA, "JP"},
|
||||
{CTRY_JAPAN3, MKK2_MKKA, "JP"},
|
||||
{CTRY_JAPAN4, MKK1_MKKA1, "JP"},
|
||||
{CTRY_JAPAN5, MKK1_MKKA2, "JP"},
|
||||
{CTRY_JAPAN6, MKK1_MKKC, "JP"},
|
||||
{CTRY_JAPAN7, MKK3_MKKB, "JP"},
|
||||
{CTRY_JAPAN8, MKK3_MKKA2, "JP"},
|
||||
{CTRY_JAPAN9, MKK3_MKKC, "JP"},
|
||||
{CTRY_JAPAN10, MKK4_MKKB, "JP"},
|
||||
{CTRY_JAPAN11, MKK4_MKKA2, "JP"},
|
||||
{CTRY_JAPAN12, MKK4_MKKC, "JP"},
|
||||
{CTRY_JAPAN13, MKK5_MKKB, "JP"},
|
||||
{CTRY_JAPAN14, MKK5_MKKA2, "JP"},
|
||||
{CTRY_JAPAN15, MKK5_MKKC, "JP"},
|
||||
{CTRY_JAPAN16, MKK6_MKKB, "JP"},
|
||||
{CTRY_JAPAN17, MKK6_MKKA2, "JP"},
|
||||
{CTRY_JAPAN18, MKK6_MKKC, "JP"},
|
||||
{CTRY_JAPAN19, MKK7_MKKB, "JP"},
|
||||
{CTRY_JAPAN20, MKK7_MKKA2, "JP"},
|
||||
{CTRY_JAPAN21, MKK7_MKKC, "JP"},
|
||||
{CTRY_JAPAN22, MKK8_MKKB, "JP"},
|
||||
{CTRY_JAPAN23, MKK8_MKKA2, "JP"},
|
||||
{CTRY_JAPAN24, MKK8_MKKC, "JP"},
|
||||
{CTRY_JAPAN25, MKK3_MKKA, "JP"},
|
||||
{CTRY_JAPAN26, MKK3_MKKA1, "JP"},
|
||||
{CTRY_JAPAN27, MKK3_FCCA, "JP"},
|
||||
{CTRY_JAPAN28, MKK4_MKKA1, "JP"},
|
||||
{CTRY_JAPAN29, MKK4_FCCA, "JP"},
|
||||
{CTRY_JAPAN30, MKK6_MKKA1, "JP"},
|
||||
{CTRY_JAPAN31, MKK6_FCCA, "JP"},
|
||||
{CTRY_JAPAN32, MKK7_MKKA1, "JP"},
|
||||
{CTRY_JAPAN33, MKK7_FCCA, "JP"},
|
||||
{CTRY_JAPAN34, MKK9_MKKA, "JP"},
|
||||
{CTRY_JAPAN35, MKK10_MKKA, "JP"},
|
||||
{CTRY_JAPAN36, MKK4_MKKA, "JP"},
|
||||
{CTRY_JAPAN37, MKK9_FCCA, "JP"},
|
||||
{CTRY_JAPAN38, MKK9_MKKA1, "JP"},
|
||||
{CTRY_JAPAN39, MKK9_MKKC, "JP"},
|
||||
{CTRY_JAPAN40, MKK9_MKKA2, "JP"},
|
||||
{CTRY_JAPAN41, MKK10_FCCA, "JP"},
|
||||
{CTRY_JAPAN42, MKK10_MKKA1, "JP"},
|
||||
{CTRY_JAPAN43, MKK10_MKKC, "JP"},
|
||||
{CTRY_JAPAN44, MKK10_MKKA2, "JP"},
|
||||
{CTRY_JAPAN45, MKK11_MKKA, "JP"},
|
||||
{CTRY_JAPAN46, MKK11_FCCA, "JP"},
|
||||
{CTRY_JAPAN47, MKK11_MKKA1, "JP"},
|
||||
{CTRY_JAPAN48, MKK11_MKKC, "JP"},
|
||||
{CTRY_JAPAN49, MKK11_MKKA2, "JP"},
|
||||
{CTRY_JAPAN50, MKK12_MKKA, "JP"},
|
||||
{CTRY_JAPAN51, MKK12_FCCA, "JP"},
|
||||
{CTRY_JAPAN52, MKK12_MKKA1, "JP"},
|
||||
{CTRY_JAPAN53, MKK12_MKKC, "JP"},
|
||||
{CTRY_JAPAN54, MKK12_MKKA2, "JP"},
|
||||
{CTRY_JAPAN57, MKK13_MKKB, "JP"},
|
||||
{CTRY_JAPAN58, MKK14_MKKA1, "JP"},
|
||||
{CTRY_JAPAN59, MKK15_MKKA1, "JP"},
|
||||
|
||||
{CTRY_JORDAN, ETSI2_WORLD, "JO"},
|
||||
{CTRY_KAZAKHSTAN, NULL1_WORLD, "KZ"},
|
||||
{CTRY_KENYA, APL1_WORLD, "KE"},
|
||||
{CTRY_KOREA_NORTH, APL9_WORLD, "KP"},
|
||||
{CTRY_KOREA_ROC, APL9_WORLD, "KR"},
|
||||
{CTRY_KOREA_ROC2, APL2_WORLD, "K2"},
|
||||
{CTRY_KOREA_ROC3, APL9_WORLD, "K3"},
|
||||
{CTRY_KOREA_ROC4, APL10_WORLD, "K4"},
|
||||
{CTRY_KUWAIT, ETSI3_WORLD, "KW"},
|
||||
{CTRY_LATVIA, ETSI1_WORLD, "LV"},
|
||||
{CTRY_LEBANON, NULL1_WORLD, "LB"},
|
||||
{CTRY_LIECHTENSTEIN, ETSI1_WORLD, "LI"},
|
||||
{CTRY_LITHUANIA, ETSI1_WORLD, "LT"},
|
||||
{CTRY_LUXEMBOURG, ETSI1_WORLD, "LU"},
|
||||
{CTRY_MACAU, FCC2_WORLD, "MO"},
|
||||
{CTRY_MACEDONIA, ETSI1_WORLD, "MK"},
|
||||
{CTRY_MALAYSIA, FCC1_WORLD, "MY"},
|
||||
{CTRY_MALTA, ETSI1_WORLD, "MT"},
|
||||
{CTRY_MAURITIUS, ETSI1_WORLD, "MU"},
|
||||
{CTRY_MEXICO, FCC1_FCCA, "MX"},
|
||||
{CTRY_MONACO, ETSI4_WORLD, "MC"},
|
||||
{CTRY_MONTENEGRO, ETSI1_WORLD, "ME"},
|
||||
{CTRY_MOROCCO, APL4_WORLD, "MA"},
|
||||
{CTRY_NEPAL, APL1_WORLD, "NP"},
|
||||
{CTRY_NETHERLANDS, ETSI1_WORLD, "NL"},
|
||||
{CTRY_NETHERLANDS_ANTILLES, ETSI1_WORLD, "AN"},
|
||||
{CTRY_NEW_ZEALAND, FCC3_ETSIC, "NZ"},
|
||||
{CTRY_NICARAGUA, FCC3_FCCA, "NI"},
|
||||
{CTRY_NORWAY, ETSI1_WORLD, "NO"},
|
||||
{CTRY_OMAN, FCC3_WORLD, "OM"},
|
||||
{CTRY_PAKISTAN, NULL1_WORLD, "PK"},
|
||||
{CTRY_PANAMA, FCC1_FCCA, "PA"},
|
||||
{CTRY_PAPUA_NEW_GUINEA, FCC1_WORLD, "PG"},
|
||||
{CTRY_PARAGUAY, FCC3_WORLD, "PY"},
|
||||
{CTRY_PERU, FCC3_WORLD, "PE"},
|
||||
{CTRY_PHILIPPINES, FCC3_WORLD, "PH"},
|
||||
{CTRY_POLAND, ETSI1_WORLD, "PL"},
|
||||
{CTRY_PORTUGAL, ETSI1_WORLD, "PT"},
|
||||
{CTRY_PUERTO_RICO, FCC1_FCCA, "PR"},
|
||||
{CTRY_QATAR, APL1_WORLD, "QA"},
|
||||
{CTRY_ROMANIA, ETSI1_WORLD, "RO"},
|
||||
{CTRY_RUSSIA, ETSI8_WORLD, "RU"},
|
||||
{CTRY_SAUDI_ARABIA, NULL1_WORLD, "SA"},
|
||||
{CTRY_SERBIA, ETSI1_WORLD, "RS"},
|
||||
{CTRY_SERBIA_MONTENEGRO, ETSI1_WORLD, "CS"},
|
||||
{CTRY_SINGAPORE, FCC3_WORLD, "SG"},
|
||||
{CTRY_SLOVAKIA, ETSI1_WORLD, "SK"},
|
||||
{CTRY_SLOVENIA, ETSI1_WORLD, "SI"},
|
||||
{CTRY_SOUTH_AFRICA, FCC3_WORLD, "ZA"},
|
||||
{CTRY_SPAIN, ETSI1_WORLD, "ES"},
|
||||
{CTRY_SRI_LANKA, FCC3_WORLD, "LK"},
|
||||
{CTRY_SWEDEN, ETSI1_WORLD, "SE"},
|
||||
{CTRY_SWITZERLAND, ETSI1_WORLD, "CH"},
|
||||
{CTRY_SYRIA, NULL1_WORLD, "SY"},
|
||||
{CTRY_TAIWAN, APL3_FCCA, "TW"},
|
||||
{CTRY_TANZANIA, APL1_WORLD, "TZ"},
|
||||
{CTRY_THAILAND, FCC3_WORLD, "TH"},
|
||||
{CTRY_TRINIDAD_Y_TOBAGO, FCC3_WORLD, "TT"},
|
||||
{CTRY_TUNISIA, ETSI3_WORLD, "TN"},
|
||||
{CTRY_TURKEY, ETSI3_WORLD, "TR"},
|
||||
{CTRY_UGANDA, FCC3_WORLD, "UG"},
|
||||
{CTRY_UKRAINE, ETSI9_WORLD, "UA"},
|
||||
{CTRY_UAE, NULL1_WORLD, "AE"},
|
||||
{CTRY_UNITED_KINGDOM, ETSI1_WORLD, "GB"},
|
||||
{CTRY_UNITED_STATES, FCC3_FCCA, "US"},
|
||||
{CTRY_UNITED_STATES2, FCC3_FCCA, "US"},
|
||||
{CTRY_UNITED_STATES3, FCC3_FCCA, "US"},
|
||||
/* This "PS" is for US public safety actually... to support this we
|
||||
* would need to assign new special alpha2 to CRDA db as with the world
|
||||
* regdomain and use another alpha2 */
|
||||
{CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS"},
|
||||
{CTRY_URUGUAY, FCC3_WORLD, "UY"},
|
||||
{CTRY_UZBEKISTAN, FCC3_FCCA, "UZ"},
|
||||
{CTRY_VENEZUELA, APL2_ETSIC, "VE"},
|
||||
{CTRY_VIET_NAM, NULL1_WORLD, "VN"},
|
||||
{CTRY_YEMEN, NULL1_WORLD, "YE"},
|
||||
{CTRY_ZIMBABWE, ETSI1_WORLD, "ZW"},
|
||||
};
|
||||
|
||||
#endif
|
||||
129
sys/contrib/dev/athk/spectral_common.h
Normal file
129
sys/contrib/dev/athk/spectral_common.h
Normal file
@ -0,0 +1,129 @@
|
||||
/*
|
||||
* Copyright (c) 2013 Qualcomm Atheros, Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef SPECTRAL_COMMON_H
|
||||
#define SPECTRAL_COMMON_H
|
||||
|
||||
#define SPECTRAL_HT20_NUM_BINS 56
|
||||
#define SPECTRAL_HT20_40_NUM_BINS 128
|
||||
|
||||
/* TODO: could possibly be 512, but no samples this large
|
||||
* could be acquired so far.
|
||||
*/
|
||||
#define SPECTRAL_ATH10K_MAX_NUM_BINS 256
|
||||
|
||||
/* FFT sample format given to userspace via debugfs.
|
||||
*
|
||||
* Please keep the type/length at the front position and change
|
||||
* other fields after adding another sample type
|
||||
*
|
||||
* TODO: this might need rework when switching to nl80211-based
|
||||
* interface.
|
||||
*/
|
||||
enum ath_fft_sample_type {
|
||||
ATH_FFT_SAMPLE_HT20 = 1,
|
||||
ATH_FFT_SAMPLE_HT20_40,
|
||||
ATH_FFT_SAMPLE_ATH10K,
|
||||
ATH_FFT_SAMPLE_ATH11K
|
||||
};
|
||||
|
||||
struct fft_sample_tlv {
|
||||
u8 type; /* see ath_fft_sample */
|
||||
__be16 length;
|
||||
/* type dependent data follows */
|
||||
} __packed;
|
||||
|
||||
struct fft_sample_ht20 {
|
||||
struct fft_sample_tlv tlv;
|
||||
|
||||
u8 max_exp;
|
||||
|
||||
__be16 freq;
|
||||
s8 rssi;
|
||||
s8 noise;
|
||||
|
||||
__be16 max_magnitude;
|
||||
u8 max_index;
|
||||
u8 bitmap_weight;
|
||||
|
||||
__be64 tsf;
|
||||
|
||||
u8 data[SPECTRAL_HT20_NUM_BINS];
|
||||
} __packed;
|
||||
|
||||
struct fft_sample_ht20_40 {
|
||||
struct fft_sample_tlv tlv;
|
||||
|
||||
u8 channel_type;
|
||||
__be16 freq;
|
||||
|
||||
s8 lower_rssi;
|
||||
s8 upper_rssi;
|
||||
|
||||
__be64 tsf;
|
||||
|
||||
s8 lower_noise;
|
||||
s8 upper_noise;
|
||||
|
||||
__be16 lower_max_magnitude;
|
||||
__be16 upper_max_magnitude;
|
||||
|
||||
u8 lower_max_index;
|
||||
u8 upper_max_index;
|
||||
|
||||
u8 lower_bitmap_weight;
|
||||
u8 upper_bitmap_weight;
|
||||
|
||||
u8 max_exp;
|
||||
|
||||
u8 data[SPECTRAL_HT20_40_NUM_BINS];
|
||||
} __packed;
|
||||
|
||||
struct fft_sample_ath10k {
|
||||
struct fft_sample_tlv tlv;
|
||||
u8 chan_width_mhz;
|
||||
__be16 freq1;
|
||||
__be16 freq2;
|
||||
__be16 noise;
|
||||
__be16 max_magnitude;
|
||||
__be16 total_gain_db;
|
||||
__be16 base_pwr_db;
|
||||
__be64 tsf;
|
||||
s8 max_index;
|
||||
u8 rssi;
|
||||
u8 relpwr_db;
|
||||
u8 avgpwr_db;
|
||||
u8 max_exp;
|
||||
|
||||
u8 data[0];
|
||||
} __packed;
|
||||
|
||||
struct fft_sample_ath11k {
|
||||
struct fft_sample_tlv tlv;
|
||||
u8 chan_width_mhz;
|
||||
s8 max_index;
|
||||
u8 max_exp;
|
||||
__be16 freq1;
|
||||
__be16 freq2;
|
||||
__be16 max_magnitude;
|
||||
__be16 rssi;
|
||||
__be32 tsf;
|
||||
__be32 noise;
|
||||
|
||||
u8 data[0];
|
||||
} __packed;
|
||||
|
||||
#endif /* SPECTRAL_COMMON_H */
|
||||
20
sys/contrib/dev/athk/trace.c
Normal file
20
sys/contrib/dev/athk/trace.c
Normal file
@ -0,0 +1,20 @@
|
||||
/*
|
||||
* Copyright (c) 2014 Qualcomm Atheros, Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
||||
#define CREATE_TRACE_POINTS
|
||||
#include "trace.h"
|
||||
71
sys/contrib/dev/athk/trace.h
Normal file
71
sys/contrib/dev/athk/trace.h
Normal file
@ -0,0 +1,71 @@
|
||||
/*
|
||||
* Copyright (c) 2014 Qualcomm Atheros, Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#if !defined(_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
|
||||
#define _TRACE_H
|
||||
|
||||
#include <linux/tracepoint.h>
|
||||
#include "ath.h"
|
||||
|
||||
#undef TRACE_SYSTEM
|
||||
#define TRACE_SYSTEM ath
|
||||
|
||||
#if !defined(CONFIG_ATH_TRACEPOINTS)
|
||||
|
||||
#undef TRACE_EVENT
|
||||
#define TRACE_EVENT(name, proto, ...) static inline void trace_ ## name(proto) {}
|
||||
|
||||
#endif /* CONFIG_ATH_TRACEPOINTS */
|
||||
|
||||
TRACE_EVENT(ath_log,
|
||||
|
||||
TP_PROTO(struct wiphy *wiphy,
|
||||
struct va_format *vaf),
|
||||
|
||||
TP_ARGS(wiphy, vaf),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__string(device, wiphy_name(wiphy))
|
||||
__string(driver, KBUILD_MODNAME)
|
||||
__dynamic_array(char, msg, ATH_DBG_MAX_LEN)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__assign_str(device, wiphy_name(wiphy));
|
||||
__assign_str(driver, KBUILD_MODNAME);
|
||||
WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
|
||||
ATH_DBG_MAX_LEN,
|
||||
vaf->fmt,
|
||||
*vaf->va) >= ATH_DBG_MAX_LEN);
|
||||
),
|
||||
|
||||
TP_printk(
|
||||
"%s %s %s",
|
||||
__get_str(driver),
|
||||
__get_str(device),
|
||||
__get_str(msg)
|
||||
)
|
||||
);
|
||||
|
||||
#endif /* _TRACE_H || TRACE_HEADER_MULTI_READ */
|
||||
|
||||
#undef TRACE_INCLUDE_PATH
|
||||
#define TRACE_INCLUDE_PATH .
|
||||
#undef TRACE_INCLUDE_FILE
|
||||
#define TRACE_INCLUDE_FILE trace
|
||||
|
||||
/* This part must be outside protection */
|
||||
#include <trace/define_trace.h>
|
||||
37
sys/modules/athk_common/Makefile
Normal file
37
sys/modules/athk_common/Makefile
Normal file
@ -0,0 +1,37 @@
|
||||
# $FreeBSD$
|
||||
|
||||
DEVDIR= ${SRCTOP}/sys/contrib/dev/athk
|
||||
|
||||
.PATH: ${DEVDIR}
|
||||
|
||||
KMOD= athk_common
|
||||
|
||||
WITH_ATH_DEBUG= 1
|
||||
WITH_ATH_TRACEPOINTS= 0
|
||||
|
||||
SRCS= main.c
|
||||
SRCS+= dfs_pattern_detector.c dfs_pri_detector.c
|
||||
SRCS+= hw.c key.c regd.c
|
||||
|
||||
.if defined(WITH_ATH_DEBUG) && ${WITH_ATH_DEBUG} > 0
|
||||
SRCS+= debug.c
|
||||
CFLAGS+= -DCONFIG_ATH_DEBUG
|
||||
.endif
|
||||
|
||||
.if defined(WITH_ATH_TRACEPOINTS) && ${WITH_ATH_TRACEPOINTS} > 0
|
||||
SRCS+= trace.c
|
||||
CFLAGS+= -DCONFIG_ATH_TRACEPOINTS
|
||||
.endif
|
||||
|
||||
# Other
|
||||
SRCS+= ${LINUXKPI_GENSRCS}
|
||||
SRCS+= opt_wlan.h opt_inet6.h opt_inet.h opt_acpi.h
|
||||
|
||||
CFLAGS+= -DKBUILD_MODNAME='"athk_common"'
|
||||
|
||||
CFLAGS+= -I${DEVDIR}
|
||||
CFLAGS+= ${LINUXKPI_INCLUDES}
|
||||
# Helpful after fresh imports.
|
||||
#CFLAGS+= -ferror-limit=0
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
Loading…
Reference in New Issue
Block a user