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Use relocation-safe methods to determine the sizes of the exception handlers.

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A "size" symbol with its address set to the length of handler would be
shifted forward with all other addresses when relocations are processed.
Instead, just note the end and do the subtraction at runtime.
This commit is contained in:
Nathan Whitehorn 2015-01-23 07:36:51 +00:00
parent c5f282daad
commit ec336f0f0c
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=277561
3 changed files with 61 additions and 52 deletions
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69
sys/powerpc/aim/machdep.c
View File

@ -237,14 +237,14 @@ extern void *rfid_patch, *rfi_patch1, *rfi_patch2;
extern void *trapcode64;
#endif
extern void *rstcode, *rstsize;
extern void *trapcode, *trapsize, *trapcode2;
extern void *slbtrap, *slbtrapsize;
extern void *alitrap, *alisize;
extern void *dsitrap, *dsisize;
extern void *rstcode, *rstcodeend;
extern void *trapcode, *trapcodeend, *trapcode2;
extern void *slbtrap, *slbtrapend;
extern void *alitrap, *aliend;
extern void *dsitrap, *dsiend;
extern void *decrint, *decrsize;
extern void *extint, *extsize;
extern void *dblow, *dbsize;
extern void *dblow, *dbend;
extern void *imisstrap, *imisssize;
extern void *dlmisstrap, *dlmisssize;
extern void *dsmisstrap, *dsmisssize;
@ -255,7 +255,7 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
struct pcpu *pc;
vm_offset_t startkernel, endkernel;
void *generictrap;
size_t trap_offset;
size_t trap_offset, trapsize;
void *kmdp;
char *env;
register_t msr, scratch;
@ -513,35 +513,44 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
*((register_t *)TRAP_TOCBASE) = toc;
#endif
bcopy(&rstcode, (void *)(EXC_RST + trap_offset), (size_t)&rstsize);
trapsize = (size_t)&trapcodeend - (size_t)&trapcode;
bcopy(&rstcode, (void *)(EXC_RST + trap_offset), (size_t)&rstcodeend -
(size_t)&rstcode);
#ifdef KDB
bcopy(&dblow, (void *)(EXC_MCHK + trap_offset), (size_t)&dbsize);
bcopy(&dblow, (void *)(EXC_PGM + trap_offset), (size_t)&dbsize);
bcopy(&dblow, (void *)(EXC_TRC + trap_offset), (size_t)&dbsize);
bcopy(&dblow, (void *)(EXC_BPT + trap_offset), (size_t)&dbsize);
bcopy(&dblow, (void *)(EXC_MCHK + trap_offset), (size_t)&dbend -
(size_t)&dblow);
bcopy(&dblow, (void *)(EXC_PGM + trap_offset), (size_t)&dbend -
(size_t)&dblow);
bcopy(&dblow, (void *)(EXC_TRC + trap_offset), (size_t)&dbend -
(size_t)&dblow);
bcopy(&dblow, (void *)(EXC_BPT + trap_offset), (size_t)&dbend -
(size_t)&dblow);
#else
bcopy(generictrap, (void *)EXC_MCHK, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_PGM, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_TRC, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_BPT, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_MCHK, trapsize);
bcopy(generictrap, (void *)EXC_PGM, trapsize);
bcopy(generictrap, (void *)EXC_TRC, trapsize);
bcopy(generictrap, (void *)EXC_BPT, trapsize);
#endif
bcopy(&alitrap, (void *)(EXC_ALI + trap_offset), (size_t)&alisize);
bcopy(&dsitrap, (void *)(EXC_DSI + trap_offset), (size_t)&dsisize);
bcopy(generictrap, (void *)EXC_ISI, (size_t)&trapsize);
bcopy(&alitrap, (void *)(EXC_ALI + trap_offset), (size_t)&aliend -
(size_t)&alitrap);
bcopy(&dsitrap, (void *)(EXC_DSI + trap_offset), (size_t)&dsitrap -
(size_t)&dsitrap);
bcopy(generictrap, (void *)EXC_ISI, trapsize);
#ifdef __powerpc64__
bcopy(&slbtrap, (void *)EXC_DSE, (size_t)&slbtrapsize);
bcopy(&slbtrap, (void *)EXC_ISE, (size_t)&slbtrapsize);
bcopy(&slbtrap, (void *)EXC_DSE,(size_t)&slbtrapend - (size_t)&slbtrap);
bcopy(&slbtrap, (void *)EXC_ISE,(size_t)&slbtrapend - (size_t)&slbtrap);
#endif
bcopy(generictrap, (void *)EXC_EXI, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_FPU, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_DECR, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_SC, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_FPA, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_VEC, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_PERF, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_VECAST_G4, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_VECAST_G5, (size_t)&trapsize);
bcopy(generictrap, (void *)EXC_EXI, trapsize);
bcopy(generictrap, (void *)EXC_FPU, trapsize);
bcopy(generictrap, (void *)EXC_DECR, trapsize);
bcopy(generictrap, (void *)EXC_SC, trapsize);
bcopy(generictrap, (void *)EXC_FPA, trapsize);
bcopy(generictrap, (void *)EXC_VEC, trapsize);
bcopy(generictrap, (void *)EXC_PERF, trapsize);
bcopy(generictrap, (void *)EXC_VECAST_G4, trapsize);
bcopy(generictrap, (void *)EXC_VECAST_G5, trapsize);
#ifndef __powerpc64__
/* G2-specific TLB miss helper handlers */
bcopy(&imisstrap, (void *)EXC_IMISS, (size_t)&imisssize);

20
sys/powerpc/aim/trap_subr32.S
View File

@ -299,10 +299,10 @@ CNAME(restorebridgesize) = .-CNAME(restorebridge)
* not still hanging around in the trap handling region
* once the MMU is turned on.
*/
.globl CNAME(rstcode), CNAME(rstsize)
.globl CNAME(rstcode), CNAME(rstcodeend)
CNAME(rstcode):
ba cpu_reset
CNAME(rstsize) = . - CNAME(rstcode)
CNAME(rstcodeend):
cpu_reset:
bl 1f
@ -339,14 +339,14 @@ cpu_reset:
* (except ISI/DSI, ALI, and the interrupts)
*/
.globl CNAME(trapcode),CNAME(trapsize)
.globl CNAME(trapcode),CNAME(trapcodeend)
CNAME(trapcode):
mtsprg1 %r1 /* save SP */
mflr %r1 /* Save the old LR in r1 */
mtsprg2 %r1 /* And then in SPRG2 */
li %r1, 0x20 /* How to get the vector from LR */
bla generictrap /* LR & SPRG3 is exception # */
CNAME(trapsize) = .-CNAME(trapcode)
CNAME(trapcodeend):
/*
* 64-bit version of trapcode. Identical, except it calls generictrap64.
@ -362,7 +362,7 @@ CNAME(trapcode64):
/*
* For ALI: has to save DSISR and DAR
*/
.globl CNAME(alitrap),CNAME(alisize)
.globl CNAME(alitrap),CNAME(aliend)
CNAME(alitrap):
mtsprg1 %r1 /* save SP */
GET_CPUINFO(%r1)
@ -386,7 +386,7 @@ CNAME(alitrap):
mfsrr1 %r31
mtcr %r31
bla s_trap
CNAME(alisize) = .-CNAME(alitrap)
CNAME(aliend):
/*
* G2 specific: instuction TLB miss.
@ -594,7 +594,7 @@ CNAME(dsmisssize) = .-CNAME(dsmisstrap)
* Has to handle BAT spills
* and standard pagetable spills
*/
.globl CNAME(dsitrap),CNAME(dsisize)
.globl CNAME(dsitrap),CNAME(dsiend)
CNAME(dsitrap):
mtsprg1 %r1 /* save SP */
GET_CPUINFO(%r1)
@ -645,7 +645,7 @@ CNAME(dsitrap):
1:
mflr %r28 /* save LR (SP already saved) */
bla disitrap
CNAME(dsisize) = .-CNAME(dsitrap)
CNAME(dsiend):
/*
* Preamble code for DSI/ISI traps
@ -883,7 +883,7 @@ CNAME(rfi_patch2):
/*
* In case of KDB we want a separate trap catcher for it
*/
.globl CNAME(dblow),CNAME(dbsize)
.globl CNAME(dblow),CNAME(dbend)
CNAME(dblow):
mtsprg1 %r1 /* save SP */
mtsprg2 %r29 /* save r29 */
@ -909,5 +909,5 @@ CNAME(dblow):
stw %r31,(PC_DBSAVE+CPUSAVE_R31)(%r1) /* free r31 */
mflr %r28 /* save LR */
bla dbtrap
CNAME(dbsize) = .-CNAME(dblow)
CNAME(dbend):
#endif /* KDB */

24
sys/powerpc/aim/trap_subr64.S
View File

@ -294,7 +294,7 @@ dtrace_invop_calltrap_addr:
* not still hanging around in the trap handling region
* once the MMU is turned on.
*/
.globl CNAME(rstcode), CNAME(rstsize)
.globl CNAME(rstcode), CNAME(rstcodeend)
CNAME(rstcode):
/* Explicitly set MSR[SF] */
mfmsr %r9
@ -309,7 +309,7 @@ CNAME(rstcode):
mtlr %r9
blr
CNAME(rstsize) = . - CNAME(rstcode)
CNAME(rstcodeend):
cpu_reset:
GET_TOCBASE(%r2)
@ -350,7 +350,7 @@ cpu_reset:
* (except ISI/DSI, ALI, and the interrupts). Has to fit in 8 instructions!
*/
.globl CNAME(trapcode),CNAME(trapsize)
.globl CNAME(trapcode),CNAME(trapcodeend)
.p2align 3
CNAME(trapcode):
mtsprg1 %r1 /* save SP */
@ -361,7 +361,7 @@ CNAME(trapcode):
mtlr %r1
li %r1, 0xA0 /* How to get the vector from LR */
blrl /* Branch to generictrap */
CNAME(trapsize) = .-CNAME(trapcode)
CNAME(trapcodeend):
/*
* For SLB misses: do special things for the kernel
@ -369,7 +369,7 @@ CNAME(trapsize) = .-CNAME(trapcode)
* Note: SPRG1 is always safe to overwrite any time the MMU is on, which is
* the only time this can be called.
*/
.globl CNAME(slbtrap),CNAME(slbtrapsize)
.globl CNAME(slbtrap),CNAME(slbtrapend)
.p2align 3
CNAME(slbtrap):
mtsprg1 %r1 /* save SP */
@ -404,7 +404,7 @@ CNAME(slbtrap):
mtlr %r1
GET_CPUINFO(%r1)
blrl /* 124 bytes -- 4 to spare */
CNAME(slbtrapsize) = .-CNAME(slbtrap)
CNAME(slbtrapend):
kern_slbtrap:
std %r2,(PC_SLBSAVE+136)(%r1) /* old LR */
@ -525,7 +525,7 @@ kern_slbtrap:
/*
* For ALI: has to save DSISR and DAR
*/
.globl CNAME(alitrap),CNAME(alisize)
.globl CNAME(alitrap),CNAME(aliend)
CNAME(alitrap):
mtsprg1 %r1 /* save SP */
GET_CPUINFO(%r1)
@ -560,13 +560,13 @@ CNAME(alitrap):
mfsrr1 %r31
mtcr %r31
blrl
CNAME(alisize) = .-CNAME(alitrap)
CNAME(aliend):
/*
* Similar to the above for DSI
* Has to handle standard pagetable spills
*/
.globl CNAME(dsitrap),CNAME(dsisize)
.globl CNAME(dsitrap),CNAME(dsiend)
CNAME(dsitrap):
mtsprg1 %r1 /* save SP */
GET_CPUINFO(%r1)
@ -587,7 +587,7 @@ CNAME(dsitrap):
ld %r1,0(%r1)
mtlr %r1
blrl /* Branch to generictrap */
CNAME(dsisize) = .-CNAME(dsitrap)
CNAME(dsiend):
/*
* Preamble code for DSI/ISI traps
@ -830,7 +830,7 @@ dbleave:
/*
* In case of KDB we want a separate trap catcher for it
*/
.globl CNAME(dblow),CNAME(dbsize)
.globl CNAME(dblow),CNAME(dbend)
CNAME(dblow):
mtsprg1 %r1 /* save SP */
mtsprg2 %r29 /* save r29 */
@ -869,5 +869,5 @@ CNAME(dblow):
ld %r1,0(%r1)
mtlr %r1
blrl /* Branch to generictrap */
CNAME(dbsize) = .-CNAME(dblow)
CNAME(dbend):
#endif /* KDB */