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typo: suppported.

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This commit is contained in:
Pedro F. Giffuni 2019-05-29 02:08:23 +00:00
parent d9a48fc632
commit ec845b07c6
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=348349
2 changed files with 3 additions and 3 deletions
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2
lib/libc/net/rthdr.c
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@ -282,7 +282,7 @@ inet6_rth_space(int type, int segments)
return (((segments * 2) + 1) << 3);
/* FALLTHROUGH */
default:
return (0); /* type not suppported */
return (0); /* type not supported */
}
}

4
sys/i386/i386/initcpu.c
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@ -848,7 +848,7 @@ enable_K6_wt_alloc(void)
*/
/*
* The AMD-K6 processer provides the 64-bit Test Register 12(TR12),
* but only the Cache Inhibit(CI) (bit 3 of TR12) is suppported.
* but only the Cache Inhibit(CI) (bit 3 of TR12) is supported.
* All other bits in TR12 have no effect on the processer's operation.
* The I/O Trap Restart function (bit 9 of TR12) is always enabled
* on the AMD-K6.
@ -898,7 +898,7 @@ enable_K6_2_wt_alloc(void)
*/
/*
* The AMD-K6 processer provides the 64-bit Test Register 12(TR12),
* but only the Cache Inhibit(CI) (bit 3 of TR12) is suppported.
* but only the Cache Inhibit(CI) (bit 3 of TR12) is supported.
* All other bits in TR12 have no effect on the processer's operation.
* The I/O Trap Restart function (bit 9 of TR12) is always enabled
* on the AMD-K6.