- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc. - Add i2c devices to the tree - Add IPG clock
This commit is contained in:
Ruslan Bukin
parent
f32801f42b
commit
ee270bbca3
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=262483
@ -164,6 +164,18 @@ struct clk {
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uint32_t sel_val;
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};
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static struct clk ipg_clk = {
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.reg = CCM_CACRR,
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.enable_reg = 0,
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.div_mask = IPG_CLK_DIV_MASK,
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.div_shift = IPG_CLK_DIV_SHIFT,
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.div_val = 1, /* Divide by 2 */
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.sel_reg = 0,
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.sel_mask = 0,
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.sel_shift = 0,
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.sel_val = 0,
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};
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/*
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PLL4 clock divider (before switching the clocks should be gated)
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000 Divide by 1 (only if PLL frequency less than or equal to 650 MHz)
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@ -310,6 +322,7 @@ struct clock_entry {
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};
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static struct clock_entry clock_map[] = {
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{"ipg", &ipg_clk},
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{"pll4", &pll4_clk},
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{"sai3", &sai3_clk},
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{"cko1", &cko1_clk},
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@ -56,21 +56,42 @@ __FBSDID("$FreeBSD$");
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#include <arm/freescale/vybrid/vf_iomuxc.h>
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#include <arm/freescale/vybrid/vf_common.h>
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#define IBE (1 << 0) /* Input Buffer Enable Field */
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#define OBE (1 << 1) /* Output Buffer Enable Field. */
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#define PUE (1 << 2) /* Pull / Keep Select Field. */
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#define PKE (1 << 3) /* Pull / Keep Enable Field. */
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#define PUS_MASK (3 << 4) /* Pull Up / Down Config Field. */
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#define DSE_MASK (7 << 6) /* Drive Strength Field. */
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#define HYS (1 << 9) /* Hysteresis Enable Field */
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#define MUX_MODE_MASK 7
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#define MUX_MODE_SHIFT 20
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#define MUX_MODE_GPIO 0
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#define MUX_MODE_VBUS_EN_OTG 2
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#define PUS_22_KOHM_PULL_UP (3 << 4)
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#define DSE_25_OHM (6 << 6)
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#define IBE (1 << 0) /* Input Buffer Enable Field */
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#define OBE (1 << 1) /* Output Buffer Enable Field. */
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#define PUE (1 << 2) /* Pull / Keep Select Field. */
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#define PKE (1 << 3) /* Pull / Keep Enable Field. */
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#define HYS (1 << 9) /* Hysteresis Enable Field */
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#define ODE (1 << 10) /* Open Drain Enable Field. */
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#define SRE (1 << 11) /* Slew Rate Field. */
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#define SPEED_SHIFT 12
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#define SPEED_MASK 0x3
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#define SPEED_LOW 0 /* 50 MHz */
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#define SPEED_MEDIUM 0x1 /* 100 MHz */
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#define SPEED_HIGH 0x3 /* 200 MHz */
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#define PUS_SHIFT 4 /* Pull Up / Down Config Field Shift */
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#define PUS_MASK 0x3
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#define PUS_100_KOHM_PULL_DOWN 0
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#define PUS_47_KOHM_PULL_UP 0x1
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#define PUS_100_KOHM_PULL_UP 0x2
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#define PUS_22_KOHM_PULL_UP 0x3
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#define DSE_SHIFT 6 /* Drive Strength Field Shift */
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#define DSE_MASK 0x7
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#define DSE_DISABLED 0 /* Output driver disabled */
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#define DSE_150_OHM 0x1
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#define DSE_75_OHM 0x2
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#define DSE_50_OHM 0x3
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#define DSE_37_OHM 0x4
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#define DSE_30_OHM 0x5
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#define DSE_25_OHM 0x6
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#define DSE_20_OHM 0x7
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#define MAX_MUX_LEN 1024
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@ -100,19 +121,6 @@ iomuxc_probe(device_t dev)
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return (BUS_PROBE_DEFAULT);
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}
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static int
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configure_pad(struct iomuxc_softc *sc, int pad, int mux_mode)
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{
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int reg;
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reg = READ4(sc, pad);
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reg &= ~(MUX_MODE_MASK << MUX_MODE_SHIFT);
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reg |= (mux_mode << MUX_MODE_SHIFT);
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WRITE4(sc, pad, reg);
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return (0);
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}
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static int
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pinmux_set(struct iomuxc_softc *sc)
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{
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@ -121,7 +129,7 @@ pinmux_set(struct iomuxc_softc *sc)
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int len;
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int values;
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int pin;
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int mux_mode;
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int pin_cfg;
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int i;
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root = OF_finddevice("/");
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@ -146,12 +154,12 @@ pinmux_set(struct iomuxc_softc *sc)
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values = len / (sizeof(uint32_t));
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for (i = 0; i < values; i += 2) {
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pin = fdt32_to_cpu(iomux_config[i]);
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mux_mode = fdt32_to_cpu(iomux_config[i+1]);
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pin_cfg = fdt32_to_cpu(iomux_config[i+1]);
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#if 0
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device_printf(sc->dev, "Set pin %d to ALT%d\n",
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pin, mux_mode);
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device_printf(sc->dev, "Set pin %d to 0x%08x\n",
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pin, pin_cfg);
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#endif
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configure_pad(sc, IOMUXC(pin), mux_mode);
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WRITE4(sc, IOMUXC(pin), pin_cfg);
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}
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}
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@ -169,7 +177,6 @@ static int
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iomuxc_attach(device_t dev)
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{
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struct iomuxc_softc *sc;
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int reg;
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sc = device_get_softc(dev);
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sc->dev = dev;
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@ -183,11 +190,6 @@ iomuxc_attach(device_t dev)
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sc->bst = rman_get_bustag(sc->tmr_res[0]);
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sc->bsh = rman_get_bushandle(sc->tmr_res[0]);
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/* USB */
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configure_pad(sc, IOMUXC_PTA17, MUX_MODE_VBUS_EN_OTG);
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reg = (PKE | PUE | PUS_22_KOHM_PULL_UP | DSE_25_OHM | OBE);
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WRITE4(sc, IOMUXC_PTA7, reg);
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pinmux_set(sc);
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return (0);
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@ -45,17 +45,26 @@
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fec1: ethernet@400D1000 {
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status = "okay";
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iomux_config = < 54 0x1 55 0x1
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56 0x1 57 0x1
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58 0x1 59 0x1
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60 0x1 61 0x1
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62 0x1 0 0x1 >;
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iomux_config = < 54 0x103192
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55 0x103193
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56 0x103191
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57 0x103191
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58 0x103191
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59 0x103191
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60 0x103192
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61 0x103192
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62 0x103192
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0 0x103191 >;
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};
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sai3: sai@40032000 {
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status = "okay";
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};
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i2c0: i2c@40066000 {
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status = "okay";
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};
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adc0: adc@4003B000 {
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status = "okay";
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};
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@ -45,11 +45,16 @@
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fec1: ethernet@400D1000 {
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status = "okay";
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iomux_config = < 54 0x1 55 0x1
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56 0x1 57 0x1
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58 0x1 59 0x1
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60 0x1 61 0x1
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62 0x1 0 0x2 >;
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iomux_config = < 54 0x103192
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55 0x103193
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56 0x103191
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57 0x103191
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58 0x103191
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59 0x103191
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60 0x103192
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61 0x103192
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62 0x103192
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0 0x203191 >;
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};
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esai: esai@40062000 {
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@ -45,11 +45,16 @@
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fec1: ethernet@400D1000 {
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status = "okay";
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iomux_config = < 54 0x1 55 0x1
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56 0x1 57 0x1
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58 0x1 59 0x1
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60 0x1 61 0x1
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62 0x1 0 0x2 >;
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iomux_config = < 54 0x103192
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55 0x103193
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56 0x103191
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57 0x103191
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58 0x103191
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59 0x103191
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60 0x103192
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61 0x103192
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62 0x103192
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0 0x203191 >;
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};
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edma1: edma@40098000 {
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@ -205,9 +205,12 @@
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clock-frequency = <50000000>;
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status = "disabled";
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clock_names = "esdhc1";
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iomux_config = < 14 0x5 15 0x5
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16 0x5 17 0x5
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18 0x5 19 0x5 >;
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iomux_config = < 14 0x500060
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15 0x500060
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16 0x500060
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17 0x500060
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18 0x500060
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19 0x500060 >;
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};
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serial0: serial@40027000 {
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@ -237,6 +240,8 @@
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< 0x40050800 0x100 >; /* phy */
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interrupts = < 107 >;
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interrupt-parent = <&GIC>;
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iomux_config = < 134 0x0001be
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7 0x200060 >;
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};
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usb@400b4000 {
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@ -246,6 +251,8 @@
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< 0x40050C00 0x100 >; /* phy */
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interrupts = < 108 >;
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interrupt-parent = <&GIC>;
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iomux_config = < 134 0x0001be
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7 0x200060 >;
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};
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fec0: ethernet@400D0000 {
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@ -257,11 +264,15 @@
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phy-disable-preamble;
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status = "disabled";
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clock_names = "enet";
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iomux_config = < 45 0x1 46 0x1
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47 0x1 48 0x1
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49 0x1 50 0x1
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51 0x1 52 0x1
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53 0x1 >;
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iomux_config = < 45 0x100061
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46 0x100061
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47 0x100061
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48 0x100060
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49 0x100060
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50 0x100060
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51 0x100060
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52 0x100060
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53 0x100060 >;
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};
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fec1: ethernet@400D1000 {
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@ -273,11 +284,15 @@
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phy-disable-preamble;
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status = "disabled";
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clock_names = "enet";
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iomux_config = < 54 0x1 55 0x1
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56 0x1 57 0x1
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58 0x1 59 0x1
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60 0x1 61 0x1
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62 0x1 >;
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iomux_config = < 54 0x103192
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55 0x103193
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56 0x103191
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57 0x103191
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58 0x103191
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59 0x103191
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60 0x103192
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61 0x103192
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62 0x103192 >;
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};
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sai0: sai@4002F000 {
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@ -315,10 +330,10 @@
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edma-src-transmit = < 9 >;
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edma-mux-group = < 1 >;
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clock_names = "sai3", "cko1";
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iomux_config = < 16 0x2
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19 0x2
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21 0x2
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40 0x4 >; /* CKO1 */
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iomux_config = < 16 0x200060
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19 0x200060
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21 0x200060
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40 0x400061 >; /* CKO1 */
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};
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esai: esai@40062000 {
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@ -328,11 +343,16 @@
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interrupt-parent = <&GIC>;
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status = "disabled";
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clock_names = "esai";
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iomux_config = < 45 0x4 46 0x4
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47 0x4 48 0x4
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49 0x4 50 0x4
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51 0x4 52 0x4
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78 0x3 40 0x4>;
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iomux_config = < 45 0x400061
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46 0x400061
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47 0x400061
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48 0x400060
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49 0x400060
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50 0x400060
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51 0x400060
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52 0x400060
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78 0x3038df
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40 0x400061 >;
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};
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spi0: spi@4002C000 {
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@ -341,9 +361,11 @@
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interrupts = < 99 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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iomux_config = < 40 0x1 41 0x1
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42 0x1 43 0x1
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44 0x1 >;
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iomux_config = < 40 0x100061
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41 0x100061
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42 0x100060
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43 0x100060
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44 0x100061 >;
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};
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spi1: spi@4002D000 {
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@ -370,6 +392,43 @@
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status = "disabled";
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};
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i2c0: i2c@40066000 {
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compatible = "fsl,mvf600-i2c";
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reg = <0x40066000 0x1000>;
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interrupts = < 103 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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clock_names = "ipg";
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iomux_config = < 36 0x2034d3
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37 0x2034d3
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207 0x1
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208 0x1 >;
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};
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i2c1: i2c@40067000 {
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compatible = "fsl,mvf600-i2c";
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reg = <0x40067000 0x1000>;
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interrupts = < 104 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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i2c2: i2c@400E6000 {
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compatible = "fsl,mvf600-i2c";
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reg = <0x400E6000 0x1000>;
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interrupts = < 105 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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i2c3: i2c@400E7000 {
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compatible = "fsl,mvf600-i2c";
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reg = <0x400E7000 0x1000>;
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interrupts = < 106 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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adc0: adc@4003B000 {
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compatible = "fsl,mvf600-adc";
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reg = <0x4003B000 0x1000>;
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@ -399,21 +458,35 @@
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interrupt-parent = <&GIC>;
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status = "disabled";
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clock_names = "dcu0";
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iomux_config = < 105 0x1 106 0x1
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107 0x1 108 0x1
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109 0x1 110 0x1
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111 0x1 112 0x1
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113 0x1 114 0x1
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115 0x1 116 0x1
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117 0x1 118 0x1
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119 0x1 120 0x1
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121 0x1 122 0x1
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123 0x1 124 0x1
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125 0x1 126 0x1
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127 0x1 128 0x1
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129 0x1 130 0x1
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131 0x1 132 0x1
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133 0x1 >;
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iomux_config = < 105 0x100044
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106 0x100044
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107 0x100060
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108 0x100060
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109 0x100060
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110 0x100060
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111 0x100060
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112 0x100060
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113 0x100060
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114 0x100060
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115 0x100060
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116 0x100060
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117 0x100060
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118 0x100060
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119 0x100060
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120 0x100060
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121 0x100060
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122 0x100060
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123 0x100060
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124 0x100060
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125 0x100060
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126 0x100060
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127 0x100060
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128 0x100060
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129 0x100060
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130 0x100060
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131 0x100060
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132 0x100060
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133 0x100060 >;
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};
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};
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};
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