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riscv: Use PMAP_MAPDEV_EARLY_SIZE in locore and pmap_bootstrap

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Use PMAP_MAPDEV_EARLY_SIZE instead of assuming that its value is always
L2_SIZE. Add compile-time assertions to check that the size matches the
expectations in locore.

Reviewed by:	mhorne
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D40110
This commit is contained in:
Alfredo Mazzinghi 2023-05-25 16:33:12 +01:00 committed by Mitchell Horne
parent ffa75b573f
commit ef0a711fd5
4 changed files with 17 additions and 5 deletions
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2
sys/riscv/include/vmparam.h
View File

@ -250,7 +250,7 @@ extern vm_offset_t init_pt_va;
#define ZERO_REGION_SIZE (64 * 1024) /* 64KB */
#define DEVMAP_MAX_VADDR VM_MAX_KERNEL_ADDRESS
#define PMAP_MAPDEV_EARLY_SIZE (L2_SIZE * 2)
#define PMAP_MAPDEV_EARLY_SIZE L2_SIZE
/*
* No non-transparent large page support in the pmap.

1
sys/riscv/riscv/genassym.c
View File

@ -62,6 +62,7 @@ ASSYM(KERNBASE, KERNBASE);
ASSYM(VM_MAXUSER_ADDRESS, VM_MAXUSER_ADDRESS);
ASSYM(VM_MAX_KERNEL_ADDRESS, VM_MAX_KERNEL_ADDRESS);
ASSYM(VM_EARLY_DTB_ADDRESS, VM_EARLY_DTB_ADDRESS);
ASSYM(PMAP_MAPDEV_EARLY_SIZE, PMAP_MAPDEV_EARLY_SIZE);
ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault));
ASSYM(PCB_SIZE, sizeof(struct pcb));

6
sys/riscv/riscv/locore.S
View File

@ -162,7 +162,7 @@ pagetables:
lla s2, pagetable_l2_devmap /* Link to next level PN */
srli s2, s2, PAGE_SHIFT
li a5, (VM_MAX_KERNEL_ADDRESS - L2_SIZE)
li a5, (VM_MAX_KERNEL_ADDRESS - PMAP_MAPDEV_EARLY_SIZE)
srli a5, a5, L1_SHIFT /* >> L1_SHIFT */
andi a5, a5, Ln_ADDR_MASK /* & Ln_ADDR_MASK */
li t4, PTE_V
@ -191,7 +191,9 @@ pagetables:
/* Store the L2 table entry for the DTB */
li a6, PTE_SIZE
li a5, 510
li a5, VM_EARLY_DTB_ADDRESS
srli a5, a5, L2_SHIFT /* >> L2_SHIFT */
andi a5, a5, Ln_ADDR_MASK /* & Ln_ADDR_MASK */
mulw a5, a5, a6
add t1, s1, a5
sd t0, (t1)

13
sys/riscv/riscv/pmap.c
View File

@ -254,6 +254,15 @@ vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
/*
* This code assumes that the early DEVMAP is L2_SIZE aligned and is fully
* contained within a single L2 entry. The early DTB is mapped immediately
* before the devmap L2 entry.
*/
CTASSERT((PMAP_MAPDEV_EARLY_SIZE & L2_OFFSET) == 0);
CTASSERT((VM_EARLY_DTB_ADDRESS & L2_OFFSET) == 0);
CTASSERT(VM_EARLY_DTB_ADDRESS < (VM_MAX_KERNEL_ADDRESS - PMAP_MAPDEV_EARLY_SIZE));
static struct rwlock_padalign pvh_global_lock;
static struct mtx_padalign allpmaps_lock;
@ -684,7 +693,7 @@ pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
/* Create the l3 tables for the early devmap */
freemempos = pmap_bootstrap_l3(l1pt,
VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
VM_MAX_KERNEL_ADDRESS - PMAP_MAPDEV_EARLY_SIZE, freemempos);
/*
* Invalidate the mapping we created for the DTB. At this point a copy
@ -738,7 +747,7 @@ pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
msgbufp = (void *)msgbufpv;
virtual_avail = roundup2(freemempos, L2_SIZE);
virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
virtual_end = VM_MAX_KERNEL_ADDRESS - PMAP_MAPDEV_EARLY_SIZE;
kernel_vm_end = virtual_avail;
pa = pmap_early_vtophys(l1pt, freemempos);