Add basic support for the 398X cards as multi-channel SCSI host adapters.
This involves expanding the support of the SEEPROM routines to deal with the larger SEEPROMs on these cards and providing a mechanism to share SCB arrays between multiple controllers. Most of the 398X support came from Dan Eischer. ahc_data -> ahc_softc Clean up some more type bogons I missed from the last pass.
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gibbs
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@ -29,7 +29,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: aic7870.c,v 1.11.2.18 1996/10/06 16:42:35 gibbs Exp $
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* $Id: aic7870.c,v 1.40 1996/10/25 06:43:10 gibbs Exp $
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*/
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#if defined(__FreeBSD__)
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@ -80,10 +80,12 @@
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#endif /* defined(__NetBSD__) */
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#define PCI_DEVICE_ID_ADAPTEC_398XU 0x83789004ul
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#define PCI_DEVICE_ID_ADAPTEC_3940U 0x82789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2944U 0x84789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940AU 0x61789004ul
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#define PCI_DEVICE_ID_ADAPTEC_398X 0x73789004ul
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#define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2944 0x74789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul
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@ -92,6 +94,7 @@
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#define PCI_DEVICE_ID_ADAPTEC_AIC7860 0x60789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7855 0x55789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7810 0x10789004ul
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#define DEVCONFIG 0x40
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#define MPORTMODE 0x00000400ul /* aic7870 only */
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@ -176,11 +179,13 @@ struct seeprom_config {
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u_int16_t checksum; /* word 31 */
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};
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static void load_seeprom __P((struct ahc_data *ahc));
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static void load_seeprom __P((struct ahc_softc *ahc));
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static int acquire_seeprom __P((struct seeprom_descriptor *sd));
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static void release_seeprom __P((struct seeprom_descriptor *sd));
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static u_char aic3940_count;
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static int aic3940_count;
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static int aic398X_count;
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static struct ahc_softc *first_398X;
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#if defined(__FreeBSD__)
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@ -201,9 +206,15 @@ static char*
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aic7870_probe (pcici_t tag, pcidi_t type)
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{
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switch (type) {
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case PCI_DEVICE_ID_ADAPTEC_398XU:
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return ("Adaptec 398X Ultra SCSI RAID adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_3940U:
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return ("Adaptec 3940 Ultra SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_398X:
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return ("Adaptec 398X SCSI RAID adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_3940:
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return ("Adaptec 3940 SCSI host adapter");
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break;
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@ -237,6 +248,9 @@ aic7870_probe (pcici_t tag, pcidi_t type)
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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return ("Adaptec aic7850 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7810:
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return ("Adaptec aic7810 RAID memory controller");
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break;
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default:
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break;
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}
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@ -250,7 +264,7 @@ int ahc_pci_probe __P((struct device *, void *, void *));
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void ahc_pci_attach __P((struct device *, struct device *, void *));
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struct cfattach ahc_pci_ca = {
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sizeof(struct ahc_data), ahc_pci_probe, ahc_pci_attach
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sizeof(struct ahc_softc), ahc_pci_probe, ahc_pci_attach
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};
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int
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@ -261,10 +275,12 @@ ahc_pci_probe(parent, match, aux)
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struct pci_attach_args *pa = aux;
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switch (pa->pa_id) {
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case PCI_DEVICE_ID_ADAPTEC_398XU:
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case PCI_DEVICE_ID_ADAPTEC_3940U:
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case PCI_DEVICE_ID_ADAPTEC_2944U:
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case PCI_DEVICE_ID_ADAPTEC_2940U:
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case PCI_DEVICE_ID_ADAPTEC_2940AU:
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case PCI_DEVICE_ID_ADAPTEC_398X:
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case PCI_DEVICE_ID_ADAPTEC_3940:
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case PCI_DEVICE_ID_ADAPTEC_2944:
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case PCI_DEVICE_ID_ADAPTEC_2940:
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@ -273,6 +289,7 @@ ahc_pci_probe(parent, match, aux)
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case PCI_DEVICE_ID_ADAPTEC_AIC7860:
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case PCI_DEVICE_ID_ADAPTEC_AIC7855:
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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case PCI_DEVICE_ID_ADAPTEC_AIC7810:
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return 1;
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}
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return 0;
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@ -293,10 +310,10 @@ ahc_pci_attach(parent, self, aux)
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{
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#if defined(__FreeBSD__)
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u_int16_t io_port;
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struct ahc_data *ahc;
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struct ahc_softc *ahc;
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#elif defined(__NetBSD__)
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struct pci_attach_args *pa = aux;
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struct ahc_data *ahc = (void *)self;
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struct ahc_softc *ahc = (void *)self;
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int unit = ahc->sc_dev.dv_unit;
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bus_io_addr_t iobase;
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bus_io_size_t iosize;
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@ -305,6 +322,7 @@ ahc_pci_attach(parent, self, aux)
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const char *intrstr;
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#endif
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u_int32_t id;
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struct scb_data *shared_scb_data;
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int opri = 0;
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ahc_type ahc_t = AHC_NONE;
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ahc_flag ahc_f = AHC_FNONE;
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@ -313,12 +331,17 @@ ahc_pci_attach(parent, self, aux)
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u_int8_t ultra_enb = 0;
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u_int8_t our_id = 0;
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shared_scb_data = NULL;
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#if defined(__FreeBSD__)
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if (pci_map_port(config_id, PCI_BASEADR0, &io_port) == 0)
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return;
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#ifdef AHC_FORCE_PIO
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vaddr = NULL;
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paddr = NULL;
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#else
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if (pci_map_mem(config_id, PCI_BASEADR1, &vaddr, &paddr) == 0)
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return;
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#endif
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#elif defined(__NetBSD__)
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if (pci_io_find(pa->pa_pc, pa->pa_tag, PCI_BASEADR0, &iobase, &iosize))
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return;
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@ -331,16 +354,40 @@ ahc_pci_attach(parent, self, aux)
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#elif defined(__NetBSD__)
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switch (id = pa->pa_id) {
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#endif
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case PCI_DEVICE_ID_ADAPTEC_398XU:
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case PCI_DEVICE_ID_ADAPTEC_398X:
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if (id == PCI_DEVICE_ID_ADAPTEC_398XU)
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ahc_t = AHC_398U;
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else
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ahc_t = AHC_398;
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switch (aic398X_count) {
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case 0:
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break;
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case 1:
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ahc_f |= AHC_CHNLB;
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break;
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case 2:
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ahc_f |= AHC_CHNLC;
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break;
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default:
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break;
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}
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aic398X_count++;
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if (first_398X != NULL)
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#ifdef AHC_SHARE_SCBS
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shared_scb_data = first_398X->scb_data;
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#endif
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break;
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case PCI_DEVICE_ID_ADAPTEC_3940U:
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case PCI_DEVICE_ID_ADAPTEC_3940:
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if (id == PCI_DEVICE_ID_ADAPTEC_3940U)
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ahc_t = AHC_394U;
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else
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ahc_t = AHC_394;
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aic3940_count++;
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if ((aic3940_count & 0x01) == 0)
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/* Even count implies second channel */
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if ((aic3940_count & 0x01) != 0)
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/* Odd count implies second channel */
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ahc_f |= AHC_CHNLB;
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aic3940_count++;
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break;
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case PCI_DEVICE_ID_ADAPTEC_2944U:
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case PCI_DEVICE_ID_ADAPTEC_2940U:
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@ -366,6 +413,15 @@ ahc_pci_attach(parent, self, aux)
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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ahc_t = AHC_AIC7850;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7810:
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/*
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* This is the first device probed on a RAID
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* controller, so reset our counts.
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*/
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aic398X_count = 0;
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first_398X = NULL;
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printf("RAID functionality unsupported\n");
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return;
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default:
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break;
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}
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@ -399,11 +455,19 @@ ahc_pci_attach(parent, self, aux)
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pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
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#endif
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#ifdef AHC_SHARE_SCBS
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if (devconfig & (RAMPSM)) {
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/*
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* XXX What about EXTSCBTIME and EXTSCBPEN???
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* They are probably card dependant.
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/* XXX Assume 9bit SRAM and enable parity checking */
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devconfig |= EXTSCBPEN;
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/* XXX Assume fast SRAM and only enable 2 cycle
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* access if we are sharing the SRAM across mutiple
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* adapters (398X adapter).
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*/
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if ((devconfig & MPORTMODE) == 0)
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/* Multi-user mode */
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devconfig |= EXTSCBTIME;
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devconfig &= ~SCBRAMSEL;
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#if defined(__FreeBSD__)
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pci_conf_write(config_id, DEVCONFIG, devconfig);
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@ -412,10 +476,12 @@ ahc_pci_attach(parent, self, aux)
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DEVCONFIG, devconfig);
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#endif
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}
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#endif
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}
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#if defined(__FreeBSD__)
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if ((ahc = ahc_alloc(unit, io_port, vaddr, ahc_t, ahc_f)) == NULL)
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if ((ahc = ahc_alloc(unit, io_port, vaddr, ahc_t, ahc_f,
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shared_scb_data)) == NULL)
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return; /* XXX PCI code should take return status */
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if (!(pci_map_int(config_id, ahc_intr, (void *)ahc, &bio_imask))) {
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@ -465,12 +531,14 @@ ahc_pci_attach(parent, self, aux)
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char *id_string;
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switch(ahc->type) {
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case AHC_398U:
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case AHC_394U:
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case AHC_294U:
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case AHC_AIC7880:
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id_string = "aic7880 ";
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load_seeprom(ahc);
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break;
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case AHC_398:
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case AHC_394:
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case AHC_294:
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case AHC_AIC7870:
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@ -560,6 +628,12 @@ ahc_pci_attach(parent, self, aux)
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splx(opri);
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return; /* XXX PCI code should take return status */
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}
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if ((ahc->type & AHC_398) == AHC_398) {
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/* Only set this once we've successfully probed */
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if (shared_scb_data == NULL)
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first_398X = ahc;
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}
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splx(opri);
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ahc_attach(ahc);
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@ -570,23 +644,32 @@ ahc_pci_attach(parent, self, aux)
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*/
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void
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load_seeprom(ahc)
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struct ahc_data *ahc;
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struct ahc_softc *ahc;
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{
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struct seeprom_descriptor sd;
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struct seeprom_config sc;
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u_short *scarray = (u_short *)≻
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u_short checksum = 0;
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u_char scsi_conf;
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u_char host_id;
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int have_seeprom;
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struct seeprom_descriptor sd;
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struct seeprom_config sc;
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u_int16_t *scarray = (u_int16_t *)≻
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u_int16_t checksum = 0;
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u_int8_t scsi_conf;
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u_int8_t host_id;
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int have_seeprom;
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#if defined(__FreeBSD__)
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#ifdef AHC_FORCE_PIO
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sd.sd_maddr = NULL;
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#else
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sd.sd_maddr = ahc->maddr + SEECTL;
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#endif
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sd.sd_iobase = ahc->baseport + SEECTL;
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#elif defined(__NetBSD__)
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sd.sd_bc = ahc->sc_bc;
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sd.sd_ioh = ahc->sc_ioh;
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sd.sd_offset = SEECTL;
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#endif
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if ((ahc->type & AHC_398) == AHC_398)
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sd.sd_chip = C56_66;
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else
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sd.sd_chip = C46;
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sd.sd_MS = SEEMS;
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sd.sd_RDY = SEERDY;
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sd.sd_CS = SEECS;
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@ -600,7 +683,7 @@ load_seeprom(ahc)
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if (have_seeprom) {
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have_seeprom = read_seeprom(&sd,
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(u_int16_t *)&sc,
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ahc->flags & AHC_CHNLB,
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ahc->flags & (AHC_CHNLB|AHC_CHNLC),
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sizeof(sc)/2);
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release_seeprom(&sd);
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if (have_seeprom) {
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