- Implement the RX EARLYOFF and RXDV GATED bits as done by RealTek's Linux
driver as version 8.037.00 for RTL8168{E-VL,EP,F,G,GU} and RTL8111B. This makes reception of packets work with the RTL8168G (HW rev. 0x4c000000) in my Shuttle DS47. - Consistently use RL_MSI_MESSAGES. In joint forces with: yongari MFC after: 5 days
This commit is contained in:
parent
b1526b43e8
commit
f1a5f291dd
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=261531
@ -656,6 +656,10 @@ re_set_rxmode(struct rl_softc *sc)
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ifp = sc->rl_ifp;
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rxfilt = RL_RXCFG_CONFIG | RL_RXCFG_RX_INDIV | RL_RXCFG_RX_BROAD;
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if ((sc->rl_flags & RL_FLAG_EARLYOFF) != 0)
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rxfilt |= RL_RXCFG_EARLYOFF;
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else if ((sc->rl_flags & RL_FLAG_EARLYOFFV2) != 0)
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rxfilt |= RL_RXCFG_EARLYOFFV2;
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if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
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if (ifp->if_flags & IFF_PROMISC)
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@ -1265,7 +1269,7 @@ re_attach(device_t dev)
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msic = 0;
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/* Prefer MSI-X to MSI. */
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if (msixc > 0) {
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msixc = 1;
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msixc = RL_MSI_MESSAGES;
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rid = PCIR_BAR(4);
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sc->rl_res_pba = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&rid, RF_ACTIVE);
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@ -1275,7 +1279,7 @@ re_attach(device_t dev)
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}
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if (sc->rl_res_pba != NULL &&
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pci_alloc_msix(dev, &msixc) == 0) {
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if (msixc == 1) {
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if (msixc == RL_MSI_MESSAGES) {
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device_printf(dev, "Using %d MSI-X message\n",
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msixc);
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sc->rl_flags |= RL_FLAG_MSIX;
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@ -1292,7 +1296,7 @@ re_attach(device_t dev)
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}
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/* Prefer MSI to INTx. */
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if (msixc == 0 && msic > 0) {
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msic = 1;
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msic = RL_MSI_MESSAGES;
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if (pci_alloc_msi(dev, &msic) == 0) {
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if (msic == RL_MSI_MESSAGES) {
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device_printf(dev, "Using %d MSI message\n",
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@ -1463,16 +1467,24 @@ re_attach(device_t dev)
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RL_FLAG_WOL_MANLINK;
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break;
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case RL_HWREV_8168E_VL:
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case RL_HWREV_8168EP:
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case RL_HWREV_8168F:
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case RL_HWREV_8168G:
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sc->rl_flags |= RL_FLAG_EARLYOFF;
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/* FALLTHROUGH */
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case RL_HWREV_8411:
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case RL_HWREV_8411B:
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sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
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RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
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RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 |
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RL_FLAG_CMDSTOP_WAIT_TXQ | RL_FLAG_WOL_MANLINK;
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break;
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case RL_HWREV_8168EP:
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case RL_HWREV_8168G:
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case RL_HWREV_8411B:
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sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
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RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
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RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 |
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RL_FLAG_CMDSTOP_WAIT_TXQ | RL_FLAG_WOL_MANLINK |
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RL_FLAG_EARLYOFFV2 | RL_FLAG_RXDV_GATED;
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break;
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case RL_HWREV_8168GU:
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if (pci_get_device(dev) == RT_DEVICEID_8101E) {
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/* RTL8106EUS */
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@ -1482,7 +1494,8 @@ re_attach(device_t dev)
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sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
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RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
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RL_FLAG_AUTOPAD | RL_FLAG_CMDSTOP_WAIT_TXQ;
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RL_FLAG_AUTOPAD | RL_FLAG_CMDSTOP_WAIT_TXQ |
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RL_FLAG_EARLYOFFV2 | RL_FLAG_RXDV_GATED;
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break;
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case RL_HWREV_8169_8110SB:
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case RL_HWREV_8169_8110SBL:
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@ -3170,6 +3183,10 @@ re_init_locked(struct rl_softc *sc)
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CSR_WRITE_4(sc, RL_TXLIST_ADDR_LO,
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RL_ADDR_LO(sc->rl_ldata.rl_tx_list_addr));
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if ((sc->rl_flags & RL_FLAG_RXDV_GATED) != 0)
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CSR_WRITE_4(sc, RL_MISC, CSR_READ_4(sc, RL_MISC) &
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~0x00080000);
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/*
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* Enable transmit and receive.
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*/
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@ -145,6 +145,7 @@
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#define RL_PMCH 0x006F /* 8 bits */
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#define RL_MAXRXPKTLEN 0x00DA /* 16 bits, chip multiplies by 8 */
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#define RL_INTRMOD 0x00E2 /* 16 bits */
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#define RL_MISC 0x00F0
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/*
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* TX config register bits
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@ -286,8 +287,10 @@
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#define RL_RXCFG_RX_RUNT 0x00000010
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#define RL_RXCFG_RX_ERRPKT 0x00000020
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#define RL_RXCFG_WRAP 0x00000080
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#define RL_RXCFG_EARLYOFFV2 0x00000800
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#define RL_RXCFG_MAXDMA 0x00000700
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#define RL_RXCFG_BUFSZ 0x00001800
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#define RL_RXCFG_EARLYOFF 0x00003800
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#define RL_RXCFG_FIFOTHRESH 0x0000E000
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#define RL_RXCFG_EARLYTHRESH 0x07000000
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@ -926,6 +929,9 @@ struct rl_softc {
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#define RL_FLAG_WAIT_TXPOLL 0x00004000
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#define RL_FLAG_CMDSTOP_WAIT_TXQ 0x00008000
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#define RL_FLAG_WOL_MANLINK 0x00010000
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#define RL_FLAG_EARLYOFF 0x00020000
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#define RL_FLAG_EARLYOFFV2 0x00040000
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#define RL_FLAG_RXDV_GATED 0x00080000
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#define RL_FLAG_PCIE 0x40000000
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#define RL_FLAG_LINK 0x80000000
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};
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