Improve tpm20 style
No functional changes to the code are applied. Submitted by: Kornel Duleba <mindal@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield
This commit is contained in:
parent
d68a65eabf
commit
f39ec261ad
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=346261
@ -142,7 +142,8 @@ tpm20_write(struct cdev *dev, struct uio *uio, int flags)
|
||||
return (result);
|
||||
}
|
||||
|
||||
static void tpm20_discard_buffer(void *arg)
|
||||
static void
|
||||
tpm20_discard_buffer(void *arg)
|
||||
{
|
||||
struct tpm_sc *sc;
|
||||
|
||||
@ -304,9 +305,10 @@ tpm20_save_state(device_t dev, bool suspend)
|
||||
{
|
||||
struct tpm_sc *sc;
|
||||
uint8_t save_cmd[] = {
|
||||
0x80, 0x01, /* TPM_ST_NO_SESSIONS tag*/
|
||||
0x80, 0x01, /* TPM_ST_NO_SESSIONS tag*/
|
||||
0x00, 0x00, 0x00, 0x0C, /* cmd length */
|
||||
0x00, 0x00, 0x01, 0x45, 0x00, 0x00 /* cmd TPM_CC_Shutdown */
|
||||
0x00, 0x00, 0x01, 0x45, /* cmd TPM_CC_Shutdown */
|
||||
0x00, 0x00 /* TPM_SU_STATE */
|
||||
};
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
@ -315,7 +317,7 @@ tpm20_save_state(device_t dev, bool suspend)
|
||||
* Inform the TPM whether we are going to suspend or reboot/shutdown.
|
||||
*/
|
||||
if (suspend)
|
||||
save_cmd[11] = 1; /* TPM_SU_STATE */
|
||||
save_cmd[11] = 1; /* TPM_SU_STATE */
|
||||
|
||||
if (sc == NULL || sc->buf == NULL)
|
||||
return (0);
|
||||
|
@ -26,7 +26,7 @@
|
||||
*/
|
||||
|
||||
#ifndef _TPM20_H_
|
||||
#define _TPM20_H_
|
||||
#define _TPM20_H_
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
@ -60,46 +60,46 @@ __FBSDID("$FreeBSD$");
|
||||
#define BIT(x) (1 << (x))
|
||||
|
||||
/* Timeouts in us */
|
||||
#define TPM_TIMEOUT_A 750000
|
||||
#define TPM_TIMEOUT_B 2000000
|
||||
#define TPM_TIMEOUT_C 200000
|
||||
#define TPM_TIMEOUT_D 30000
|
||||
#define TPM_TIMEOUT_A 750000
|
||||
#define TPM_TIMEOUT_B 2000000
|
||||
#define TPM_TIMEOUT_C 200000
|
||||
#define TPM_TIMEOUT_D 30000
|
||||
|
||||
/*
|
||||
* Generating RSA key pair takes ~(10-20s), which is significantly longer than
|
||||
* any timeout defined in spec. Because of that we need a new one.
|
||||
*/
|
||||
#define TPM_TIMEOUT_LONG 40000000
|
||||
#define TPM_TIMEOUT_LONG 40000000
|
||||
|
||||
/* List of commands that require TPM_TIMEOUT_LONG time to complete */
|
||||
#define TPM_CC_CreatePrimary 0x00000131
|
||||
#define TPM_CC_CreatePrimary 0x00000131
|
||||
#define TPM_CC_Create 0x00000153
|
||||
#define TPM_CC_CreateLoaded 0x00000191
|
||||
|
||||
/* List of commands that require only TPM_TIMEOUT_C time to complete */
|
||||
#define TPM_CC_SequenceComplete 0x0000013e
|
||||
#define TPM_CC_Startup 0x00000144
|
||||
#define TPM_CC_SequenceUpdate 0x0000015c
|
||||
#define TPM_CC_GetCapability 0x0000017a
|
||||
#define TPM_CC_PCR_Extend 0x00000182
|
||||
#define TPM_CC_EventSequenceComplete 0x00000185
|
||||
#define TPM_CC_HashSequenceStart 0x00000186
|
||||
#define TPM_CC_SequenceComplete 0x0000013e
|
||||
#define TPM_CC_Startup 0x00000144
|
||||
#define TPM_CC_SequenceUpdate 0x0000015c
|
||||
#define TPM_CC_GetCapability 0x0000017a
|
||||
#define TPM_CC_PCR_Extend 0x00000182
|
||||
#define TPM_CC_EventSequenceComplete 0x00000185
|
||||
#define TPM_CC_HashSequenceStart 0x00000186
|
||||
|
||||
/* Timeout before data in read buffer is discarded */
|
||||
#define TPM_READ_TIMEOUT 500000
|
||||
#define TPM_READ_TIMEOUT 500000
|
||||
|
||||
#define TPM_BUFSIZE 0x1000
|
||||
#define TPM_BUFSIZE 0x1000
|
||||
|
||||
#define TPM_HEADER_SIZE 10
|
||||
#define TPM_HEADER_SIZE 10
|
||||
|
||||
#define TPM_CDEV_NAME "tpm0"
|
||||
#define TPM_CDEV_PERM_FLAG 0600
|
||||
#define TPM_CDEV_NAME "tpm0"
|
||||
#define TPM_CDEV_PERM_FLAG 0600
|
||||
|
||||
|
||||
#define TPM2_START_METHOD_ACPI 2
|
||||
#define TPM2_START_METHOD_TIS 6
|
||||
#define TPM2_START_METHOD_CRB 7
|
||||
#define TPM2_START_METHOD_CRB_ACPI 8
|
||||
#define TPM2_START_METHOD_ACPI 2
|
||||
#define TPM2_START_METHOD_TIS 6
|
||||
#define TPM2_START_METHOD_CRB 7
|
||||
#define TPM2_START_METHOD_CRB_ACPI 8
|
||||
|
||||
struct tpm_sc {
|
||||
device_t dev;
|
||||
|
@ -34,47 +34,47 @@ __FBSDID("$FreeBSD$");
|
||||
* CRB register space as defined in
|
||||
* TCG_PC_Client_Platform_TPM_Profile_PTP_2.0_r1.03_v22
|
||||
*/
|
||||
#define TPM_LOC_STATE 0x0
|
||||
#define TPM_LOC_CTRL 0x8
|
||||
#define TPM_LOC_STS 0xC
|
||||
#define TPM_CRB_INTF_ID 0x30
|
||||
#define TPM_CRB_CTRL_EXT 0x38
|
||||
#define TPM_CRB_CTRL_REQ 0x40
|
||||
#define TPM_CRB_CTRL_STS 0x44
|
||||
#define TPM_CRB_CTRL_CANCEL 0x48
|
||||
#define TPM_CRB_CTRL_START 0x4C
|
||||
#define TPM_CRB_INT_ENABLE 0x50
|
||||
#define TPM_CRB_INT_STS 0x54
|
||||
#define TPM_CRB_CTRL_CMD_SIZE 0x58
|
||||
#define TPM_CRB_CTRL_CMD_LADDR 0x5C
|
||||
#define TPM_CRB_CTRL_CMD_HADDR 0x60
|
||||
#define TPM_CRB_CTRL_RSP_SIZE 0x64
|
||||
#define TPM_CRB_CTRL_RSP_ADDR 0x68
|
||||
#define TPM_CRB_CTRL_RSP_HADDR 0x6c
|
||||
#define TPM_CRB_DATA_BUFFER 0x80
|
||||
#define TPM_LOC_STATE 0x0
|
||||
#define TPM_LOC_CTRL 0x8
|
||||
#define TPM_LOC_STS 0xC
|
||||
#define TPM_CRB_INTF_ID 0x30
|
||||
#define TPM_CRB_CTRL_EXT 0x38
|
||||
#define TPM_CRB_CTRL_REQ 0x40
|
||||
#define TPM_CRB_CTRL_STS 0x44
|
||||
#define TPM_CRB_CTRL_CANCEL 0x48
|
||||
#define TPM_CRB_CTRL_START 0x4C
|
||||
#define TPM_CRB_INT_ENABLE 0x50
|
||||
#define TPM_CRB_INT_STS 0x54
|
||||
#define TPM_CRB_CTRL_CMD_SIZE 0x58
|
||||
#define TPM_CRB_CTRL_CMD_LADDR 0x5C
|
||||
#define TPM_CRB_CTRL_CMD_HADDR 0x60
|
||||
#define TPM_CRB_CTRL_RSP_SIZE 0x64
|
||||
#define TPM_CRB_CTRL_RSP_ADDR 0x68
|
||||
#define TPM_CRB_CTRL_RSP_HADDR 0x6c
|
||||
#define TPM_CRB_DATA_BUFFER 0x80
|
||||
|
||||
#define TPM_LOC_STATE_ESTB BIT(0)
|
||||
#define TPM_LOC_STATE_ASSIGNED BIT(1)
|
||||
#define TPM_LOC_STATE_ACTIVE_MASK 0x9C
|
||||
#define TPM_LOC_STATE_VALID BIT(7)
|
||||
#define TPM_LOC_STATE_ESTB BIT(0)
|
||||
#define TPM_LOC_STATE_ASSIGNED BIT(1)
|
||||
#define TPM_LOC_STATE_ACTIVE_MASK 0x9C
|
||||
#define TPM_LOC_STATE_VALID BIT(7)
|
||||
|
||||
#define TPM_CRB_INTF_ID_TYPE_CRB 0x1
|
||||
#define TPM_CRB_INTF_ID_TYPE 0x7
|
||||
#define TPM_CRB_INTF_ID_TYPE_CRB 0x1
|
||||
#define TPM_CRB_INTF_ID_TYPE 0x7
|
||||
|
||||
#define TPM_LOC_CTRL_REQUEST BIT(0)
|
||||
#define TPM_LOC_CTRL_RELINQUISH BIT(1)
|
||||
#define TPM_LOC_CTRL_REQUEST BIT(0)
|
||||
#define TPM_LOC_CTRL_RELINQUISH BIT(1)
|
||||
|
||||
#define TPM_CRB_CTRL_REQ_GO_READY BIT(0)
|
||||
#define TPM_CRB_CTRL_REQ_GO_IDLE BIT(1)
|
||||
#define TPM_CRB_CTRL_REQ_GO_READY BIT(0)
|
||||
#define TPM_CRB_CTRL_REQ_GO_IDLE BIT(1)
|
||||
|
||||
#define TPM_CRB_CTRL_STS_ERR_BIT BIT(0)
|
||||
#define TPM_CRB_CTRL_STS_IDLE_BIT BIT(1)
|
||||
#define TPM_CRB_CTRL_STS_ERR_BIT BIT(0)
|
||||
#define TPM_CRB_CTRL_STS_IDLE_BIT BIT(1)
|
||||
|
||||
#define TPM_CRB_CTRL_CANCEL_CMD BIT(0)
|
||||
#define TPM_CRB_CTRL_CANCEL_CMD BIT(0)
|
||||
|
||||
#define TPM_CRB_CTRL_START_CMD BIT(0)
|
||||
#define TPM_CRB_CTRL_START_CMD BIT(0)
|
||||
|
||||
#define TPM_CRB_INT_ENABLE_BIT BIT(31)
|
||||
#define TPM_CRB_INT_ENABLE_BIT BIT(31)
|
||||
|
||||
struct tpmcrb_sc {
|
||||
struct tpm_sc base;
|
||||
|
@ -34,45 +34,45 @@ __FBSDID("$FreeBSD$");
|
||||
* TIS register space as defined in
|
||||
* TCG_PC_Client_Platform_TPM_Profile_PTP_2.0_r1.03_v22
|
||||
*/
|
||||
#define TPM_ACCESS 0x0
|
||||
#define TPM_INT_ENABLE 0x8
|
||||
#define TPM_INT_VECTOR 0xc
|
||||
#define TPM_INT_STS 0x10
|
||||
#define TPM_INTF_CAPS 0x14
|
||||
#define TPM_STS 0x18
|
||||
#define TPM_DATA_FIFO 0x24
|
||||
#define TPM_INTF_ID 0x30
|
||||
#define TPM_XDATA_FIFO 0x80
|
||||
#define TPM_DID_VID 0xF00
|
||||
#define TPM_RID 0xF04
|
||||
#define TPM_ACCESS 0x0
|
||||
#define TPM_INT_ENABLE 0x8
|
||||
#define TPM_INT_VECTOR 0xc
|
||||
#define TPM_INT_STS 0x10
|
||||
#define TPM_INTF_CAPS 0x14
|
||||
#define TPM_STS 0x18
|
||||
#define TPM_DATA_FIFO 0x24
|
||||
#define TPM_INTF_ID 0x30
|
||||
#define TPM_XDATA_FIFO 0x80
|
||||
#define TPM_DID_VID 0xF00
|
||||
#define TPM_RID 0xF04
|
||||
|
||||
#define TPM_ACCESS_LOC_REQ BIT(1)
|
||||
#define TPM_ACCESS_LOC_Seize BIT(3)
|
||||
#define TPM_ACCESS_LOC_ACTIVE BIT(5)
|
||||
#define TPM_ACCESS_LOC_RELINQUISH BIT(5)
|
||||
#define TPM_ACCESS_VALID BIT(7)
|
||||
#define TPM_ACCESS_LOC_REQ BIT(1)
|
||||
#define TPM_ACCESS_LOC_Seize BIT(3)
|
||||
#define TPM_ACCESS_LOC_ACTIVE BIT(5)
|
||||
#define TPM_ACCESS_LOC_RELINQUISH BIT(5)
|
||||
#define TPM_ACCESS_VALID BIT(7)
|
||||
|
||||
#define TPM_INT_ENABLE_GLOBAL_ENABLE BIT(31)
|
||||
#define TPM_INT_ENABLE_CMD_RDY BIT(7)
|
||||
#define TPM_INT_ENABLE_LOC_CHANGE BIT(2)
|
||||
#define TPM_INT_ENABLE_STS_VALID BIT(1)
|
||||
#define TPM_INT_ENABLE_DATA_AVAIL BIT(0)
|
||||
#define TPM_INT_ENABLE_GLOBAL_ENABLE BIT(31)
|
||||
#define TPM_INT_ENABLE_CMD_RDY BIT(7)
|
||||
#define TPM_INT_ENABLE_LOC_CHANGE BIT(2)
|
||||
#define TPM_INT_ENABLE_STS_VALID BIT(1)
|
||||
#define TPM_INT_ENABLE_DATA_AVAIL BIT(0)
|
||||
|
||||
#define TPM_INT_STS_CMD_RDY BIT(7)
|
||||
#define TPM_INT_STS_LOC_CHANGE BIT(2)
|
||||
#define TPM_INT_STS_VALID BIT(1)
|
||||
#define TPM_INT_STS_DATA_AVAIL BIT(0)
|
||||
#define TPM_INT_STS_CMD_RDY BIT(7)
|
||||
#define TPM_INT_STS_LOC_CHANGE BIT(2)
|
||||
#define TPM_INT_STS_VALID BIT(1)
|
||||
#define TPM_INT_STS_DATA_AVAIL BIT(0)
|
||||
|
||||
#define TPM_INTF_CAPS_VERSION 0x70000000
|
||||
#define TPM_INTF_CAPS_TPM20 0x30000000
|
||||
#define TPM_INTF_CAPS_VERSION 0x70000000
|
||||
#define TPM_INTF_CAPS_TPM20 0x30000000
|
||||
|
||||
#define TPM_STS_VALID BIT(7)
|
||||
#define TPM_STS_CMD_RDY BIT(6)
|
||||
#define TPM_STS_CMD_START BIT(5)
|
||||
#define TPM_STS_DATA_AVAIL BIT(4)
|
||||
#define TPM_STS_DATA_EXPECTED BIT(3)
|
||||
#define TPM_STS_BURST_MASK 0xFFFF00
|
||||
#define TPM_STS_BURST_OFFSET 0x8
|
||||
#define TPM_STS_VALID BIT(7)
|
||||
#define TPM_STS_CMD_RDY BIT(6)
|
||||
#define TPM_STS_CMD_START BIT(5)
|
||||
#define TPM_STS_DATA_AVAIL BIT(4)
|
||||
#define TPM_STS_DATA_EXPECTED BIT(3)
|
||||
#define TPM_STS_BURST_MASK 0xFFFF00
|
||||
#define TPM_STS_BURST_OFFSET 0x8
|
||||
|
||||
static int tpmtis_transmit(struct tpm_sc *sc, size_t length);
|
||||
|
||||
@ -93,6 +93,7 @@ static bool tpmtis_go_ready(struct tpm_sc *sc);
|
||||
|
||||
static bool tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off,
|
||||
uint32_t mask, uint32_t val, int32_t timeout);
|
||||
|
||||
static uint16_t tpmtis_wait_for_burst(struct tpm_sc *sc);
|
||||
|
||||
char *tpmtis_ids[] = {"MSFT0101", NULL};
|
||||
|
Loading…
Reference in New Issue
Block a user