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Use the NetBSD init code for the TOPIC parts as a more complete basis

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for initializing the parts.  Since I don't have any of these parts in
any of my working laptops, I'm committing this to allow people to test
it.  Will MFC when I receive reports of it working.
This commit is contained in:
Warner Losh 2001-10-11 05:37:32 +00:00
parent cbc89bfbfe
commit f3bfc73757
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=84784
2 changed files with 76 additions and 12 deletions
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41
sys/pccard/pcic_pci.c
View File

@ -772,6 +772,16 @@ pcic_pci_ti_init(device_t dev)
static int
pcic_pci_topic_func(struct pcic_slot *sp, enum pcic_intr_way way)
{
device_t dev = sp->sc->dev;
u_int32_t scr;
scr = pci_read_config(dev, TOPIC_SOCKET_CTRL, 4);
if (way == pcic_iw_pci)
scr |= TOPIC_SOCKET_CTRL_SCR_IRQSEL;
else
scr &= ~TOPIC_SOCKET_CTRL_SCR_IRQSEL;
pci_write_config(dev, TOPIC_SLOT_CTRL, scr, 4);
return (pcic_pci_gen_func(sp, way));
}
@ -779,14 +789,19 @@ static int
pcic_pci_topic_csc(struct pcic_slot *sp, enum pcic_intr_way way)
{
device_t dev = sp->sc->dev;
u_int32_t icr;
u_int32_t scr;
u_int32_t device_id;
icr = pci_read_config(dev, TOPIC_INTERRUPT_CONTROL, 1);
if (way == pcic_iw_pci)
icr |= TOPIC_ICR_INTA;
else
icr &= ~TOPIC_ICR_INTA;
pci_write_config(dev, TOPIC_INTERRUPT_CONTROL, icr, 1);
device_id = pci_get_devid(dev);
if (device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC100 ||
device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC97) {
scr = pci_read_config(dev, TOPIC_SLOT_CTRL, 4);
if (way == pcic_iw_pci)
scr |= TOPIC97_SLOT_CTRL_PCIINT;
else
scr &= ~TOPIC97_SLOT_CTRL_PCIINT;
pci_write_config(dev, TOPIC_SLOT_CTRL, scr, 4);
}
return (0);
}
@ -795,7 +810,8 @@ static void
pcic_pci_topic_init(device_t dev)
{
struct pcic_softc *sc = device_get_softc(dev);
u_int32_t device_id;
u_int32_t reg;
u_int32_t device_id;
device_id = pci_get_devid(dev);
if (device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC100 ||
@ -810,6 +826,14 @@ pcic_pci_topic_init(device_t dev)
pcic_setb(&sc->slots[0], PCIC_TOPIC_FCR,
PCIC_FCR_3V_EN | PCIC_FCR_VS_EN);
}
reg = pci_read_config(dev, TOPIC_SLOT_CTRL, 4);
reg |= (TOPIC_SLOT_CTRL_SLOTON | TOPIC_SLOT_CTRL_SLOTEN |
TOPIC_SLOT_CTRL_ID_LOCK | TOPIC_SLOT_CTRL_CARDBUS);
reg &= ~TOPIC_SLOT_CTRL_SWDETECT;
if (device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC100 ||
device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC97)
reg &= ~(TOPIC97_SLOT_CTRL_STSIRQP | TOPIC97_SLOT_CTRL_IRQP);
pci_write_config(dev, TOPIC_SLOT_CTRL, reg, 4);
pcic_pci_cardbus_init(dev);
}
@ -1070,6 +1094,7 @@ pcic_pci_shutdown(device_t dev)
sp->putb(sp, PCIC_INT_GEN, 0);
sp->putb(sp, PCIC_STAT_INT, 0);
sp->putb(sp, PCIC_POWER, 0);
DELAY(4000);
/*
* Writing to INT_GEN can cause an interrupt, so we blindly

47
sys/pccard/pcic_pci.h
View File

@ -99,12 +99,51 @@
#define R5C47X_MCR2_CSC_TO_INTX_DISABLE 0x0010 /* Bit 7 */
/*
* ToPIC specific stuff.
* Special resister definition for Toshiba ToPIC95/97
* These values are borrowed from pcmcia-cs/Linux.
*/
#define TOPIC_INTERRUPT_CONTROL 0xa1
#define TOPIC_ICR_INTA 0x1
#define TOPIC_SOCKET_CTRL 0x90
# define TOPIC_SOCKET_CTRL_SCR_IRQSEL 0x00000001 /* PCI intr */
/* sanpei */
#define TOPIC_SLOT_CTRL 0xa0
# define TOPIC_SLOT_CTRL_SLOTON 0x00000080
# define TOPIC_SLOT_CTRL_SLOTEN 0x00000040
# define TOPIC_SLOT_CTRL_ID_LOCK 0x00000020
# define TOPIC_SLOT_CTRL_ID_WP 0x00000010
# define TOPIC_SLOT_CTRL_PORT_MASK 0x0000000c
# define TOPIC_SLOT_CTRL_PORT_SHIFT 2
# define TOPIC_SLOT_CTRL_OSF_MASK 0x00000003
# define TOPIC_SLOT_CTRL_OSF_SHIFT 0
# define TOPIC_SLOT_CTRL_INTB 0x00002000
# define TOPIC_SLOT_CTRL_INTA 0x00001000
# define TOPIC_SLOT_CTRL_INT_MASK 0x00003000
# define TOPIC_SLOT_CTRL_CLOCK_MASK 0x00000c00
# define TOPIC_SLOT_CTRL_CLOCK_2 0x00000800 /* PCI Clock/2 */
# define TOPIC_SLOT_CTRL_CLOCK_1 0x00000400 /* PCI Clock */
# define TOPIC_SLOT_CTRL_CLOCK_0 0x00000000 /* no clock */
# define TOPIC97_SLOT_CTRL_STSIRQP 0x00000400 /* status change intr pulse */
# define TOPIC97_SLOT_CTRL_IRQP 0x00000200 /* function intr pulse */
# define TOPIC97_SLOT_CTRL_PCIINT 0x00000100 /* intr routing to PCI INT */
# define TOPIC_SLOT_CTRL_CARDBUS 0x80000000
# define TOPIC_SLOT_CTRL_VS1 0x04000000
# define TOPIC_SLOT_CTRL_VS2 0x02000000
# define TOPIC_SLOT_CTRL_SWDETECT 0x01000000
#define TOPIC_REG_CTRL 0x00a4
# define TOPIC_REG_CTRL_RESUME_RESET 0x80000000
# define TOPIC_REG_CTRL_REMOVE_RESET 0x40000000
# define TOPIC97_REG_CTRL_CLKRUN_ENA 0x20000000
# define TOPIC97_REG_CTRL_TESTMODE 0x10000000
# define TOPIC97_REG_CTRL_IOPLUP 0x08000000
# define TOPIC_REG_CTRL_BUFOFF_PWROFF 0x02000000
# define TOPIC_REG_CTRL_BUFOFF_SIGOFF 0x01000000
# define TOPIC97_REG_CTRL_CB_DEV_MASK 0x0000f800
# define TOPIC97_REG_CTRL_CB_DEV_SHIFT 11
# define TOPIC97_REG_CTRL_RI_DISABLE 0x00000004
# define TOPIC97_REG_CTRL_CAUDIO_OFF 0x00000002
# define TOPIC_REG_CTRL_CAUDIO_INVERT 0x00000001
/* For Bridge Control register (CB_PCI_BRIDGE_CTRL) */
#define CB_BCR_MASTER_ABORT 0x0020