bhyve: Rename a pci_cfgrw() parameter
pci_cfgrw() may be called via a write to the extended config space, which is memory-mapped. In this case, the name "eax" is misleading. Give it a more generic name. No functional change intended. Reviewed by: corvink, jhb MFC after: 1 week Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D40732
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@ -2175,7 +2175,7 @@ pci_emul_cmdsts_write(struct pci_devinst *pi, int coff, uint32_t new, int bytes)
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static void
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pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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uint32_t *eax)
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uint32_t *valp)
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{
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struct businfo *bi;
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struct slotinfo *si;
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@ -2197,7 +2197,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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if (pi == NULL || (bytes != 1 && bytes != 2 && bytes != 4) ||
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(coff & (bytes - 1)) != 0) {
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if (in)
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*eax = 0xffffffff;
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*valp = 0xffffffff;
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return;
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}
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@ -2207,7 +2207,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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*/
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if (coff >= PCI_REGMAX + 1) {
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if (in) {
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*eax = 0xffffffff;
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*valp = 0xffffffff;
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/*
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* Extended capabilities begin at offset 256 in config
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* space. Absence of extended capabilities is signaled
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@ -2215,7 +2215,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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* offset 256.
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*/
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if (coff <= PCI_REGMAX + 4)
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*eax = 0x00000000;
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*valp = 0x00000000;
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}
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return;
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}
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@ -2228,19 +2228,19 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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if (in) {
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/* Let the device emulation override the default handler */
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if (pe->pe_cfgread != NULL) {
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needcfg = pe->pe_cfgread(pi, coff, bytes, eax);
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needcfg = pe->pe_cfgread(pi, coff, bytes, valp);
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} else {
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needcfg = 1;
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}
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if (needcfg)
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*eax = CFGREAD(pi, coff, bytes);
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*valp = CFGREAD(pi, coff, bytes);
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pci_emul_hdrtype_fixup(bus, slot, coff, bytes, eax);
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pci_emul_hdrtype_fixup(bus, slot, coff, bytes, valp);
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} else {
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/* Let the device emulation override the default handler */
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if (pe->pe_cfgwrite != NULL &&
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(*pe->pe_cfgwrite)(pi, coff, bytes, *eax) == 0)
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(*pe->pe_cfgwrite)(pi, coff, bytes, *valp) == 0)
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return;
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/*
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@ -2269,7 +2269,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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pi->pi_bar[idx].addr = bar = 0;
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break;
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case PCIBAR_IO:
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addr = *eax & mask;
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addr = *valp & mask;
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addr &= 0xffff;
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bar = addr | pi->pi_bar[idx].lobits;
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/*
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@ -2281,7 +2281,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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}
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break;
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case PCIBAR_MEM32:
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addr = bar = *eax & mask;
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addr = bar = *valp & mask;
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bar |= pi->pi_bar[idx].lobits;
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if (addr != pi->pi_bar[idx].addr) {
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update_bar_address(pi, addr, idx,
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@ -2289,7 +2289,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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}
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break;
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case PCIBAR_MEM64:
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addr = bar = *eax & mask;
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addr = bar = *valp & mask;
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bar |= pi->pi_bar[idx].lobits;
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if (addr != (uint32_t)pi->pi_bar[idx].addr) {
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update_bar_address(pi, addr, idx,
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@ -2298,7 +2298,7 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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break;
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case PCIBAR_MEMHI64:
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mask = ~(pi->pi_bar[idx - 1].size - 1);
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addr = ((uint64_t)*eax << 32) & mask;
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addr = ((uint64_t)*valp << 32) & mask;
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bar = addr >> 32;
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if (bar != pi->pi_bar[idx - 1].addr >> 32) {
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update_bar_address(pi, addr, idx - 1,
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@ -2306,12 +2306,12 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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}
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break;
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case PCIBAR_ROM:
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addr = bar = *eax & mask;
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addr = bar = *valp & mask;
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if (memen(pi) && romen(pi)) {
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unregister_bar(pi, idx);
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}
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pi->pi_bar[idx].addr = addr;
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pi->pi_bar[idx].lobits = *eax &
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pi->pi_bar[idx].lobits = *valp &
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PCIM_BIOS_ENABLE;
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/* romen could have changed it value */
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if (memen(pi) && romen(pi)) {
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@ -2325,11 +2325,11 @@ pci_cfgrw(int in, int bus, int slot, int func, int coff, int bytes,
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pci_set_cfgdata32(pi, coff, bar);
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} else if (pci_emul_iscap(pi, coff)) {
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pci_emul_capwrite(pi, coff, bytes, *eax, 0, 0);
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pci_emul_capwrite(pi, coff, bytes, *valp, 0, 0);
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} else if (coff >= PCIR_COMMAND && coff < PCIR_REVID) {
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pci_emul_cmdsts_write(pi, coff, *eax, bytes);
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pci_emul_cmdsts_write(pi, coff, *valp, bytes);
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} else {
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CFGWRITE(pi, coff, *eax, bytes);
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CFGWRITE(pi, coff, *valp, bytes);
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}
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}
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}
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