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Add support for RK3288 into existing RockChip drivers.

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This patch ensures only minimal level of compatibility necessary to boot
on RK3288 based boards. GPIO and pinctrl interaction, missing in current
implementation, will be improved by own patch in the near future.

MFC after:	2 weeks
MFC with:	r351452
This commit is contained in:
Michal Meloun 2019-08-27 09:20:01 +00:00
parent 95acb40caa
commit f69c06c303
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=351543
3 changed files with 30 additions and 11 deletions
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10
sys/arm64/rockchip/if_dwc_rk.c
View File

@ -65,6 +65,13 @@ __FBSDID("$FreeBSD$");
#define RK3328_GRF_MACPHY_CON3 0x0B0C
#define RK3328_GRF_MACPHY_STATUS 0x0B10
static struct ofw_compat_data compat_data[] = {
{"rockchip,rk3288-gmac", 1},
{"rockchip,rk3328-gmac", 1},
{"rockchip,rk3399-gmac", 1},
{NULL, 0}
};
#ifdef notyet
static void
rk3328_set_delays(struct syscon *grf, phandle_t node)
@ -117,8 +124,7 @@ if_dwc_rk_probe(device_t dev)
if (!ofw_bus_status_okay(dev))
return (ENXIO);
if (!(ofw_bus_is_compatible(dev, "rockchip,rk3328-gmac") ||
ofw_bus_is_compatible(dev, "rockchip,rk3399-gmac")))
if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(dev, "Rockchip Gigabit Ethernet Controller");

24
sys/arm64/rockchip/rk_gpio.c
View File

@ -50,8 +50,6 @@ __FBSDID("$FreeBSD$");
#include <dev/ofw/ofw_bus_subr.h>
#include <dev/extres/clk/clk.h>
#include "opt_soc.h"
#include "gpio_if.h"
#define RK_GPIO_SWPORTA_DR 0x00 /* Data register */
@ -196,6 +194,7 @@ rk_gpio_pin_max(device_t dev, int *maxpin)
{
/* Each bank have always 32 pins */
/* XXX not true*/
*maxpin = 32;
return (0);
}
@ -225,6 +224,7 @@ rk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
sc = device_get_softc(dev);
/* XXX Combine this with parent (pinctrl) */
RK_GPIO_LOCK(sc);
reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR);
RK_GPIO_UNLOCK(sc);
@ -242,6 +242,7 @@ rk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
{
/* Caps are managed by the pinctrl device */
/* XXX Pass this to parent (pinctrl) */
*caps = 0;
return (0);
}
@ -254,6 +255,7 @@ rk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
sc = device_get_softc(dev);
/* XXX Combine this with parent (pinctrl) */
RK_GPIO_LOCK(sc);
reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR);
@ -394,6 +396,14 @@ rk_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
return (0);
}
static phandle_t
rk_gpio_get_node(device_t bus, device_t dev)
{
/* We only have one child, the GPIO bus, which needs our own node. */
return (ofw_bus_get_node(bus));
}
static device_method_t rk_gpio_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, rk_gpio_probe),
@ -414,6 +424,9 @@ static device_method_t rk_gpio_methods[] = {
DEVMETHOD(gpio_pin_config_32, rk_gpio_pin_config_32),
DEVMETHOD(gpio_map_gpios, rk_gpio_map_gpios),
/* ofw_bus interface */
DEVMETHOD(ofw_bus_get_node, rk_gpio_get_node),
DEVMETHOD_END
};
@ -425,5 +438,10 @@ static driver_t rk_gpio_driver = {
static devclass_t rk_gpio_devclass;
/*
* GPIO driver is always a child of rk_pinctrl driver and should be probed
* and attached within rk_pinctrl_attach function. Due to this, bus pass order
* must be same as bus pass order of rk_pinctrl driver.
*/
EARLY_DRIVER_MODULE(rk_gpio, simplebus, rk_gpio_driver,
rk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
rk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);

7
sys/arm64/rockchip/rk_grf.c
View File

@ -44,16 +44,11 @@ __FBSDID("$FreeBSD$");
#include <dev/extres/syscon/syscon.h>
#include <dev/fdt/simple_mfd.h>
#include "opt_soc.h"
static struct ofw_compat_data compat_data[] = {
#ifdef SOC_ROCKCHIP_RK3328
{"rockchip,rk3288-grf", 1},
{"rockchip,rk3328-grf", 1},
#endif
#ifdef SOC_ROCKCHIP_RK3399
{"rockchip,rk3399-grf", 1},
{"rockchip,rk3399-pmugrf", 1},
#endif
{NULL, 0}
};