dev/ath: minor spelling fixes in comments.

No functional change.

Reviewed by:	adrian
This commit is contained in:
Pedro F. Giffuni 2016-05-02 19:56:48 +00:00
parent dd40d6d5e0
commit f6b6084b8e
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=298939
26 changed files with 43 additions and 43 deletions

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@ -181,7 +181,7 @@ ath_dfs_process_phy_err(struct ath_softc *sc, struct mbuf *m,
}
/*
* Process the radar events and determine whether a DFS event has occured.
* Process the radar events and determine whether a DFS event has occurred.
*
* This is designed to run outside of the RX processing path.
* The RX path will call ath_dfs_tasklet_needed() to see whether

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@ -362,7 +362,7 @@ ath_hal_computetxtime(struct ath_hal *ah,
kbps = rates->info[rateix].rateKbps;
/*
* index can be invalid duting dynamic Turbo transitions.
* index can be invalid during dynamic Turbo transitions.
* XXX
*/
if (kbps == 0)

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@ -414,7 +414,7 @@ typedef enum {
/* Allow all mcast/bcast frames */
/*
* Magic RX filter flags that aren't targetting hardware bits
* Magic RX filter flags that aren't targeting hardware bits
* but instead the HAL sets individual bits - eg PHYERR will result
* in OFDM/CCK timing error frames being received.
*/
@ -1224,7 +1224,7 @@ typedef struct {
/*
* slotted mode only. rx_clear and bt_ant decision
* will be held the entire time that BT_ACTIVE is asserted,
* otherwise the decision is made before every slot boundry.
* otherwise the decision is made before every slot boundary.
*/
HAL_BOOL bt_hold_rxclear;
} HAL_BT_COEX_CONFIG;

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@ -490,7 +490,7 @@ getchannels(struct ath_hal *ah,
break;
default:
HALDEBUG(ah, HAL_DEBUG_REGDOMAIN,
"%s: Unkonwn HAL mode 0x%x\n", __func__, cm->mode);
"%s: Unknown HAL mode 0x%x\n", __func__, cm->mode);
continue;
}
if (isChanBitMaskZero(channelBM))

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@ -913,7 +913,7 @@ getNoiseFloorThresh(struct ath_hal *ah, const struct ieee80211_channel *chan,
}
/*
* Read the NF and check it against the noise floor threshhold
* Read the NF and check it against the noise floor threshold
*
* Returns: TRUE if the NF is good
*/

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@ -373,9 +373,9 @@ ar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
* change pwr_I_0 to signed 5-bits.
*/
int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on. */
/* to accommodate -ve power levels later on. */
int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on */
/* to accommodate -ve power levels later on */
uint16_t numVpd = 0;
uint16_t Vpd_step;
int16_t tmpVal ;

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@ -351,9 +351,9 @@ ar2317getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
* change pwr_I_0 to signed 5-bits.
*/
int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on. */
/* to accommodate -ve power levels later on. */
int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on */
/* to accommodate -ve power levels later on */
uint16_t numVpd = 0;
uint16_t Vpd_step;
int16_t tmpVal ;

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@ -367,9 +367,9 @@ ar2413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
* change pwr_I_0 to signed 5-bits.
*/
int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on. */
/* to accommodate -ve power levels later on. */
int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on */
/* to accommodate -ve power levels later on */
uint16_t numVpd = 0;
uint16_t Vpd_step;
int16_t tmpVal ;

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@ -372,9 +372,9 @@ ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
* change pwr_I_0 to signed 5-bits.
*/
static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on. */
/* to accommodate -ve power levels later on. */
static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on */
/* to accommodate -ve power levels later on */
uint16_t numVpd = 0;
uint16_t Vpd_step;
int16_t tmpVal ;

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@ -885,7 +885,7 @@ ar5212FillCapabilityInfo(struct ath_hal *ah)
pCap->halRfSilentSupport = AH_TRUE;
}
/* NB: this is a guess, noone seems to know the answer */
/* NB: this is a guess, no one seems to know the answer */
ahpriv->ah_rxornIsFatal =
(AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_VENICE);

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@ -51,7 +51,7 @@ ar5212SetPowerModeAwake(struct ath_hal *ah, int setChip)
* which when blindly written back with OS_REG_RMW_FIELD
* enables the MIB interrupt for the sleep performance
* counters. This can result in an interrupt storm when
* ANI is in operation as noone knows to turn off the MIB
* ANI is in operation as no one knows to turn off the MIB
* interrupt cause.
*/
scr = OS_REG_READ(ah, AR_SCR);

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@ -1385,7 +1385,7 @@ ar5212GetNfHistMid(const int16_t calData[AR512_NF_CAL_HIST_MAX])
}
/*
* Read the NF and check it against the noise floor threshhold
* Read the NF and check it against the noise floor threshold
*/
int16_t
ar5212GetNf(struct ath_hal *ah, struct ieee80211_channel *chan)

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@ -411,9 +411,9 @@ ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
* change pwr_I_0 to signed 5-bits.
*/
int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on. */
/* to accommodate -ve power levels later on. */
int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on */
/* to accommodate -ve power levels later on */
uint16_t numVpd = 0;
uint16_t Vpd_step;
int16_t tmpVal ;

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@ -95,7 +95,7 @@ ar5416BTCoexSetWeights(struct ath_hal *ah, u_int32_t stompType)
struct ath_hal_5416 *ahp = AH5416(ah);
if (AR_SREV_KIWI_10_OR_LATER(ah)) {
/* TODO: TX RX seperate is not enabled. */
/* TODO: TX RX separate is not enabled. */
switch (stompType) {
case HAL_BT_COEX_STOMP_ALL:
ahp->ah_btCoexBTWeight = AR5416_BT_WGHT;

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@ -772,7 +772,7 @@ ar5416SanitizeNF(struct ath_hal *ah, int16_t *nf)
/*
* Read the NF and check it against the noise floor threshhold
* Read the NF and check it against the noise floor threshold
*
* Return 0 if the NF calibration hadn't finished, 0 if it was
* invalid, or > 0 for a valid NF reading.

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@ -119,7 +119,7 @@ ar5416ConfigureSpectralScan(struct ath_hal *ah, HAL_SPECTRAL_PARAM *ss)
} else {
if (ss->ss_count != HAL_SPECTRAL_PARAM_NOVAL) {
/*
* In Merlin, for continous scan, scan_count = 128.
* In Merlin, for continuous scan, scan_count = 128.
* In case of Kiwi, this value should be 0
*/
if (ss->ss_count == 128)

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@ -807,7 +807,7 @@ ar5416ProcTxDesc(struct ath_hal *ah,
}
/*
* These fields are not used. Zero these to preserve compatability
* These fields are not used. Zero these to preserve compatibility
* with existing drivers.
*/
ts->ts_virtcol = MS(ads->ds_ctl1, AR_VirtRetryCnt);

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@ -277,10 +277,10 @@
#define AR_PCIE_PM_CTRL_ENA 0x00080000
#define AR_AHB_EXACT_WR_EN 0x00000000 /* write exact bytes */
#define AR_AHB_BUF_WR_EN 0x00000001 /* buffer write upto cacheline*/
#define AR_AHB_BUF_WR_EN 0x00000001 /* buffer write up to cacheline*/
#define AR_AHB_EXACT_RD_EN 0x00000000 /* read exact bytes */
#define AR_AHB_CACHELINE_RD_EN 0x00000002 /* read upto end of cacheline */
#define AR_AHB_PREFETCH_RD_EN 0x00000004 /* prefetch upto page boundary*/
#define AR_AHB_CACHELINE_RD_EN 0x00000002 /* read up to end of cacheline */
#define AR_AHB_PREFETCH_RD_EN 0x00000004 /* prefetch up to page boundary*/
#define AR_AHB_PAGE_SIZE_1K 0x00000000 /* set page-size as 1k */
#define AR_AHB_PAGE_SIZE_2K 0x00000008 /* set page-size as 2k */
#define AR_AHB_PAGE_SIZE_4K 0x00000010 /* set page-size as 4k */
@ -518,7 +518,7 @@
#define AR_PCU_FORCE_QUIET_COLL 0x00040000 /* kill xmit for channel change */
#define AR_PCU_BT_ANT_PREVENT_RX 0x00100000
#define AR_PCU_BT_ANT_PREVENT_RX_S 20
#define AR_PCU_TBTT_PROTECT 0x00200000 /* no xmit upto tbtt+20 uS */
#define AR_PCU_TBTT_PROTECT 0x00200000 /* no xmit up to tbtt+20 uS */
#define AR_PCU_CLEAR_VMF 0x01000000 /* clear vmf mode (fast cc)*/
#define AR_PCU_CLEAR_BA_VALID 0x04000000 /* clear ba state */
#define AR_PCU_SEL_EVM 0x08000000 /* select EVM data or PLCP header */

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@ -328,7 +328,7 @@ ar9280SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData,
* uses this to calculate the PDADC delta during
* calibration ; 0 here effectively stops the
* temperature compensation calibration from
* occuring.
* occurring.
*/
AH5416(ah)->initPDADC = 0;
}

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@ -2698,7 +2698,7 @@ ath_txrx_start(struct ath_softc *sc)
}
/*
* Grab the reset lock, and wait around until noone else
* Grab the reset lock, and wait around until no one else
* is trying to do anything with it.
*
* This is totally horrible but we can't hold this lock for
@ -2782,7 +2782,7 @@ ath_reset(struct ath_softc *sc, ATH_RESET_TYPE reset_type)
ATH_PCU_UNLOCK_ASSERT(sc);
ATH_UNLOCK_ASSERT(sc);
/* Try to (stop any further TX/RX from occuring */
/* Try to (stop any further TX/RX from occurring */
taskqueue_block(sc->sc_tq);
/*
@ -2826,7 +2826,7 @@ ath_reset(struct ath_softc *sc, ATH_RESET_TYPE reset_type)
/*
* Should now wait for pending TX/RX to complete
* and block future ones from occuring. This needs to be
* and block future ones from occurring. This needs to be
* done before the TX queue is drained.
*/
ath_draintxq(sc, reset_type); /* stop xmit side */
@ -3676,7 +3676,7 @@ ath_bstuck_proc(void *arg, int pending)
sc->sc_stats.ast_bstuck++;
/*
* This assumes that there's no simultaneous channel mode change
* occuring.
* occurring.
*/
ath_reset(sc, ATH_RESET_NOLOSS);
}
@ -4737,7 +4737,7 @@ ath_tx_freebuf(struct ath_softc *sc, struct ath_buf *bf, int status)
/*
* Make sure that we only sync/unload if there's an mbuf.
* If not (eg we cloned a buffer), the unload will have already
* occured.
* occurred.
*/
if (bf->bf_m != NULL) {
bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
@ -5076,7 +5076,7 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
ATH_PCU_UNLOCK_ASSERT(sc);
ATH_UNLOCK_ASSERT(sc);
/* (Try to) stop TX/RX from occuring */
/* (Try to) stop TX/RX from occurring */
taskqueue_block(sc->sc_tq);
ATH_PCU_LOCK(sc);
@ -5857,7 +5857,7 @@ ath_newassoc(struct ieee80211_node *ni, int isnew)
* If we're reassociating, make sure that any paused queues
* get unpaused.
*
* Now, we may hvae frames in the hardware queue for this node.
* Now, we may have frames in the hardware queue for this node.
* So if we are reassociating and there are frames in the queue,
* we need to go through the cleanup path to ensure that they're
* marked as non-aggregate.
@ -6068,7 +6068,7 @@ ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
sc->sc_currates = rt;
sc->sc_curmode = mode;
/*
* All protection frames are transmited at 2Mb/s for
* All protection frames are transmitted at 2Mb/s for
* 11g, otherwise at 1Mb/s.
*/
if (mode == IEEE80211_MODE_11G)

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@ -163,7 +163,7 @@ ath_ioctl_ratestats(struct ath_softc *sc, struct ath_rateioctl *rs)
* Diagnostic interface to the HAL. This is used by various
* tools to do things like retrieve register contents for
* debugging. The mechanism is intentionally opaque so that
* it can change frequently w/o concern for compatiblity.
* it can change frequently w/o concern for compatibility.
*/
static int
ath_ioctl_diag(struct ath_softc *sc, struct ath_diag *ad)

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@ -73,7 +73,7 @@ __FBSDID("$FreeBSD$");
#include <dev/ath/if_ath_debug.h>
#include <dev/ath/if_ath_lna_div.h>
/* Linux compability macros */
/* Linux compatibility macros */
/*
* XXX these don't handle rounding, underflow, overflow, wrapping!
*/

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@ -82,7 +82,7 @@ struct ath_pci_softc {
/*
* XXX eventually this should be some system level definition
* so modules will hvae probe/attach information like USB.
* so modules will have probe/attach information like USB.
* But for now..
*/
struct pci_device_id {

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@ -802,7 +802,7 @@ ath_rx_pkt(struct ath_softc *sc, struct ath_rx_status *rs, HAL_STATUS status,
* This code should be removed once the actual
* root cause of the issue has been identified.
* For example, it may be that the rs_antenna
* field is only valid for the lsat frame of
* field is only valid for the last frame of
* an aggregate and it just happens that it is
* "mostly" right. (This is a general statement -
* the majority of the statistics are only valid

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@ -3125,7 +3125,7 @@ ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
* If we're not doing A-MPDU, be prepared to direct dispatch
* up to both limits if possible. This particular corner
* case may end up with packet starvation between aggregate
* traffic and non-aggregate traffic: we wnat to ensure
* traffic and non-aggregate traffic: we want to ensure
* that non-aggregate stations get a few frames queued to the
* hardware before the aggregate station(s) get their chance.
*
@ -3949,7 +3949,7 @@ ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid)
* XXX TODO: it may just be enough to walk the HWQs and mark
* frames for that node as non-aggregate; or mark the ath_node
* with something that indicates that aggregation is no longer
* occuring. Then we can just toss the BAW complaints and
* occurring. Then we can just toss the BAW complaints and
* do a complete hard reset of state here - no pause, no
* complete counter, etc.
*/

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@ -126,7 +126,7 @@ struct ath_tid {
TAILQ_HEAD(,ath_buf) tid_q; /* pending buffers */
struct ath_node *an; /* pointer to parent */
int tid; /* tid */
int ac; /* which AC gets this trafic */
int ac; /* which AC gets this traffic */
int hwq_depth; /* how many buffers are on HW */
u_int axq_depth; /* SW queue depth */