From f9867ad74d31b2c69a2ef60c2d9994165fb5d13f Mon Sep 17 00:00:00 2001 From: Andrew Turner Date: Mon, 1 Dec 2014 21:13:47 +0000 Subject: [PATCH] Use the floating-point instruction on ARMv7 as the clang 3.5 integrated assembler doesn't allow these two instructions to use co-processor 11. MFC after: 1 Week Sponsored by: ABT Systems Ltd --- contrib/gcc/config/arm/libunwind.S | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/contrib/gcc/config/arm/libunwind.S b/contrib/gcc/config/arm/libunwind.S index 81e4236f6970..8b1e2f3722e4 100644 --- a/contrib/gcc/config/arm/libunwind.S +++ b/contrib/gcc/config/arm/libunwind.S @@ -26,6 +26,13 @@ the Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ +#include + +/* Allow the use of VFP instructions */ +#if __ARM_ARCH >= 7 +.fpu vfp +#endif + #ifndef __symbian__ #include "lib1funcs.asm" @@ -66,14 +73,22 @@ ARM_FUNC_START restore_core_regs ARM_FUNC_START gnu_Unwind_Restore_VFP /* Use the generic coprocessor form so that gas doesn't complain on soft-float targets. */ +#if __ARM_ARCH >= 7 + fldmiax r0, {d0-d15} +#else ldc p11,cr0,[r0],{0x21} /* fldmiax r0, {d0-d15} */ +#endif RET /* Store VFR regsters d0-d15 to the address in r0. */ ARM_FUNC_START gnu_Unwind_Save_VFP /* Use the generic coprocessor form so that gas doesn't complain on soft-float targets. */ +#if __ARM_ARCH >= 7 + fstmiax r0, {d0-d15} +#else stc p11,cr0,[r0],{0x21} /* fstmiax r0, {d0-d15} */ +#endif RET /* Wrappers to save core registers, then call the real routine. */