Don't overwrite mapped bits.
Found by: PVS-Studio
This commit is contained in:
parent
9935c65a28
commit
f9beb16729
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=316820
@ -557,7 +557,7 @@ jme_map_intr_vector(struct jme_softc *sc)
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bzero(map, sizeof(map));
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/* Map Tx interrupts source to MSI/MSIX vector 2. */
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map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] =
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map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] |=
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MSINUM_INTR_SOURCE(2, N_INTR_TXQ0_COMP);
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map[MSINUM_REG_INDEX(N_INTR_TXQ1_COMP)] |=
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MSINUM_INTR_SOURCE(2, N_INTR_TXQ1_COMP);
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@ -579,37 +579,37 @@ jme_map_intr_vector(struct jme_softc *sc)
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MSINUM_INTR_SOURCE(2, N_INTR_TXQ_COAL_TO);
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/* Map Rx interrupts source to MSI/MSIX vector 1. */
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COMP);
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COMP);
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COMP);
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COMP);
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_DESC_EMPTY);
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_DESC_EMPTY);
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_DESC_EMPTY);
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_DESC_EMPTY);
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL);
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL);
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL);
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL);
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL_TO);
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL_TO);
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL_TO);
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] =
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] |=
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL_TO);
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/* Map all other interrupts source to MSI/MSIX vector 0. */
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