Fix up interrupt definitions for Broadcom XLP
Gather all the IRQ definitions to interrupt.h. Earlier these were in xlp.h and pic.h. Update the definition of XLP_IRQ_IS_PICINTR to check for last irq as well.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=279304
@ -168,14 +168,9 @@
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#define PIC_IRT_TIMER_INDEX(num) ((num) + PIC_IRT_TIMER_0_INDEX)
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#define PIC_CLOCK_TIMER 7
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#define PIC_IRQ_BASE 8
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#if !defined(LOCORE) && !defined(__ASSEMBLY__)
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#define PIC_IRT_FIRST_IRQ (PIC_IRQ_BASE)
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#define PIC_IRT_LAST_IRQ 63
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#define XLP_IRQ_IS_PICINTR(irq) ((irq) >= PIC_IRT_FIRST_IRQ)
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/*
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* Misc
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*/
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@ -34,9 +34,22 @@
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/* Defines for the IRQ numbers */
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#define IRQ_IPI 41 /* 8-39 are mapped by PIC intr 0-31 */
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#define IRQ_MSGRING 6
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#define IRQ_TIMER 7
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#define IRQ_IPI 41 /* 8-39 are used by PIC interrupts */
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#define IRQ_MSGRING 6
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#define IRQ_TIMER 7
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#define PIC_IRQ_BASE 8
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#define PIC_IRT_LAST_IRQ 39
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#define XLP_IRQ_IS_PICINTR(irq) ((irq) >= PIC_IRQ_BASE && \
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(irq) <= PIC_IRT_LAST_IRQ)
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#define PIC_UART_0_IRQ 9
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#define PIC_PCIE_0_IRQ 11
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#define PIC_PCIE_1_IRQ 12
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#define PIC_PCIE_2_IRQ 13
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#define PIC_PCIE_3_IRQ 14
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#define PIC_EHCI_0_IRQ 16
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#define PIC_MMC_IRQ 21
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/*
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* XLR needs custom pre and post handlers for PCI/PCI-e interrupts
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@ -34,18 +34,6 @@
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#include <mips/nlm/hal/mips-extns.h>
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#include <mips/nlm/hal/iomap.h>
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#define PIC_UART_0_IRQ 9
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#define PIC_PCIE_0_IRQ 11
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#define PIC_PCIE_1_IRQ 12
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#define PIC_PCIE_2_IRQ 13
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#define PIC_PCIE_3_IRQ 14
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#define PIC_EHCI_0_IRQ 16
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#define PIC_MMC_IRQ 21
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/* 41 used by IRQ_SMP */
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/* XLP 8xx/4xx A0, A1, A2 CPU COP0 PRIDs */
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#define CHIP_PROCESSOR_ID_XLP_8XX 0x10
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#define CHIP_PROCESSOR_ID_XLP_3XX 0x11
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