Update ARM CoreSight trace decoder library.

Its latest version merged from:
^/vendor/opencsd/a1961c91b02a92f3c6ed8b145c636ac4c5565aca

Sponsored by:	DARPA, AFRL
This commit is contained in:
Ruslan Bukin 2019-10-10 13:30:13 +00:00
parent 85f87cf491
commit fc5020859f
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=353393
51 changed files with 1694 additions and 597 deletions

View File

@ -95,6 +95,7 @@ class OcsdCodeFollower
const bool isLink() const; //!< is a link (branch with link etc)
const bool ISAChanged() const; //!< next ISA different from input ISA.
const ocsd_isa nextISA() const; //!< ISA for next instruction
const uint8_t getInstrSize() const; //!< Get the last instruction size.
// information on error conditions
const bool isNacc() const; //!< true if Memory Not Accessible (nacc) error occurred
@ -192,6 +193,11 @@ inline const ocsd_instr_subtype OcsdCodeFollower::getInstrSubType() const
return m_instr_info.sub_type;
}
inline const uint8_t OcsdCodeFollower::getInstrSize() const
{
return m_instr_info.instr_size;
}
inline const bool OcsdCodeFollower::isCondInstr() const
{
return (bool)(m_instr_info.is_conditional == 1);

View File

@ -313,6 +313,22 @@ class DecodeTree : public ITrcDataIn
*/
ocsd_err_t addBinFileRegionMemAcc(const ocsd_file_mem_region_t *region_array, const int num_regions, const ocsd_mem_space_acc_t mem_space, const std::string &filepath);
/*!
* Updates/adds to a memory accessor for a memory block supplied as a one or more memory regions in a binary file.
* Region structures are created that describe the memory start address, the offset within the binary file
* for that address, and the length of the region. This accessor can be used to point to the code section
* in a program file for example.
*
* @param *region_array : array of valid memory regions in the file.
* @param num_regions : number of regions
* @param mem_space : Memory space
* @param &filepath : Path to the binary data file
*
* @return ocsd_err_t : Library error code or OCSD_OK if successful.
*/
ocsd_err_t updateBinFileRegionMemAcc(const ocsd_file_mem_region_t *region_array, const int num_regions, const ocsd_mem_space_acc_t mem_space, const std::string &filepath);
/*!
* This memory accessor allows the client to supply a callback function for the region
* defined by the start and end addresses. This can be used to supply a custom memory accessor,
@ -327,7 +343,8 @@ class DecodeTree : public ITrcDataIn
* @return ocsd_err_t : Library error code or OCSD_OK if successful.
*/
ocsd_err_t addCallbackMemAcc(const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAcc_CB p_cb_func, const void *p_context);
ocsd_err_t addCallbackIDMemAcc(const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAccID_CB p_cb_func, const void *p_context);
/*!
* Remove the memory accessor from the map, that begins at the given address, for the memory space provided.
*
@ -368,6 +385,9 @@ class DecodeTree : public ITrcDataIn
ocsd_err_t createDecodeElement(const uint8_t CSID);
void destroyDecodeElement(const uint8_t CSID);
void destroyMemAccMapper();
ocsd_err_t initCallbackMemAcc(const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address,
const ocsd_mem_space_acc_t mem_space, void *p_cb_func, bool IDfn, const void *p_context);
ocsd_dcd_tree_src_t m_dcd_tree_type;

View File

@ -37,7 +37,7 @@
#include <string>
#include <vector>
#include <fstream>
//#include <fstream>
#include "interfaces/trc_error_log_i.h"
#include "ocsd_error.h"
@ -49,7 +49,7 @@ class ocsdDefaultErrorLogger : public ITraceErrorLog
ocsdDefaultErrorLogger();
virtual ~ocsdDefaultErrorLogger();
bool initErrorLogger(const ocsd_err_severity_t verbosity, bool bCreateOutputLogger = false);
bool initErrorLogger(const ocsd_err_severity_t verbosity, bool bCreateOutputLogger = false); //!< Initialise the error logger with a severity filter, optionally create an output logger on stderr.
virtual ocsdMsgLogger *getOutputLogger() { return m_output_logger; };
virtual void setOutputLogger(ocsdMsgLogger *pLogger);

View File

@ -53,23 +53,26 @@ class ocsdMsgLogger
ocsdMsgLogger();
~ocsdMsgLogger();
/** Typedef enum providing flags to define the output methods for the message logger.
*/
typedef enum {
OUT_NONE = 0,
OUT_FILE = 1,
OUT_STDERR = 2,
OUT_STDOUT = 4,
OUT_STR_CB = 8 /* output to external string callback interface */
OUT_NONE = 0, /*!< No output from logger*/
OUT_FILE = 1, /*!< Output to file */
OUT_STDERR = 2, /*!< Output to stderr */
OUT_STDOUT = 4, /*!< Output to stdout */
OUT_STR_CB = 8 /*!< output to external string callback interface */
} output_dest;
void setLogOpts(int logOpts);
const int getLogOpts() const { return m_outFlags; };
void setLogOpts(int logOpts); //!< set the output logging flags.
const int getLogOpts() const //! get the current output logging flags value.
{ return m_outFlags; };
void setLogFileName(const char *fileName);
void setStrOutFn(ocsdMsgLogStrOutI *p_IstrOut);
void setLogFileName(const char *fileName); //!< Set the output log filename, and enable logging to file.
void setStrOutFn(ocsdMsgLogStrOutI *p_IstrOut); //!< Set the output log string callback and enable logging to callback.
void LogMsg(const std::string &msg);
void LogMsg(const std::string &msg); //!< Log a message to the current set output channels.
const bool isLogging() const;
const bool isLogging() const; //!< true if logging active
private:
int m_outFlags;

View File

@ -73,9 +73,10 @@ class OcsdTraceElement : public trcPrintableElem, public ocsd_generic_trace_elem
void setTraceOnReason(const trace_on_reason_t reason);
void setAddrRange(const ocsd_vaddr_t st_addr, const ocsd_vaddr_t en_addr);
void setLastInstrInfo(const bool exec, const ocsd_instr_type last_i_type, const ocsd_instr_subtype last_i_subtype);
void setAddrRange(const ocsd_vaddr_t st_addr, const ocsd_vaddr_t en_addr, const int num_instr = 1);
void setLastInstrInfo(const bool exec, const ocsd_instr_type last_i_type, const ocsd_instr_subtype last_i_subtype, const uint8_t size);
void setAddrStart(const ocsd_vaddr_t st_addr) { this->st_addr = st_addr; };
void setLastInstrCond(const int is_cond) { this->last_instr_cond = is_cond; };
void setSWTInfo(const ocsd_swt_info_t swt_info) { sw_trace_info = swt_info; };
void setExtendedDataPtr(const void *data_ptr);
@ -122,15 +123,17 @@ inline void OcsdTraceElement::setEvent(const event_t ev_type, const uint16_t num
trace_event.ev_number = ev_type == EVENT_NUMBERED ? number : 0;
}
inline void OcsdTraceElement::setAddrRange(const ocsd_vaddr_t st_addr, const ocsd_vaddr_t en_addr)
inline void OcsdTraceElement::setAddrRange(const ocsd_vaddr_t st_addr, const ocsd_vaddr_t en_addr, const int num_instr /* = 1 */)
{
this->st_addr = st_addr;
this->en_addr = en_addr;
this->num_instr_range = num_instr;
}
inline void OcsdTraceElement::setLastInstrInfo(const bool exec, const ocsd_instr_type last_i_type, const ocsd_instr_subtype last_i_subtype)
inline void OcsdTraceElement::setLastInstrInfo(const bool exec, const ocsd_instr_type last_i_type, const ocsd_instr_subtype last_i_subtype, const uint8_t size)
{
last_instr_exec = exec ? 1 : 0;
last_instr_sz = size & 0x7;
this->last_i_type = last_i_type;
this->last_i_subtype = last_i_subtype;
}

View File

@ -49,6 +49,7 @@ class TrcIDecode : public IInstrDecode
ocsd_err_t DecodeA32(ocsd_instr_info *instr_info);
ocsd_err_t DecodeA64(ocsd_instr_info *instr_info);
ocsd_err_t DecodeT32(ocsd_instr_info *instr_info);
void SetArchVersion(ocsd_instr_info *instr_info);
};
#endif // ARM_TRC_I_DECODE_H_INCLUDED

View File

@ -73,7 +73,9 @@ Performance event 0x0D counts these.
*/
int inst_ARM_is_direct_branch(uint32_t inst);
int inst_Thumb_is_direct_branch(uint32_t inst);
int inst_Thumb_is_direct_branch_link(uint32_t inst, uint8_t *is_link, uint8_t *is_cond);
int inst_A64_is_direct_branch(uint32_t inst);
int inst_A64_is_direct_branch_link(uint32_t inst, uint8_t *is_link);
/*
Get branch destination for a direct branch.
@ -83,7 +85,9 @@ int inst_Thumb_branch_destination(uint32_t addr, uint32_t inst, uint32_t *pnpc);
int inst_A64_branch_destination(uint64_t addr, uint32_t inst, uint64_t *pnpc);
int inst_ARM_is_indirect_branch(uint32_t inst);
int inst_Thumb_is_indirect_branch_link(uint32_t inst, uint8_t *is_link);
int inst_Thumb_is_indirect_branch(uint32_t inst);
int inst_A64_is_indirect_branch_link(uint32_t inst, uint8_t *is_link);
int inst_A64_is_indirect_branch(uint32_t inst);
int inst_ARM_is_branch_and_link(uint32_t inst);
@ -109,6 +113,10 @@ arm_barrier_t inst_ARM_barrier(uint32_t inst);
arm_barrier_t inst_Thumb_barrier(uint32_t inst);
arm_barrier_t inst_A64_barrier(uint32_t inst);
int inst_ARM_wfiwfe(uint32_t inst);
int inst_Thumb_wfiwfe(uint32_t inst);
int inst_A64_wfiwfe(uint32_t inst);
/*
Test whether an instruction is definitely undefined, e.g. because
allocated to a "permanently UNDEFINED" space (UDF mnemonic).
@ -125,6 +133,9 @@ int inst_A64_is_UDF(uint32_t inst);
ocsd_instr_subtype get_instr_subtype();
void clear_instr_subtype();
/* set arch version info. */
void set_arch_version(uint16_t version);
#endif // ARM_TRC_IDEC_ARMINST_H_INCLUDED
/* End of File trc_idec_arminst.h */

View File

@ -56,8 +56,8 @@ class ocsdMsgLogger;
class ITraceErrorLog
{
public:
ITraceErrorLog() {}; /**< default constructor */
virtual ~ITraceErrorLog() {}; /**< default destructor */
ITraceErrorLog() {};
virtual ~ITraceErrorLog() {};
/*!
* Register a named component error source. Allows the logger to associate errors with components.
@ -111,7 +111,7 @@ class ITraceErrorLog
* Get the last error associated with the given Trace source channel ID.
* returns a pointer to the error or 0 if no errors associated with the ID.
*
* @param chan_id : ID.
* @param chan_id : Trace Source Channel ID (CoreSight Trace ID).
*
* @return ocsdError *: last error pointer for ID or 0.
*/

View File

@ -123,12 +123,13 @@ class TrcMemAccessorBase
*
* @param s_address : Start address of the read.
* @param memSpace : memory space for this access.
* @param trcID : Trace ID of trace source.
* @param reqBytes : Number of bytes required.
* @param *byteBuffer : Buffer to copy the bytes into.
*
* @return uint32_t : Number of bytes read, 0 if s_address out of range, or mem space not accessible.
*/
virtual const uint32_t readBytes(const ocsd_vaddr_t s_address, const ocsd_mem_space_acc_t memSpace, const uint32_t reqBytes, uint8_t *byteBuffer) = 0;
virtual const uint32_t readBytes(const ocsd_vaddr_t s_address, const ocsd_mem_space_acc_t memSpace, const uint8_t trcID, const uint32_t reqBytes, uint8_t *byteBuffer) = 0;
/*!
* Validate the address range - ensure addresses aligned, different, st < en etc.

View File

@ -64,7 +64,7 @@ class TrcMemAccBufPtr: public TrcMemAccessorBase
virtual ~TrcMemAccBufPtr() {}; /**< default destructor */
/** Memory access override - allow decoder to read bytes from the buffer. */
virtual const uint32_t readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t memSpace, const uint32_t reqBytes, uint8_t *byteBuffer);
virtual const uint32_t readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t memSpace, const uint8_t trcID, const uint32_t reqBytes, uint8_t *byteBuffer);
private:
const uint8_t *m_p_buffer; /**< pointer to the memory buffer */

View File

@ -0,0 +1,149 @@
/*!
* \file trc_mem_acc_cache.h
* \brief OpenCSD : Memory accessor cache.
*
* \copyright Copyright (c) 2018, ARM Limited. All Rights Reserved.
*/
/*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef ARM_TRC_MEM_ACC_CACHE_H_INCLUDED
#define ARM_TRC_MEM_ACC_CACHE_H_INCLUDED
#include <string>
#include "opencsd/ocsd_if_types.h"
#define MEM_ACC_CACHE_PAGE_SIZE 256
#define MEM_ACC_CACHE_MRU_SIZE 12
class TrcMemAccessorBase;
class ITraceErrorLog;
typedef struct cache_block {
ocsd_vaddr_t st_addr;
uint32_t valid_len;
uint8_t data[MEM_ACC_CACHE_PAGE_SIZE];
} cache_block_t;
// enable define to collect stats for debugging / cache performance tests
//#define LOG_CACHE_STATS
/** class TrcMemAccCache - cache small amounts of data from accessors to speed up decode. */
class TrcMemAccCache
{
public:
TrcMemAccCache();
~TrcMemAccCache() {};
void enableCaching(bool bEnable) { m_bCacheEnabled = bEnable; };
void invalidateAll();
const bool enabled() const { return m_bCacheEnabled; };
const bool enabled_for_size(const uint32_t reqSize) const
{
return (m_bCacheEnabled && (reqSize <= MEM_ACC_CACHE_PAGE_SIZE));
}
/** read bytes from cache if possible - load new page if needed, bail out if data not available */
ocsd_err_t readBytesFromCache(TrcMemAccessorBase *p_accessor, const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint8_t trcID, uint32_t *numBytes, uint8_t *byteBuffer);
void setErrorLog(ITraceErrorLog *log);
void logAndClearCounts();
private:
bool blockInCache(const ocsd_vaddr_t address, const uint32_t reqBytes); // run through each page to look for data.
bool blockInPage(const ocsd_vaddr_t address, const uint32_t reqBytes);
void logMsg(const std::string &szMsg);
cache_block_t m_mru[MEM_ACC_CACHE_MRU_SIZE];
int m_mru_idx = 0; // in use index
int m_mru_next_new = 0; // next new page at this index.
bool m_bCacheEnabled = false;
#ifdef LOG_CACHE_STATS
uint32_t m_hits = 0;
uint32_t m_misses = 0;
uint32_t m_pages = 0;
uint32_t m_hit_rl[MEM_ACC_CACHE_MRU_SIZE];
uint32_t m_hit_rl_max[MEM_ACC_CACHE_MRU_SIZE];
#endif
ITraceErrorLog *m_err_log = 0;
};
inline TrcMemAccCache::TrcMemAccCache()
{
for (int i = 0; i < MEM_ACC_CACHE_MRU_SIZE; i++)
{
m_mru[i].st_addr = 0;
m_mru[i].valid_len = 0;
#ifdef LOG_CACHE_STATS
m_hit_rl[i] = 0;
m_hit_rl_max[i] = 0;
#endif
}
}
inline bool TrcMemAccCache::blockInPage(const ocsd_vaddr_t address, const uint32_t reqBytes)
{
if ((m_mru[m_mru_idx].st_addr <= address) &&
m_mru[m_mru_idx].st_addr + m_mru[m_mru_idx].valid_len >= (address + reqBytes))
return true;
return false;
}
inline bool TrcMemAccCache::blockInCache(const ocsd_vaddr_t address, const uint32_t reqBytes)
{
int tests = MEM_ACC_CACHE_MRU_SIZE;
while (tests)
{
if (blockInPage(address, reqBytes))
return true; // found address in page
tests--;
m_mru_idx++;
if (m_mru_idx == MEM_ACC_CACHE_MRU_SIZE)
m_mru_idx = 0;
}
return false;
}
inline void TrcMemAccCache::invalidateAll()
{
for (int i = 0; i < MEM_ACC_CACHE_MRU_SIZE; i++)
{
m_mru[i].valid_len = 0;
m_mru[i].st_addr = 0;
}
m_mru_idx = 0;
m_mru_next_new = 0;
}
#endif // ARM_TRC_MEM_ACC_CACHE_H_INCLUDED
/* End of File trc_mem_acc_cache.h */

View File

@ -49,32 +49,47 @@ class TrcMemAccCB : public TrcMemAccessorBase
virtual ~TrcMemAccCB() {};
/** Memory access override - allow decoder to read bytes from the buffer. */
virtual const uint32_t readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t memSpace, const uint32_t reqBytes, uint8_t *byteBuffer);
virtual const uint32_t readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t memSpace, const uint8_t trcID, const uint32_t reqBytes, uint8_t *byteBuffer);
void setCBIfClass(TrcMemAccCBIF *p_if);
void setCBIfFn(Fn_MemAcc_CB p_fn, const void *p_context);
void setCBIDIfFn(Fn_MemAccID_CB p_fn, const void *p_context);
private:
void clearCBptrs();
TrcMemAccCBIF *m_p_CBclass; //<! callback class.
Fn_MemAcc_CB m_p_CBfn; //<! callback function.
Fn_MemAccID_CB m_p_CBIDfn; //<! callback with ID function.
const void *m_p_cbfn_context; //<! context pointer for callback function.
};
inline void TrcMemAccCB::clearCBptrs()
{
m_p_CBclass = 0;
m_p_CBfn = 0;
m_p_CBIDfn = 0;
m_p_cbfn_context = 0;
}
inline void TrcMemAccCB::setCBIfClass(TrcMemAccCBIF *p_if)
{
clearCBptrs(); // only one callback type per accessor.
m_p_CBclass = p_if;
m_p_CBfn = 0; // only one callback type per accessor.
m_p_cbfn_context = 0;
}
inline void TrcMemAccCB::setCBIfFn(Fn_MemAcc_CB p_fn, const void *p_context)
{
clearCBptrs(); // only one callback type per accessor.
m_p_CBfn = p_fn;
m_p_cbfn_context = p_context;
m_p_CBclass = 0; // only one callback type per accessor.
}
inline void TrcMemAccCB::setCBIDIfFn(Fn_MemAccID_CB p_fn, const void *p_context)
{
clearCBptrs(); // only one callback type per accessor.
m_p_CBIDfn = p_fn;
m_p_cbfn_context = p_context;
}
#endif // ARM_TRC_MEM_ACC_CB_H_INCLUDED

View File

@ -56,7 +56,7 @@ class FileRegionMemAccessor : public TrcMemAccessorBase
bool operator<(const FileRegionMemAccessor& rhs) { return this->m_startAddress < rhs.m_startAddress; };
// not going to use these objects to read bytes - defer to the file class for that.
virtual const uint32_t readBytes(const ocsd_vaddr_t s_address, const ocsd_mem_space_acc_t memSpace, const uint32_t reqBytes, uint8_t *byteBuffer) { return 0; };
virtual const uint32_t readBytes(const ocsd_vaddr_t s_address, const ocsd_mem_space_acc_t memSpace, const uint8_t trcID, const uint32_t reqBytes, uint8_t *byteBuffer) { return 0; };
const ocsd_vaddr_t regionStartAddress() const { return m_startAddress; };
@ -77,7 +77,7 @@ class TrcMemAccessorFile : public TrcMemAccessorBase
{
public:
/** read bytes override - reads from file */
virtual const uint32_t readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t memSpace, const uint32_t reqBytes, uint8_t *byteBuffer);
virtual const uint32_t readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t memSpace, const uint8_t trcID, const uint32_t reqBytes, uint8_t *byteBuffer);
protected:
TrcMemAccessorFile(); /**< protected default constructor */

View File

@ -41,6 +41,7 @@
#include "interfaces/trc_tgt_mem_access_i.h"
#include "interfaces/trc_error_log_i.h"
#include "mem_acc/trc_mem_acc_base.h"
#include "mem_acc/trc_mem_acc_cache.h"
typedef enum _memacc_mapper_t {
MEMACC_MAP_GLOBAL,
@ -76,7 +77,7 @@ class TrcMemAccMapper : public ITargetMemAccess
ocsd_err_t RemoveAccessorByAddress(const ocsd_vaddr_t st_address, const ocsd_mem_space_acc_t mem_space, const uint8_t cs_trace_id = 0);
// set the error log.
void setErrorLog(ITraceErrorLog *err_log_i) { m_err_log = err_log_i; };
void setErrorLog(ITraceErrorLog *err_log_i);
// print out the ranges in this mapper.
virtual void logMappedRanges() = 0;
@ -89,11 +90,13 @@ class TrcMemAccMapper : public ITargetMemAccess
virtual void clearAccessorList() = 0;
void LogMessage(const std::string &msg);
void LogWarn(const ocsd_err_t err, const std::string &msg);
TrcMemAccessorBase *m_acc_curr; // most recently used - try this first.
uint8_t m_trace_id_curr; // trace ID for the current accessor
const bool m_using_trace_id; // true if we are using separate memory spaces by TraceID.
ITraceErrorLog *m_err_log; // error log to print out mappings on request.
TrcMemAccCache m_cache; // memory accessor caching.
};

View File

@ -37,6 +37,7 @@
/* select the library types that are C compatible - the interface data types */
#include "opencsd/ocsd_if_types.h"
#include "opencsd/ocsd_if_version.h"
#include "opencsd/trc_gen_elem_types.h"
#include "opencsd/trc_pkt_types.h"

View File

@ -84,7 +84,7 @@
/** @name Library Version API
@{*/
/** Get Library version. Return a 32 bit version in form MMMMnnpp - MMMM = major verison, nn = minor version, pp = patch version */
/** Get Library version. Return a 32 bit version in form MMMMnnpp - MMMM = major version, nn = minor version, pp = patch version */
OCSD_C_API uint32_t ocsd_get_version(void);
/** Get library version string */
@ -286,6 +286,23 @@ OCSD_C_API ocsd_err_t ocsd_dt_add_buffer_mem_acc(const dcd_tree_handle_t handle,
*/
OCSD_C_API ocsd_err_t ocsd_dt_add_callback_mem_acc(const dcd_tree_handle_t handle, const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAcc_CB p_cb_func, const void *p_context);
/*!
* Add a memory access callback function. The decoder will call the function for opcode addresses in the
* address range supplied for the memory spaces covered.
*
* @param handle : Handle to decode tree.
* @param st_address : Start address of memory area covered by the callback.
* @param en_address : End address of the memory area covered by the callback. (inclusive)
* @param mem_space : Memory space(s) covered by the callback.
* @param p_cb_func : Callback function - Signature for CB with Trace ID passed to client.
* @param p_context : opaque context pointer value used in callback function.
*
* @return OCSD_C_API ocsd_err_t : Library error code - RCDTL_OK if successful.
*/
OCSD_C_API ocsd_err_t ocsd_dt_add_callback_trcid_mem_acc(const dcd_tree_handle_t handle, const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAccID_CB p_cb_func, const void *p_context);
/*!
* Remove a memory accessor by address and memory space.
*

View File

@ -108,6 +108,7 @@ class EtmV4Config : public CSConfig // public ocsd_etmv4_cfg
/* idr 1 */
const uint8_t MajVersion() const;
const uint8_t MinVersion() const;
const uint8_t FullVersion() const;
/* idr 2 */
const uint32_t iaSizeMax() const;
@ -117,6 +118,7 @@ class EtmV4Config : public CSConfig // public ocsd_etmv4_cfg
const uint32_t dvSize() const;
const uint32_t ccSize() const;
const bool vmidOpt() const;
const bool wfiwfeBranch() const;
/* id regs 8-13*/
const uint32_t MaxSpecDepth() const;
@ -180,7 +182,11 @@ class EtmV4Config : public CSConfig // public ocsd_etmv4_cfg
bool m_condTraceCalc;
CondITrace_t m_CondTrace;
protected:
ocsd_etmv4_cfg m_cfg;
uint8_t m_MajVer;
uint8_t m_MinVer;
};
/* idr 0 */
@ -265,14 +271,18 @@ inline const bool EtmV4Config::commitOpt1() const
/* idr 1 */
inline const uint8_t EtmV4Config::MajVersion() const
{
return (uint8_t)((m_cfg.reg_idr1 >> 8) & 0xF);
return m_MajVer;
}
inline const uint8_t EtmV4Config::MinVersion() const
{
return (uint8_t)((m_cfg.reg_idr1 >> 4) & 0xF);
return m_MinVer;
}
inline const uint8_t EtmV4Config::FullVersion() const
{
return (m_MajVer << 4) | m_MinVer;
}
/* idr 2 */
inline const uint32_t EtmV4Config::iaSizeMax() const
@ -320,6 +330,12 @@ inline const bool EtmV4Config::vmidOpt() const
return (bool)((m_cfg.reg_idr2 & 0x20000000) == 0x20000000) && (MinVersion() > 0);
}
inline const bool EtmV4Config::wfiwfeBranch() const
{
return (bool)((m_cfg.reg_idr2 & 0x80000000) && (FullVersion() >= 0x43));
}
/* id regs 8-13*/
inline const uint32_t EtmV4Config::MaxSpecDepth() const

View File

@ -56,7 +56,8 @@ typedef enum _p0_elem_t
P0_TS,
P0_CC,
P0_TS_CC,
P0_OVERFLOW
P0_OVERFLOW,
P0_FUNC_RET,
} p0_elem_t;
@ -250,6 +251,7 @@ class EtmV4P0Stack
~EtmV4P0Stack();
void push_front(TrcStackElem *pElem);
void push_back(TrcStackElem *pElem); // insert element when processing
void pop_back();
TrcStackElem *back();
size_t size();
@ -260,7 +262,7 @@ class EtmV4P0Stack
// creation functions - create and push if successful.
TrcStackElemParam *createParamElem(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const std::vector<uint32_t> &params);
TrcStackElemParam *createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index);
TrcStackElem *createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, bool back = false);
TrcStackElemAtom *createAtomElem (const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const ocsd_pkt_atom &atom);
TrcStackElemExcept *createExceptElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const bool bSame, const uint16_t excepNum);
TrcStackElemCtxt *createContextElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_context_t &context);
@ -284,6 +286,12 @@ inline void EtmV4P0Stack::push_front(TrcStackElem *pElem)
m_P0_stack.push_front(pElem);
}
// put an element on the back of the stack
inline void EtmV4P0Stack::push_back(TrcStackElem *pElem)
{
m_P0_stack.push_back(pElem);
}
// pop last element pointer off the stack and stash it for later deletion
inline void EtmV4P0Stack::pop_back()
{

View File

@ -93,6 +93,8 @@ class TrcPktDecodeEtmV4I : public TrcPktDecodeBase<EtmV4ITrcPacket, EtmV4Config>
ocsd_datapath_resp_t returnStackPop(); // pop return stack and update instruction address.
ocsd_datapath_resp_t outputTraceRange(const bool executed, ocsd_trc_index_t index);
//** intra packet state (see ETMv4 spec 6.2.1);
// timestamping
@ -152,12 +154,17 @@ class TrcPktDecodeEtmV4I : public TrcPktDecodeBase<EtmV4ITrcPacket, EtmV4Config>
EXCEP_POP, // start of processing read exception packets off the stack and analyze
EXCEP_RANGE, // output a range element
EXCEP_NACC, // output a nacc element
EXCEP_CTXT, // output a ctxt element
EXCEP_EXCEP, // output an ecxeption element.
} excep_proc_state_t;
excep_proc_state_t m_excep_proc; //!< state of exception processing
etmv4_addr_val_t m_excep_addr; //!< excepiton return address.
ocsd_trc_index_t m_excep_index; //!< trace index for exception element
struct {
excep_proc_state_t proc; //!< state of exception processing
etmv4_addr_val_t addr; //!< excetion return address.
uint32_t number; //!< exception number.
ocsd_trc_index_t index; //!< trace index for exception element
bool addr_b_tgt; //!< return address is also branch tgt address.
} m_excep_info; //!< exception info when processing exception packets
ocsd_instr_info m_instr_info; //!< instruction info for code follower - in address is the next to be decoded.

View File

@ -115,7 +115,7 @@ class EtmV4ITrcPacket : public TrcPacketBase, public ocsd_etmv4_i_pkt, public t
void initNextPacket(); //!< clear any single packet only flags / state.
void setType(const ocsd_etmv4_i_pkt_type pkt_type) { type = pkt_type; };
void updateErrType(const ocsd_etmv4_i_pkt_type err_pkt_type);
void updateErrType(const ocsd_etmv4_i_pkt_type err_pkt_type, const uint8_t val = 0);
void clearTraceInfo(); //!< clear all the trace info data prior to setting for new trace info packet.
void setTraceInfo(const uint32_t infoVal);
@ -208,11 +208,12 @@ class EtmV4ITrcPacket : public TrcPacketBase, public ocsd_etmv4_i_pkt, public t
Etmv4PktAddrStack m_addr_stack;
};
inline void EtmV4ITrcPacket::updateErrType(const ocsd_etmv4_i_pkt_type err_pkt_type)
inline void EtmV4ITrcPacket::updateErrType(const ocsd_etmv4_i_pkt_type err_pkt_type, const uint8_t err_val /* = 0 */)
{
// set primary type to incoming error type, set packet err type to previous primary type.
err_type = type;
type = err_pkt_type;
err_hdr_val = err_val;
}
inline void EtmV4ITrcPacket::clearTraceInfo()
@ -223,7 +224,9 @@ inline void EtmV4ITrcPacket::clearTraceInfo()
pkt_valid.bits.spec_depth_valid = 0;
pkt_valid.bits.cc_thresh_valid = 0;
pkt_valid.bits.ts_valid = 0; // mark TS as invalid - must be re-updated after trace info.
// set these as defaults - if they don't appear in TINFO this is the state.
setTraceInfo(0);
setTraceInfoSpec(0);
}
inline void EtmV4ITrcPacket::setTraceInfo(const uint32_t infoVal)
@ -444,18 +447,20 @@ inline void EtmV4ITrcPacket::set32BitAddress(const uint32_t addr, const uint8_t
uint64_t mask = OCSD_BIT_MASK(32);
v_addr.pkt_bits = 32;
if (pkt_valid.bits.context_valid && context.SF)
v_addr.size = VA_64BIT;
if (pkt_valid.bits.context_valid && context.SF)
{
v_addr.size = VA_64BIT;
if (v_addr.valid_bits < 32) // may be updating a 64 bit address so only set 32 if currently less.
v_addr.valid_bits = 32;
v_addr.val = (v_addr.val & ~mask) | (addr & mask);
}
else
{
v_addr.val &= 0xFFFFFFFF; // ensure vaddr is only 32 bits if not 64 bit
v_addr.val = addr;
v_addr.size = VA_32BIT;
}
if (v_addr.valid_bits < 32) // may be 64 bit address so only set 32 if less
v_addr.valid_bits = 32;
v_addr.val = (v_addr.val & ~mask) | (addr & mask);
v_addr.valid_bits = 32;
}
v_addr_ISA = IS;
push_vaddr();
}

View File

@ -1,8 +1,8 @@
/*
* \file trc_pkt_types_etmv4.h
* \brief OpenCSD :
* \brief OpenCSD : ETMv4 packet info
*
* \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
* \copyright Copyright (c) 2015,2019 ARM Limited. All Rights Reserved.
*/
@ -56,80 +56,95 @@ typedef enum _ocsd_etmv4_i_pkt_type
ETM4_PKT_I_BAD_SEQUENCE = 0x300, /*!< invalid sequence for packet type. */
ETM4_PKT_I_BAD_TRACEMODE, /*!< invalid packet type for this trace mode. */
ETM4_PKT_I_RESERVED, /*!< packet type reserved. */
ETM4_PKT_I_RESERVED_CFG, /*!< packet type reserved for current configuration */
/* I stream packet types. */
/* extension header. */
ETM4_PKT_I_EXTENSION = 0x00, /*!< b00000000 */
ETM4_PKT_I_EXTENSION = 0x00, /*!< b00000000 */
/* address amd context */
ETM4_PKT_I_ADDR_CTXT_L_32IS0 = 0x82, /*!< b10000010 */
/* sync */
ETM4_PKT_I_TRACE_INFO = 0x01, /*!< b00000001 */
// timestamp
ETM4_PKT_I_TIMESTAMP = 0x02, /*!< b0000001x */
ETM4_PKT_I_TRACE_ON = 0x04, /*!< b00000100 */
ETM4_PKT_I_FUNC_RET = 0x05, /*!< b00000101 (V8M only) */
// Exceptions
ETM4_PKT_I_EXCEPT = 0x06, /*!< b00000110 */
ETM4_PKT_I_EXCEPT_RTN = 0x07, /*!< b00000111 */
/* unused encodings 0x08-0xB b00001000 to b00001011 */
/* cycle count packets */
ETM4_PKT_I_CCNT_F2 = 0x0C, /*!< b0000110x */
ETM4_PKT_I_CCNT_F1 = 0x0E, /*!< b0000111x */
ETM4_PKT_I_CCNT_F3 = 0x10, /*!< b0001xxxx */
// data synchronisation markers
ETM4_PKT_I_NUM_DS_MKR = 0x20, /*!< b00100xxx */
ETM4_PKT_I_UNNUM_DS_MKR = 0x28, /*!< b00101000 to b00101100 0x2C */
// speculation
ETM4_PKT_I_COMMIT = 0x2D, /*!< b00101101 */
ETM4_PKT_I_CANCEL_F1 = 0x2E, /*!< b0010111x */
ETM4_PKT_I_MISPREDICT = 0x30, /*!< b001100xx */
ETM4_PKT_I_CANCEL_F2 = 0x34, /*!< b001101xx */
ETM4_PKT_I_CANCEL_F3 = 0x38, /*!< b00111xxx */
/* conditional instruction tracing */
ETM4_PKT_I_COND_I_F2 = 0x40, /*!< b01000000 - b01000010 */
ETM4_PKT_I_COND_FLUSH = 0x43, /*!< b01000011 */
ETM4_PKT_I_COND_RES_F4 = 0x44, /*!< b0100010x, b01000110 */
/* unused encoding 0x47 b01000111 */
ETM4_PKT_I_COND_RES_F2 = 0x48, /*!< b0100100x, b01001010, b0100110x, b01001110 */
/* unused encodings 0x4B,0x4F b01001011, b01001111 */
ETM4_PKT_I_COND_RES_F3 = 0x50, /*!< b0101xxxx */
/* unused encodings 0x60-0x67 b01100xxx */
ETM4_PKT_I_COND_RES_F1 = 0x68, /*!< b011010xx, b0110111x 0x68-0x6B, 0x6e-0x6F */
ETM4_PKT_I_COND_I_F1 = 0x6C, /*!< b01101100 */
ETM4_PKT_I_COND_I_F3 = 0x6D, /*!< b01101101 */
// event trace
ETM4_PKT_I_IGNORE = 0x70, /*!< b01110000 */
ETM4_PKT_I_EVENT = 0x71, /*!< b01110001 to 0x01111111 0x7F */
/* address and context */
ETM4_PKT_I_CTXT = 0x80, /*!< b1000000x */
ETM4_PKT_I_ADDR_CTXT_L_32IS0 = 0x82, /*!< b10000010 */
ETM4_PKT_I_ADDR_CTXT_L_32IS1, /*!< b10000011 */
/* unused encoding b10000100 */
ETM4_PKT_I_ADDR_CTXT_L_64IS0 = 0x85, /*!< b10000101 */
/* unused encoding 0x84 b10000100 */
ETM4_PKT_I_ADDR_CTXT_L_64IS0 = 0x85, /*!< b10000101 */
ETM4_PKT_I_ADDR_CTXT_L_64IS1, /*!< b10000110 */
/* unused encoding b10000111 */
ETM4_PKT_I_CTXT = 0x80, /*!< b1000000x */
ETM4_PKT_I_ADDR_MATCH = 0x90, /*!< b10010000 to b10010010 */
ETM4_PKT_I_ADDR_L_32IS0 = 0x9A, /*!< b10011010 */
ETM4_PKT_I_ADDR_L_32IS1, /*!< b10011011 */
/* unused encoding b10011100 */
ETM4_PKT_I_ADDR_L_64IS0 = 0x9D, /*!< b10011101 */
ETM4_PKT_I_ADDR_L_64IS1, /*!< b10011110 */
/* unused encoding b10011111 */
ETM4_PKT_I_ADDR_S_IS0 = 0x95, /*!< b10010101 */
/* unused encoding 0x87 b10000111 */
/* unused encodings 0x88-0x8F b10001xxx */
ETM4_PKT_I_ADDR_MATCH = 0x90, /*!< b10010000 to b10010010 0x92 */
/* unused encodings 0x93-0x94 b10010011 to b10010010 */
ETM4_PKT_I_ADDR_S_IS0 = 0x95, /*!< b10010101 */
ETM4_PKT_I_ADDR_S_IS1, /*!< b10010110 */
/* unused encoding b10010111
unused encoding b10011000
unused encoding b10011001 */
/* unused encodings 0x97 b10010111 to b10011001 0x99 */
ETM4_PKT_I_ADDR_L_32IS0 = 0x9A, /*!< b10011010 */
ETM4_PKT_I_ADDR_L_32IS1, /*!< b10011011 */
/* unused encoding 0x9C b10011100 */
ETM4_PKT_I_ADDR_L_64IS0 = 0x9D, /*!< b10011101 */
ETM4_PKT_I_ADDR_L_64IS1, /*!< b10011110 */
/* unused encoding 0x9F b10011111 */
/* Q packets */
ETM4_PKT_I_Q = 0xA0, /*!< b1010xxxx */
/* unused encodings 0xB0-0xBF b1011xxxx */
/* Atom packets */
ETM4_PKT_I_ATOM_F1 = 0xF6, /*!< b1111011x */
ETM4_PKT_I_ATOM_F2 = 0xD8, /*!< b110110xx */
ETM4_PKT_I_ATOM_F3 = 0xF8, //!< b11111xxx
ETM4_PKT_I_ATOM_F4 = 0xDC, //!< b110111xx
ETM4_PKT_I_ATOM_F5 = 0xD5, //!< b11010101 - b11010111, b11110101
ETM4_PKT_I_ATOM_F6 = 0xC0, //!< b11000000 - b11010100, b11100000 - b11110100
ETM4_PKT_I_ATOM_F6 = 0xC0, /*!< b11000000 - b11010100 0xC0 - 0xD4, b11100000 - b11110100 0xE0 - 0xF4 */
ETM4_PKT_I_ATOM_F5 = 0xD5, /*!< b11010101 - b11010111 0xD5 - 0xD7, b11110101 0xF5 */
ETM4_PKT_I_ATOM_F2 = 0xD8, /*!< b110110xx to 0xDB */
ETM4_PKT_I_ATOM_F4 = 0xDC, /*!< b110111xx to 0xDF */
ETM4_PKT_I_ATOM_F1 = 0xF6, /*!< b1111011x to 0xF7 */
ETM4_PKT_I_ATOM_F3 = 0xF8, /*!< b11111xxx to 0xFF */
/* conditional instruction tracing */
ETM4_PKT_I_COND_FLUSH = 0x43, //!< b01000011
ETM4_PKT_I_COND_I_F1 = 0x6C, //!< b01101100
ETM4_PKT_I_COND_I_F2 = 0x40, //!< b01000000 - b01000010
ETM4_PKT_I_COND_I_F3 = 0x6D, //!< b01101101
ETM4_PKT_I_COND_RES_F1 = 0x68, //!< b0110111x, b011010xx
ETM4_PKT_I_COND_RES_F2 = 0x48, //!< b0100100x, b01001010, b0100110x, b01001110
ETM4_PKT_I_COND_RES_F3 = 0x50, //!< b0101xxxx
ETM4_PKT_I_COND_RES_F4 = 0x44, //!< b0100010x, b01000110
/* cycle count packets */
ETM4_PKT_I_CCNT_F1 = 0x0E, //!< b0000111x
ETM4_PKT_I_CCNT_F2 = 0x0C, //!< b0000110x
ETM4_PKT_I_CCNT_F3 = 0x10, //!< b0001xxxx
// data synchronisation markers
ETM4_PKT_I_NUM_DS_MKR = 0x20, //!< b00100xxx
ETM4_PKT_I_UNNUM_DS_MKR = 0x28, //!< b00101000 - b00101100
// event trace
ETM4_PKT_I_EVENT = 0x70, //!< b0111xxxx
// Exceptions
ETM4_PKT_I_EXCEPT = 0x06, //!< b00000110
ETM4_PKT_I_EXCEPT_RTN = 0x07, //!< b00000111
// timestamp
ETM4_PKT_I_TIMESTAMP = 0x02, //!< b0000001x
// speculation
ETM4_PKT_I_CANCEL_F1 = 0x2E, //!< b0010111x
ETM4_PKT_I_CANCEL_F2 = 0x34, //!< b001101xx
ETM4_PKT_I_CANCEL_F3 = 0x38, //!< b00111xxx
ETM4_PKT_I_COMMIT = 0x2D, //!< b00101101
ETM4_PKT_I_MISPREDICT = 0x30, //!< b001100xx
// Sync
ETM4_PKT_I_TRACE_INFO = 0x01, //!< b00000001
ETM4_PKT_I_TRACE_ON = 0x04, //!< b00000100
// extension packets - follow 0x00 header
ETM4_PKT_I_ASYNC = 0x100, //!< b00000000
ETM4_PKT_I_DISCARD = 0x103, //!< b00000011
ETM4_PKT_I_OVERFLOW = 0x105 //!< b00000101
ETM4_PKT_I_OVERFLOW = 0x105, //!< b00000101
} ocsd_etmv4_i_pkt_type;
@ -139,7 +154,7 @@ typedef union _etmv4_trace_info_t {
uint32_t cc_enabled:1; //!< 1 if cycle count enabled
uint32_t cond_enabled:3; //!< conditional trace enabeld type
uint32_t p0_load:1; //!< 1 if tracing with P0 load elements (for data trace)
uint32_t p0_store:1; //1< 1 if tracing with P0 store elements (for data trace)
uint32_t p0_store:1; //!< 1 if tracing with P0 store elements (for data trace)
} bits; //!< bitfields for trace info value.
} etmv4_trace_info_t;
@ -259,6 +274,7 @@ typedef struct _ocsd_etmv4_i_pkt
// original header type when packet type changed to error on decode error.
ocsd_etmv4_i_pkt_type err_type;
uint8_t err_hdr_val;
} ocsd_etmv4_i_pkt;
@ -342,6 +358,7 @@ typedef struct _ocsd_etmv4_cfg
ocsd_core_profile_t core_prof; /**< Core Profile */
} ocsd_etmv4_cfg;
/** @}*/
/** @}*/
#endif // ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED

View File

@ -107,6 +107,7 @@ typedef enum _ocsd_err_t {
OCSD_ERR_DATA_DECODE_FATAL, /**< A decoder in the data path has returned a fatal error. */
/* frame deformatter errors */
OCSD_ERR_DFMTR_NOTCONTTRACE, /**< Trace input to deformatter none-continuous */
OCSD_ERR_DFMTR_BAD_FHSYNC, /**< Bad frame or half frame sync in trace deformatter */
/* packet processor errors - protocol issues etc */
OCSD_ERR_BAD_PACKET_SEQ, /**< Bad packet sequence */
OCSD_ERR_INVALID_PCKT_HDR, /**< Invalid packet header */
@ -126,6 +127,7 @@ typedef enum _ocsd_err_t {
OCSD_ERR_MEM_ACC_FILE_NOT_FOUND, /**< Memory access file could not be opened */
OCSD_ERR_MEM_ACC_FILE_DIFF_RANGE, /**< Attempt to re-use the same memory access file for a different address range */
OCSD_ERR_MEM_ACC_RANGE_INVALID, /**< Address range in accessor set to invalid values */
OCSD_ERR_MEM_ACC_BAD_LEN, /**< Memory accessor returned a bad read length value (larger than requested */
/* test errors - errors generated only by the test code, not the library */
OCSD_ERR_TEST_SNAPSHOT_PARSE, /**< test snapshot file parse error */
OCSD_ERR_TEST_SNAPSHOT_PARSE_INFO, /**< test snapshot file parse information */
@ -137,7 +139,7 @@ typedef enum _ocsd_err_t {
OCSD_ERR_DCDREG_TYPE_UNKNOWN, /**< attempted to find a decoder with a type that is not known in the library */
OCSD_ERR_DCDREG_TOOMANY, /**< attempted to register too many custom decoders */
/* decoder config */
OCSD_ERR_DCD_INTERFACE_UNUSED, /**< Attempt to connect or use and inteface not supported by this decoder. */
OCSD_ERR_DCD_INTERFACE_UNUSED, /**< Attempt to connect or use and interface not supported by this decoder. */
/* end marker*/
OCSD_ERR_LAST
} ocsd_err_t;
@ -272,11 +274,16 @@ typedef enum _ocsd_dcd_tree_src_t {
/** Core Architecture Version */
typedef enum _ocsd_arch_version {
ARCH_UNKNOWN, /**< unknown architecture */
ARCH_CUSTOM, /**< None ARM, custom architecture */
ARCH_V7, /**< V7 architecture */
ARCH_V8, /**< V8 architecture */
ARCH_CUSTOM, /**< None ARM, custom architecture */
ARCH_V8r3, /**< V8.3 architecture */
} ocsd_arch_version_t;
// macros for arch version comparisons.
#define OCSD_IS_V8_ARCH(arch) ((arch >= ARCH_V8) && (arch <= ARCH_V8r3))
#define OCSD_MIN_V8_ARCH(arch) (arch >= ARCH_V8)
/** Core Profile */
typedef enum _ocsd_core_profile {
profile_Unknown, /**< Unknown profile */
@ -351,7 +358,8 @@ typedef enum _ocsd_instr_type {
OCSD_INSTR_BR, /**< Immediate Branch instruction */
OCSD_INSTR_BR_INDIRECT, /**< Indirect Branch instruction */
OCSD_INSTR_ISB, /**< Barrier : ISB instruction */
OCSD_INSTR_DSB_DMB /**< Barrier : DSB or DMB instruction */
OCSD_INSTR_DSB_DMB, /**< Barrier : DSB or DMB instruction */
OCSD_INSTR_WFI_WFE, /**< WFI or WFE traced as direct branch */
} ocsd_instr_type;
/** instruction sub types - addiitonal information passed to the output packets
@ -362,6 +370,7 @@ typedef enum _ocsd_instr_subtype {
OCSD_S_INSTR_BR_LINK, /**< branch with link */
OCSD_S_INSTR_V8_RET, /**< v8 ret instruction - subtype of BR_INDIRECT */
OCSD_S_INSTR_V8_ERET, /**< v8 eret instruction - subtype of BR_INDIRECT */
OCSD_S_INSTR_V7_IMPLIED_RET, /**< v7 instruction which could imply return e.g. MOV PC, LR; POP { ,pc} */
} ocsd_instr_subtype;
/** Instruction decode request structure.
@ -377,6 +386,7 @@ typedef struct _ocsd_instr_info {
ocsd_vaddr_t instr_addr; /**< Input: Instruction address. */
uint32_t opcode; /**< Input: Opcode at address. 16 bit opcodes will use MS 16bits of parameter. */
uint8_t dsb_dmb_waypoints; /**< Input: DMB and DSB are waypoints */
uint8_t wfi_wfe_branch; /**< Input: WFI, WFE classed as direct branches */
/* instruction decode info */
ocsd_instr_type type; /**< Decoder: Current instruction type. */
@ -446,7 +456,31 @@ typedef enum _ocsd_mem_space_acc_t {
*
* @return uint32_t : Number of bytes actually read, or 0 for access error.
*/
typedef uint32_t (* Fn_MemAcc_CB)(const void *p_context, const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint32_t reqBytes, uint8_t *byteBuffer);
typedef uint32_t (* Fn_MemAcc_CB)(const void *p_context, const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint32_t reqBytes, uint8_t *byteBuffer);
/**
* Callback function definition for callback function memory accessor type.
*
* When using callback memory accessor, the decoder will call this function to obtain the
* memory at the address for the current opcodes. The memory space will represent the current
* exception level and security context of the traced code.
*
* Return the number of bytes read, which can be less than the amount requested if this would take the
* access address outside the range of addresses defined when this callback was registered with the decoder.
*
* Return 0 bytes if start address out of covered range, or memory space is not one of those defined as supported
* when the callback was registered.
*
* @param p_context : opaque context pointer set by callback client.
* @param address : start address of memory to be accessed
* @param mem_space : memory space of accessed memory (current EL & security state)
* @param trcID : Trace ID for source of trace - allow CB to client to associate mem req with source cpu.
* @param reqBytes : number of bytes required
* @param *byteBuffer : buffer for data.
*
* @return uint32_t : Number of bytes actually read, or 0 for access error.
*/
typedef uint32_t (* Fn_MemAccID_CB)(const void *p_context, const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint8_t trcID, const uint32_t reqBytes, uint8_t *byteBuffer);
/** memory region type for adding multi-region binary files to memory access interface */

View File

@ -0,0 +1,65 @@
/*
* \file ocsd_if_version.h
* \brief OpenCSD : Library API versioning
*
* \copyright Copyright (c) 2016, ARM Limited. All Rights Reserved.
*/
/*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef ARM_OCSD_IF_VERSION_H_INCLUDED
#define ARM_OCSD_IF_VERSION_H_INCLUDED
#include <stdint.h>
/** @addtogroup ocsd_interfaces
@{*/
/** @name Library Versioning
@{*/
#define OCSD_VER_MAJOR 0x0 /**< Library Major Version */
#define OCSD_VER_MINOR 0xC /**< Library Minor Version */
#define OCSD_VER_PATCH 0x0 /**< Library Patch Version */
/** Library version number - MMMMnnpp format.
MMMM = major version,
nn = minor version,
pp = patch version
*/
#define OCSD_VER_NUM ((OCSD_VER_MAJOR << 16) | (OCSD_VER_MINOR << 8) | OCSD_VER_PATCH)
#define OCSD_VER_STRING "0.12.0" /**< Library Version string */
#define OCSD_LIB_NAME "OpenCSD Library" /**< Library name string */
#define OCSD_LIB_SHORT_NAME "OCSD" /**< Library Short name string */
/** @}*/
/** @}*/
#endif // ARM_OCSD_IF_VERSION_H_INCLUDED
/* End of File ocsd_if_version.h */

View File

@ -58,7 +58,7 @@ typedef enum _ocsd_gen_trc_elem_t
OCSD_GEN_TRC_ELEM_EXCEPTION_RET, /*!< expection return */
OCSD_GEN_TRC_ELEM_TIMESTAMP, /*!< Timestamp - preceding elements happeded before this time. */
OCSD_GEN_TRC_ELEM_CYCLE_COUNT, /*!< Cycle count - cycles since last cycle count value - associated with a preceding instruction range. */
OCSD_GEN_TRC_ELEM_EVENT, /*!< Event - trigger, (TBC - perhaps have a set of event types - cut down additional processing?) */
OCSD_GEN_TRC_ELEM_EVENT, /*!< Event - trigger or numbered event */
OCSD_GEN_TRC_ELEM_SWTRACE, /*!< Software trace packet - may contain data payload. */
OCSD_GEN_TRC_ELEM_CUSTOM, /*!< Fully custom packet type - used by none-ARM architecture decoders */
} ocsd_gen_trc_elem_t;
@ -90,12 +90,15 @@ typedef struct _ocsd_generic_trace_elem {
union {
struct {
uint32_t last_instr_exec:1; /**< 1 if last instruction in range was executed; */
uint32_t last_instr_sz:3; /**< size of last instruction in bytes (2/4) */
uint32_t has_cc:1; /**< 1 if this packet has a valid cycle count included (e.g. cycle count included as part of instruction range packet, always 1 for pure cycle count packet.*/
uint32_t cpu_freq_change:1; /**< 1 if this packet indicates a change in CPU frequency */
uint32_t excep_ret_addr:1; /**< 1 if en_addr is the preferred exception return address on exception packet type */
uint32_t excep_data_marker:1; /**< 1 if the exception entry packet is a data push marker only, with no address information (used typically in v7M trace for marking data pushed onto stack) */
uint32_t extended_data:1; /**< 1 if the packet extended data pointer is valid. Allows packet extensions for custom decoders, or additional data payloads for data trace. */
uint32_t has_ts:1; /**< 1 if the packet has an associated timestamp - e.g. SW/STM trace TS+Payload as a single packet */
uint32_t last_instr_cond:1; /**< 1 if the last instruction was conditional */
uint32_t excep_ret_addr_br_tgt:1; /**< 1 if exception return address (en_addr) is also the target of a taken branch addr from the previous range. */
};
uint32_t flag_bits;
};
@ -105,7 +108,8 @@ typedef struct _ocsd_generic_trace_elem {
uint32_t exception_number; /**< exception number for exception type packets */
trace_event_t trace_event; /**< Trace event - trigger etc */
trace_on_reason_t trace_on_reason; /**< reason for the trace on packet */
ocsd_swt_info_t sw_trace_info; /**< software trace packet info */
ocsd_swt_info_t sw_trace_info; /**< software trace packet info */
uint32_t num_instr_range; /**< number of instructions covered by range packet (for T32 this cannot be calculated from en-st/i_size) */
};
const void *ptr_extended_data; /**< pointer to extended data buffer (data trace, sw trace payload) / custom structure */

View File

@ -39,7 +39,7 @@
#include <string>
#include <sstream>
#include <iostream>
//#include <iostream>
#include <iomanip>
template<class P>

View File

@ -74,7 +74,7 @@ static std::map<dcd_tree_handle_t, lib_dt_data_list *> s_data_map;
/* C API functions */
/*******************************************************************************/
/** Get Library version. Return a 32 bit version in form MMMMnnpp - MMMM = major verison, nn = minor version, pp = patch version */
/** Get Library version. Return a 32 bit version in form MMMMnnpp - MMMM = major version, nn = minor version, pp = patch version */
OCSD_C_API uint32_t ocsd_get_version(void)
{
return ocsdVersion::vers_num();
@ -404,6 +404,17 @@ OCSD_C_API ocsd_err_t ocsd_dt_add_callback_mem_acc(const dcd_tree_handle_t handl
return err;
}
OCSD_C_API ocsd_err_t ocsd_dt_add_callback_trcid_mem_acc(const dcd_tree_handle_t handle, const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAccID_CB p_cb_func, const void *p_context)
{
ocsd_err_t err = OCSD_OK;
DecodeTree *pDT;
err = ocsd_check_and_add_mem_acc_mapper(handle, &pDT);
if (err == OCSD_OK)
err = pDT->addCallbackIDMemAcc(st_address, en_address, mem_space, p_cb_func, p_context);
return err;
}
OCSD_C_API ocsd_err_t ocsd_dt_remove_mem_acc(const dcd_tree_handle_t handle, const ocsd_vaddr_t st_address, const ocsd_mem_space_acc_t mem_space)
{
ocsd_err_t err = OCSD_OK;

View File

@ -598,7 +598,8 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV3::processPHdr()
pElem->setAddrRange(m_IAddr,m_code_follower.getRangeEn());
pElem->setLastInstrInfo(atoms.getCurrAtomVal() == ATOM_E,
m_code_follower.getInstrType(),
m_code_follower.getInstrSubType());
m_code_follower.getInstrSubType(),m_code_follower.getInstrSize());
pElem->setLastInstrCond(m_code_follower.isCondInstr());
pElem->setISA(isa);
if(m_code_follower.hasNextAddr())
m_IAddr = m_code_follower.getNextAddr();

View File

@ -75,6 +75,8 @@ void EtmV4Config::PrivateInit()
m_VMIDSize = 0;
m_condTraceCalc = false;
m_CondTrace = COND_TR_DIS;
m_MajVer = (uint8_t)((m_cfg.reg_idr1 >> 8) & 0xF);
m_MinVer = (uint8_t)((m_cfg.reg_idr1 >> 4) & 0xF);
}
void EtmV4Config::CalcQSupp()

View File

@ -36,11 +36,17 @@
#include "opencsd/etmv4/trc_etmv4_stack_elem.h"
/* implementation of P0 element stack in ETM v4 trace*/
TrcStackElemParam *EtmV4P0Stack::createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index)
TrcStackElem *EtmV4P0Stack::createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, bool back /*= false*/)
{
std::vector<uint32_t> params;
params.clear();
return createParamElem(p0_type, isP0, root_pkt, root_index, params);
TrcStackElem *pElem = new (std::nothrow) TrcStackElem(p0_type, isP0, root_pkt, root_index);
if (pElem)
{
if (back)
push_back(pElem);
else
push_front(pElem);
}
return pElem;
}
TrcStackElemParam *EtmV4P0Stack::createParamElem(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const std::vector<uint32_t> &params)

View File

@ -128,7 +128,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::onFlush()
ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
// continue exception processing (can't go through processPacket as elements no longer on stack)
if(m_excep_proc != EXCEP_POP)
if(m_excep_info.proc != EXCEP_POP)
resp = processException();
// continue ongoing output operations on comitted elements.
else if(m_curr_state == COMMIT_ELEM)
@ -151,6 +151,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::onProtocolConfig()
// set up static trace instruction decode elements
m_instr_info.dsb_dmb_waypoints = 0;
m_instr_info.wfi_wfe_branch = m_config->wfiwfeBranch() ? 1 : 0;
m_instr_info.pe_type.arch = m_config->archVersion();
m_instr_info.pe_type.profile = m_config->coreProfile();
@ -233,7 +234,7 @@ void TrcPktDecodeEtmV4I::resetDecoder()
m_prev_overflow = false;
m_P0_stack.delete_all();
m_output_elem.init();
m_excep_proc = EXCEP_POP;
m_excep_info.proc = EXCEP_POP;
m_flush_EOT = false;
}
@ -250,6 +251,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete)
switch(m_curr_packet_in->getType())
{
case ETM4_PKT_I_ASYNC: // nothing to do with this packet.
case ETM4_PKT_I_IGNORE: // or this one.
break;
case ETM4_PKT_I_TRACE_INFO:
@ -350,6 +352,21 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete)
bool bV7MProfile = (m_config->archVersion() == ARCH_V7) && (m_config->coreProfile() == profile_CortexM);
if (m_P0_stack.createParamElemNoParam(P0_EXCEP_RET, bV7MProfile, m_curr_packet_in->getType(), m_index_curr_pkt) == 0)
bAllocErr = true;
else if (bV7MProfile)
m_curr_spec_depth++;
}
break;
case ETM4_PKT_I_FUNC_RET:
{
// P0 element iff V8M profile, otherwise ignore
if (OCSD_IS_V8_ARCH(m_config->archVersion()) && (m_config->coreProfile() == profile_CortexM))
{
if (m_P0_stack.createParamElemNoParam(P0_FUNC_RET, true, m_curr_packet_in->getType(), m_index_curr_pkt) == 0)
bAllocErr = true;
else
m_curr_spec_depth++;
}
}
break;
@ -371,7 +388,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete)
{
std::vector<uint32_t> params = { 0 };
params[0] = m_curr_packet_in->getCC();
if (m_P0_stack.createParamElem(P0_EVENT, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0)
if (m_P0_stack.createParamElem(P0_CC, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0)
bAllocErr = true;
}
@ -387,7 +404,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete)
params[1] = (uint32_t)((ts >> 32) & 0xFFFFFFFF);
if (bTSwithCC)
params[2] = m_curr_packet_in->getCC();
if (m_P0_stack.createParamElem(P0_EVENT, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0)
if (m_P0_stack.createParamElem(bTSwithCC ? P0_TS_CC : P0_TS, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0)
bAllocErr = true;
}
@ -490,6 +507,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete)
bool bPause = false; // pause commit operation
bool bPopElem = true; // do we remove the element from the stack (multi atom elements may need to stay!)
int num_commit_req = m_P0_commit;
ocsd_trc_index_t err_idx = 0;
Complete = true; // assume we exit due to completion of commit operation
@ -500,8 +518,9 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete)
if(m_P0_stack.size() > 0)
{
pElem = m_P0_stack.back(); // get oldest element
switch(pElem->getP0Type())
err_idx = pElem->getRootIndex(); // save index in case of error.
switch (pElem->getP0Type())
{
// indicates a trace restart - beginning of trace or discontinuiuty
case P0_TRC_ON:
@ -612,7 +631,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete)
if ((resp = returnStackPop()) != OCSD_RESP_CONT)
break;
m_excep_proc = EXCEP_POP; // set state in case we need to stop part way through
m_excep_info.proc = EXCEP_POP; // set state in case we need to stop part way through
resp = processException(); // output trace + exception elements.
m_P0_commit--;
break;
@ -623,6 +642,13 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete)
if(pElem->isP0()) // are we on a core that counts ERET as P0?
m_P0_commit--;
break;
case P0_FUNC_RET:
// func ret is V8M - data trace only - hint that data has been popped off the stack.
// at this point nothing to do till the decoder starts handling data trace.
if (pElem->isP0())
m_P0_commit--;
break;
}
if(bPopElem)
@ -637,10 +663,6 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete)
else
{
// too few elements for commit operation - decode error.
ocsd_trc_index_t err_idx = 0;
if(pElem)
err_idx = pElem->getRootIndex();
resp = OCSD_RESP_FATAL_INVALID_DATA;
LogError(ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_COMMIT_PKT_OVERRUN,err_idx,m_CSID,"Not enough elements to commit"));
bPause = true;
@ -757,7 +779,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::flushEOT()
ocsd_datapath_resp_t TrcPktDecodeEtmV4I::outputCC(TrcStackElemParam *pParamElem)
{
m_output_elem.setType(OCSD_GEN_TRC_ELEM_CYCLE_COUNT);
m_output_elem.cycle_count = pParamElem->getParam(0);
m_output_elem.setCycleCount(pParamElem->getParam(0));
return outputTraceElementIdx(pParamElem->getRootIndex(),m_output_elem);
}
@ -778,6 +800,17 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::outputEvent(TrcStackElemParam *pParamEl
return outputTraceElementIdx(pParamElem->getRootIndex(),m_output_elem);
}
ocsd_datapath_resp_t TrcPktDecodeEtmV4I::outputTraceRange(const bool executed, ocsd_trc_index_t index)
{
m_output_elem.setType(OCSD_GEN_TRC_ELEM_INSTR_RANGE);
m_output_elem.setLastInstrInfo(executed, m_instr_info.type, m_instr_info.sub_type, m_instr_info.instr_size);
m_output_elem.setISA(m_instr_info.isa);
m_output_elem.setLastInstrCond(m_instr_info.is_conditional);
if (executed)
m_instr_info.isa = m_instr_info.next_isa;
return outputTraceElementIdx(index, m_output_elem);
}
ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom, bool &bCont)
{
ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
@ -834,10 +867,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom, bo
}
break;
}
m_output_elem.setType(OCSD_GEN_TRC_ELEM_INSTR_RANGE);
m_output_elem.setLastInstrInfo((atom == ATOM_E),m_instr_info.type, m_instr_info.sub_type);
m_output_elem.setISA(m_instr_info.isa);
resp = outputTraceElementIdx(pElem->getRootIndex(),m_output_elem);
resp = outputTraceRange((atom == ATOM_E), pElem->getRootIndex());
}
else
@ -848,10 +878,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom, bo
if(m_output_elem.st_addr != m_output_elem.en_addr)
{
// some trace before we were out of memory access range
m_output_elem.setType(OCSD_GEN_TRC_ELEM_INSTR_RANGE);
m_output_elem.setLastInstrInfo(true,m_instr_info.type, m_instr_info.sub_type);
m_output_elem.setISA(m_instr_info.isa);
resp = outputTraceElementIdx(pElem->getRootIndex(),m_output_elem);
resp = outputTraceRange(true, pElem->getRootIndex());
}
if(m_mem_nacc_pending && OCSD_DATA_RESP_IS_CONT(resp))
@ -873,11 +900,13 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom, bo
ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processException()
{
ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
bool excep_implied_P0 = false; //!< exception implies P0
TrcStackElemExcept *pExceptElem;
if(m_excep_proc == EXCEP_POP)
m_excep_info.addr_b_tgt = false;
if(m_excep_info.proc == EXCEP_POP)
{
TrcStackElemExcept *pExceptElem = dynamic_cast<TrcStackElemExcept *>(m_P0_stack.back()); // get the exception element
pExceptElem = dynamic_cast<TrcStackElemExcept *>(m_P0_stack.back()); // get the exception element
TrcStackElemAddr *pAddressElem = 0;
TrcStackElemCtxt *pCtxtElem = 0;
TrcStackElem *pElem = 0;
@ -902,32 +931,52 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processException()
// extract address
pAddressElem = static_cast<TrcStackElemAddr *>(pElem);
m_excep_addr = pAddressElem->getAddr();
// fill in exception info for use later
m_excep_info.addr = pAddressElem->getAddr();
m_excep_info.number = pExceptElem->getExcepNum();
m_excep_info.index = pExceptElem->getRootIndex();
m_excep_info.addr_b_tgt = pExceptElem->getPrevSame();
// if we have context, get that.
if(pCtxtElem)
updateContext(pCtxtElem);
// record the exception number
m_output_elem.exception_number = pExceptElem->getExcepNum();
// see if there is an implied P0 element on the exception.
excep_implied_P0 = pExceptElem->getPrevSame();
// save the trace index.
m_excep_index = pExceptElem->getRootIndex();
// see if there is an address + optional context element implied
// prior to the exception.
if (m_excep_info.addr_b_tgt)
{
// this was a branch target address - update current setting
bool b64bit = m_instr_info.isa == ocsd_isa_aarch64;
if (pCtxtElem) {
b64bit = pCtxtElem->getContext().SF;
}
m_instr_info.instr_addr = m_excep_info.addr.val;
m_instr_info.isa = (m_excep_info.addr.isa == 0) ?
(b64bit ? ocsd_isa_aarch64 : ocsd_isa_arm) : ocsd_isa_thumb2;
m_need_addr = false;
}
// figure out next move
if(m_excep_addr.val == m_instr_info.instr_addr)
m_excep_proc = EXCEP_EXCEP;
if (pCtxtElem) {
m_excep_info.proc = EXCEP_CTXT;
updateContext(pCtxtElem);
}
else if(m_excep_info.addr.val == m_instr_info.instr_addr)
m_excep_info.proc = EXCEP_EXCEP;
else
m_excep_proc = EXCEP_RANGE;
m_excep_info.proc = EXCEP_RANGE;
}
m_P0_stack.delete_popped();
}
// output a context element
if (m_excep_info.proc == EXCEP_CTXT)
{
m_output_elem.setType(OCSD_GEN_TRC_ELEM_PE_CONTEXT);
resp = outputTraceElementIdx(m_excep_info.index, m_output_elem);
m_excep_info.proc = EXCEP_EXCEP;
if (!OCSD_DATA_RESP_IS_CONT(resp))
return resp;
}
// output a range element
if(m_excep_proc == EXCEP_RANGE)
if(m_excep_info.proc == EXCEP_RANGE)
{
bool bWPFound = false;
ocsd_err_t err;
@ -935,8 +984,8 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processException()
// last instr_info address is the start address
m_output_elem.st_addr = m_instr_info.instr_addr;
// look for either a WP or match to return address.
err = traceInstrToWP(bWPFound,!excep_implied_P0,m_excep_addr.val);
// look for match to return address.
err = traceInstrToWP(bWPFound,true,m_excep_info.addr.val);
if(err != OCSD_OK)
{
@ -944,37 +993,21 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processException()
{
m_need_addr = true;
m_need_ctxt = true;
LogError(ocsdError(OCSD_ERR_SEV_WARN,err,m_excep_index,m_CSID,"Warning: unsupported instruction set processing exception packet."));
LogError(ocsdError(OCSD_ERR_SEV_WARN,err,m_excep_info.index,m_CSID,"Warning: unsupported instruction set processing exception packet."));
}
else
{
resp = OCSD_RESP_FATAL_INVALID_DATA;
LogError(ocsdError(OCSD_ERR_SEV_ERROR,err,m_excep_index,m_CSID,"Error processing exception packet."));
m_excep_proc = EXCEP_POP; // nothing more to do, reset to start of exception handling
LogError(ocsdError(OCSD_ERR_SEV_ERROR,err,m_excep_info.index,m_CSID,"Error processing exception packet."));
m_excep_info.proc = EXCEP_POP; // nothing more to do, reset to start of exception handling
}
}
if(bWPFound)
{
// action according to waypoint type and atom value
if(excep_implied_P0)
{
switch(m_instr_info.type)
{
case OCSD_INSTR_BR:
m_instr_info.instr_addr = m_instr_info.branch_addr;
break;
case OCSD_INSTR_BR_INDIRECT:
m_instr_info.instr_addr = m_excep_addr.val;
break;
}
}
m_output_elem.setType(OCSD_GEN_TRC_ELEM_INSTR_RANGE);
m_output_elem.setLastInstrInfo(true,m_instr_info.type, m_instr_info.sub_type);
m_output_elem.setISA(m_instr_info.isa);
resp = outputTraceElementIdx(m_excep_index, m_output_elem);
m_excep_proc = EXCEP_EXCEP;
// waypoint address found - output range
resp = outputTraceRange(true, m_excep_info.index);
m_excep_info.proc = EXCEP_EXCEP;
}
else
{
@ -984,34 +1017,33 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processException()
if(m_output_elem.st_addr != m_output_elem.en_addr)
{
// some trace before we were out of memory access range
m_output_elem.setType(OCSD_GEN_TRC_ELEM_INSTR_RANGE);
m_output_elem.setLastInstrInfo(true,m_instr_info.type, m_instr_info.sub_type);
m_output_elem.setISA(m_instr_info.isa);
resp = outputTraceElementIdx(m_excep_index,m_output_elem);
resp = outputTraceRange(true, m_excep_info.index);
}
m_excep_proc = m_mem_nacc_pending ? EXCEP_NACC : EXCEP_EXCEP;
m_excep_info.proc = m_mem_nacc_pending ? EXCEP_NACC : EXCEP_EXCEP;
}
}
if((m_excep_proc == EXCEP_NACC) && OCSD_DATA_RESP_IS_CONT(resp))
if((m_excep_info.proc == EXCEP_NACC) && OCSD_DATA_RESP_IS_CONT(resp))
{
m_output_elem.setType(OCSD_GEN_TRC_ELEM_ADDR_NACC);
m_output_elem.st_addr = m_nacc_addr;
resp = outputTraceElementIdx(m_excep_index,m_output_elem);
m_excep_proc = EXCEP_EXCEP;
resp = outputTraceElementIdx(m_excep_info.index,m_output_elem);
m_excep_info.proc = EXCEP_EXCEP;
m_mem_nacc_pending = false;
}
if((m_excep_proc == EXCEP_EXCEP) && OCSD_DATA_RESP_IS_CONT(resp))
if((m_excep_info.proc == EXCEP_EXCEP) && OCSD_DATA_RESP_IS_CONT(resp))
{
// output element.
m_output_elem.setType(OCSD_GEN_TRC_ELEM_EXCEPTION);
// add end address as preferred return address to end addr in element
m_output_elem.en_addr = m_excep_addr.val;
m_output_elem.en_addr = m_excep_info.addr.val;
m_output_elem.excep_ret_addr = 1;
resp = outputTraceElementIdx(m_excep_index,m_output_elem);
m_excep_proc = EXCEP_POP;
m_output_elem.excep_ret_addr_br_tgt = m_excep_info.addr_b_tgt;
m_output_elem.exception_number = m_excep_info.number;
resp = outputTraceElementIdx(m_excep_info.index,m_output_elem);
m_excep_info.proc = EXCEP_POP;
}
return resp;
}
@ -1036,6 +1068,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::traceInstrToWP(bool &bWPFound, const bool traceTo
ocsd_mem_space_acc_t mem_space = m_is_secure ? OCSD_MEM_SPACE_S : OCSD_MEM_SPACE_N;
m_output_elem.st_addr = m_output_elem.en_addr = m_instr_info.instr_addr;
m_output_elem.num_instr_range = 0;
bWPFound = false;
@ -1057,6 +1090,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::traceInstrToWP(bool &bWPFound, const bool traceTo
// update the range decoded address in the output packet.
m_output_elem.en_addr = m_instr_info.instr_addr;
m_output_elem.num_instr_range++;
// either walking to match the next instruction address or a real watchpoint
if(traceToAddrNext)
@ -1068,7 +1102,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::traceInstrToWP(bool &bWPFound, const bool traceTo
{
// not enough memory accessible.
m_mem_nacc_pending = true;
m_nacc_addr = m_instr_info.instr_addr;
m_nacc_addr = m_instr_info.instr_addr;
}
}
return err;

View File

@ -91,6 +91,7 @@ void EtmV4ITrcPacket::toString(std::string &str) const
{
case ETM4_PKT_I_BAD_SEQUENCE:
case ETM4_PKT_I_INCOMPLETE_EOT:
case ETM4_PKT_I_RESERVED_CFG:
name = packetTypeName(err_type, 0);
str += "[" + (std::string)name + "]";
break;
@ -185,28 +186,16 @@ void EtmV4ITrcPacket::toStringFmt(const uint32_t fmtFlags, std::string &str) con
const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, const char **ppDesc) const
{
const char *pName = "I_RESERVED";
const char *pDesc = "Reserved Packet Header";
const char *pName = "I_UNKNOWN";
const char *pDesc = "Unknown Packet Header";
switch(type)
{
case ETM4_PKT_I_RESERVED: break; // default;
case ETM4_PKT_I_NOTSYNC:
pName = "I_NOT_SYNC";
pDesc = "I Stream not synchronised";
break;
case ETM4_PKT_I_BAD_SEQUENCE:
pName = "I_BAD_SEQUENCE";
pDesc = "Invalid Sequence in packet.";
break;
case ETM4_PKT_I_BAD_TRACEMODE:
pName = "I_BAD_TRACEMODE";
pDesc = "Invalid Packet for trace mode.";
break;
case ETM4_PKT_I_INCOMPLETE_EOT:
pName = "I_INCOMPLETE_EOT";
pDesc = "Incomplete packet at end of trace.";
@ -217,144 +206,59 @@ const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, co
pDesc = "No Error Type.";
break;
case ETM4_PKT_I_BAD_SEQUENCE:
pName = "I_BAD_SEQUENCE";
pDesc = "Invalid Sequence in packet.";
break;
case ETM4_PKT_I_BAD_TRACEMODE:
pName = "I_BAD_TRACEMODE";
pDesc = "Invalid Packet for trace mode.";
break;
case ETM4_PKT_I_RESERVED:
pName = "I_RESERVED";
pDesc = "Reserved Packet Header";
break;
case ETM4_PKT_I_RESERVED_CFG:
pName = "I_RESERVED_CFG";
pDesc = "Reserved header for current configuration.";
break;
case ETM4_PKT_I_EXTENSION:
pName = "I_EXTENSION";
pDesc = "Extention packet header.";
pDesc = "Extension packet header.";
break;
case ETM4_PKT_I_ADDR_CTXT_L_32IS0:
pName = "I_ADDR_CTXT_L_32IS0";
pDesc = "Address & Context, Long, 32 bit, IS0.";
case ETM4_PKT_I_TRACE_INFO:
pName = "I_TRACE_INFO";
pDesc = "Trace Info.";
break;
case ETM4_PKT_I_ADDR_CTXT_L_32IS1:
pName = "I_ADDR_CTXT_L_32IS1";
pDesc = "Address & Context, Long, 32 bit, IS0.";
case ETM4_PKT_I_TIMESTAMP:
pName = "I_TIMESTAMP";
pDesc = "Timestamp.";
break;
case ETM4_PKT_I_ADDR_CTXT_L_64IS0:
pName = "I_ADDR_CTXT_L_64IS0";
pDesc = "Address & Context, Long, 64 bit, IS0.";
case ETM4_PKT_I_TRACE_ON:
pName = "I_TRACE_ON";
pDesc = "Trace On.";
break;
case ETM4_PKT_I_ADDR_CTXT_L_64IS1:
pName = "I_ADDR_CTXT_L_64IS1";
pDesc = "Address & Context, Long, 64 bit, IS1.";
case ETM4_PKT_I_FUNC_RET:
pName = "I_FUNC_RET";
pDesc = "V8M - function return.";
break;
case ETM4_PKT_I_CTXT:
pName = "I_CTXT";
pDesc = "Context Packet.";
case ETM4_PKT_I_EXCEPT:
pName = "I_EXCEPT";
pDesc = "Exception.";
break;
case ETM4_PKT_I_ADDR_MATCH:
pName = "I_ADDR_MATCH";
pDesc = "Exact Address Match.";
break;
case ETM4_PKT_I_ADDR_L_32IS0:
pName = "I_ADDR_L_32IS0";
pDesc = "Address, Long, 32 bit, IS0.";
break;
case ETM4_PKT_I_ADDR_L_32IS1:
pName = "I_ADDR_L_32IS1";
pDesc = "Address, Long, 32 bit, IS1.";
break;
case ETM4_PKT_I_ADDR_L_64IS0:
pName = "I_ADDR_L_64IS0";
pDesc = "Address, Long, 64 bit, IS0.";
break;
case ETM4_PKT_I_ADDR_L_64IS1:
pName = "I_ADDR_L_64IS1";
pDesc = "Address, Long, 64 bit, IS1.";
break;
case ETM4_PKT_I_ADDR_S_IS0:
pName = "I_ADDR_S_IS0";
pDesc = "Address, Short, IS0.";
break;
case ETM4_PKT_I_ADDR_S_IS1:
pName = "I_ADDR_S_IS1";
pDesc = "Address, Short, IS1.";
break;
case ETM4_PKT_I_Q:
pName = "I_Q";
pDesc = "Q Packet.";
break;
case ETM4_PKT_I_ATOM_F1:
pName = "I_ATOM_F1";
pDesc = "Atom format 1.";
break;
case ETM4_PKT_I_ATOM_F2:
pName = "I_ATOM_F2";
pDesc = "Atom format 2.";
break;
case ETM4_PKT_I_ATOM_F3:
pName = "I_ATOM_F3";
pDesc = "Atom format 3.";
break;
case ETM4_PKT_I_ATOM_F4:
pName = "I_ATOM_F4";
pDesc = "Atom format 4.";
break;
case ETM4_PKT_I_ATOM_F5:
pName = "I_ATOM_F5";
pDesc = "Atom format 5.";
break;
case ETM4_PKT_I_ATOM_F6:
pName = "I_ATOM_F6";
pDesc = "Atom format 6.";
break;
case ETM4_PKT_I_COND_FLUSH:
pName = "I_COND_FLUSH";
pDesc = "Conditional Flush.";
break;
case ETM4_PKT_I_COND_I_F1:
pName = "I_COND_I_F1";
pDesc = "Conditional Instruction, format 1.";
break;
case ETM4_PKT_I_COND_I_F2:
pName = "I_COND_I_F2";
pDesc = "Conditional Instruction, format 2.";
break;
case ETM4_PKT_I_COND_I_F3:
pName = "I_COND_I_F3";
pDesc = "Conditional Instruction, format 3.";
break;
case ETM4_PKT_I_COND_RES_F1:
pName = "I_COND_RES_F1";
pDesc = "Conditional Result, format 1.";
break;
case ETM4_PKT_I_COND_RES_F2:
pName = "I_COND_RES_F2";
pDesc = "Conditional Result, format 2.";
break;
case ETM4_PKT_I_COND_RES_F3:
pName = "I_COND_RES_F3";
pDesc = "Conditional Result, format 3.";
break;
case ETM4_PKT_I_COND_RES_F4:
pName = "I_COND_RES_F4";
pDesc = "Conditional Result, format 4.";
case ETM4_PKT_I_EXCEPT_RTN:
pName = "I_EXCEPT_RTN";
pDesc = "Exception Return.";
break;
case ETM4_PKT_I_CCNT_F1:
@ -382,30 +286,21 @@ const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, co
pDesc = "Data Synchronisation Marker - Unnumbered.";
break;
case ETM4_PKT_I_EVENT:
pName = "I_EVENT";
pDesc = "Trace Event.";
break;
case ETM4_PKT_I_EXCEPT:
pName = "I_EXCEPT";
pDesc = "Exception.";
break;
case ETM4_PKT_I_EXCEPT_RTN:
pName = "I_EXCEPT_RTN";
pDesc = "Exception Return.";
break;
case ETM4_PKT_I_TIMESTAMP:
pName = "I_TIMESTAMP";
pDesc = "Timestamp.";
case ETM4_PKT_I_COMMIT:
pName = "I_COMMIT";
pDesc = "Commit";
break;
case ETM4_PKT_I_CANCEL_F1:
pName = "I_CANCEL_F1";
pDesc = "Cancel Format 1.";
break;
case ETM4_PKT_I_MISPREDICT:
pName = "I_MISPREDICT";
pDesc = "Mispredict.";
break;
case ETM4_PKT_I_CANCEL_F2:
pName = "I_CANCEL_F2";
pDesc = "Cancel Format 2.";
@ -416,24 +311,149 @@ const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, co
pDesc = "Cancel Format 3.";
break;
case ETM4_PKT_I_COMMIT:
pName = "I_COMMIT";
pDesc = "Commit";
case ETM4_PKT_I_COND_I_F2:
pName = "I_COND_I_F2";
pDesc = "Conditional Instruction, format 2.";
break;
case ETM4_PKT_I_MISPREDICT:
pName = "I_MISPREDICT";
pDesc = "Mispredict.";
case ETM4_PKT_I_COND_FLUSH:
pName = "I_COND_FLUSH";
pDesc = "Conditional Flush.";
break;
case ETM4_PKT_I_TRACE_INFO:
pName = "I_TRACE_INFO";
pDesc = "Trace Info.";
case ETM4_PKT_I_COND_RES_F4:
pName = "I_COND_RES_F4";
pDesc = "Conditional Result, format 4.";
break;
case ETM4_PKT_I_TRACE_ON:
pName = "I_TRACE_ON";
pDesc = "Trace On.";
case ETM4_PKT_I_COND_RES_F2:
pName = "I_COND_RES_F2";
pDesc = "Conditional Result, format 2.";
break;
case ETM4_PKT_I_COND_RES_F3:
pName = "I_COND_RES_F3";
pDesc = "Conditional Result, format 3.";
break;
case ETM4_PKT_I_COND_RES_F1:
pName = "I_COND_RES_F1";
pDesc = "Conditional Result, format 1.";
break;
case ETM4_PKT_I_COND_I_F1:
pName = "I_COND_I_F1";
pDesc = "Conditional Instruction, format 1.";
break;
case ETM4_PKT_I_COND_I_F3:
pName = "I_COND_I_F3";
pDesc = "Conditional Instruction, format 3.";
break;
case ETM4_PKT_I_IGNORE:
pName = "I_IGNORE";
pDesc = "Ignore.";
break;
case ETM4_PKT_I_EVENT:
pName = "I_EVENT";
pDesc = "Trace Event.";
break;
case ETM4_PKT_I_CTXT:
pName = "I_CTXT";
pDesc = "Context Packet.";
break;
case ETM4_PKT_I_ADDR_CTXT_L_32IS0:
pName = "I_ADDR_CTXT_L_32IS0";
pDesc = "Address & Context, Long, 32 bit, IS0.";
break;
case ETM4_PKT_I_ADDR_CTXT_L_32IS1:
pName = "I_ADDR_CTXT_L_32IS1";
pDesc = "Address & Context, Long, 32 bit, IS0.";
break;
case ETM4_PKT_I_ADDR_CTXT_L_64IS0:
pName = "I_ADDR_CTXT_L_64IS0";
pDesc = "Address & Context, Long, 64 bit, IS0.";
break;
case ETM4_PKT_I_ADDR_CTXT_L_64IS1:
pName = "I_ADDR_CTXT_L_64IS1";
pDesc = "Address & Context, Long, 64 bit, IS1.";
break;
case ETM4_PKT_I_ADDR_MATCH:
pName = "I_ADDR_MATCH";
pDesc = "Exact Address Match.";
break;
case ETM4_PKT_I_ADDR_S_IS0:
pName = "I_ADDR_S_IS0";
pDesc = "Address, Short, IS0.";
break;
case ETM4_PKT_I_ADDR_S_IS1:
pName = "I_ADDR_S_IS1";
pDesc = "Address, Short, IS1.";
break;
case ETM4_PKT_I_ADDR_L_32IS0:
pName = "I_ADDR_L_32IS0";
pDesc = "Address, Long, 32 bit, IS0.";
break;
case ETM4_PKT_I_ADDR_L_32IS1:
pName = "I_ADDR_L_32IS1";
pDesc = "Address, Long, 32 bit, IS1.";
break;
case ETM4_PKT_I_ADDR_L_64IS0:
pName = "I_ADDR_L_64IS0";
pDesc = "Address, Long, 64 bit, IS0.";
break;
case ETM4_PKT_I_ADDR_L_64IS1:
pName = "I_ADDR_L_64IS1";
pDesc = "Address, Long, 64 bit, IS1.";
break;
case ETM4_PKT_I_Q:
pName = "I_Q";
pDesc = "Q Packet.";
break;
case ETM4_PKT_I_ATOM_F6:
pName = "I_ATOM_F6";
pDesc = "Atom format 6.";
break;
case ETM4_PKT_I_ATOM_F5:
pName = "I_ATOM_F5";
pDesc = "Atom format 5.";
break;
case ETM4_PKT_I_ATOM_F2:
pName = "I_ATOM_F2";
pDesc = "Atom format 2.";
break;
case ETM4_PKT_I_ATOM_F4:
pName = "I_ATOM_F4";
pDesc = "Atom format 4.";
break;
case ETM4_PKT_I_ATOM_F1:
pName = "I_ATOM_F1";
pDesc = "Atom format 1.";
break;
case ETM4_PKT_I_ATOM_F3:
pName = "I_ATOM_F3";
pDesc = "Atom format 3.";
break;
case ETM4_PKT_I_ASYNC:
@ -450,6 +470,9 @@ const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, co
pName = "I_OVERFLOW";
pDesc = "Overflow.";
break;
default:
break;
}
if(ppDesc) *ppDesc = pDesc;

View File

@ -34,12 +34,46 @@
#include "trc_pkt_proc_etmv4i_impl.h"
/* Trace raw input buffer class */
TraceRawBuffer::TraceRawBuffer()
{
m_bufSize = 0;
m_bufProcessed = 0;
m_pBuffer = 0;
pkt = 0;
}
// init the buffer
void TraceRawBuffer::init(const uint32_t size, const uint8_t *rawtrace, std::vector<uint8_t> *out_packet)
{
m_bufSize = size;
m_bufProcessed = 0;
m_pBuffer = rawtrace;
pkt = out_packet;
}
void TraceRawBuffer::copyByteToPkt()
{
if (!empty()) {
pkt->push_back(m_pBuffer[m_bufProcessed]);
m_bufProcessed++;
}
}
uint8_t TraceRawBuffer::peekNextByte()
{
uint8_t val = 0;
if (!empty())
val = m_pBuffer[m_bufProcessed];
return val;
}
/* trace etmv4 packet processing class */
EtmV4IPktProcImpl::EtmV4IPktProcImpl() :
m_isInit(false),
m_interface(0),
m_first_trace_info(false)
{
BuildIPacketTable();
}
EtmV4IPktProcImpl::~EtmV4IPktProcImpl()
@ -62,6 +96,7 @@ ocsd_err_t EtmV4IPktProcImpl::Configure(const EtmV4Config *p_config)
if(p_config != 0)
{
m_config = *p_config;
BuildIPacketTable(); // packet table based on config
}
else
{
@ -78,64 +113,81 @@ ocsd_datapath_resp_t EtmV4IPktProcImpl::processData( const ocsd_trc_index_t ind
uint32_t *numBytesProcessed)
{
ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
m_blockBytesProcessed = 0;
m_trcIn.init(dataBlockSize, pDataBlock, &m_currPacketData);
m_blockIndex = index;
uint8_t currByte;
while( ( (m_blockBytesProcessed < dataBlockSize) ||
((m_blockBytesProcessed == dataBlockSize) && (m_process_state == SEND_PKT)) ) &&
OCSD_DATA_RESP_IS_CONT(resp))
bool done = false;
uint8_t nextByte;
do
{
currByte = pDataBlock[m_blockBytesProcessed];
try
{
switch(m_process_state)
/* while (((m_blockBytesProcessed < dataBlockSize) ||
((m_blockBytesProcessed == dataBlockSize) && (m_process_state == SEND_PKT))) &&
OCSD_DATA_RESP_IS_CONT(resp))*/
while ( (!m_trcIn.empty() || (m_process_state == SEND_PKT)) &&
OCSD_DATA_RESP_IS_CONT(resp)
)
{
case PROC_HDR:
m_packet_index = m_blockIndex + m_blockBytesProcessed;
if(m_is_sync)
switch (m_process_state)
{
m_pIPktFn = m_i_table[currByte].pptkFn;
m_curr_packet.type = m_i_table[currByte].pkt_type;
}
else
{
// unsynced - process data until we see a sync point
m_pIPktFn = &EtmV4IPktProcImpl::iNotSync;
m_curr_packet.type = ETM4_PKT_I_NOTSYNC;
}
m_process_state = PROC_DATA;
case PROC_HDR:
m_packet_index = m_blockIndex + m_trcIn.processed();
if (m_is_sync)
{
nextByte = m_trcIn.peekNextByte();
m_pIPktFn = m_i_table[nextByte].pptkFn;
m_curr_packet.type = m_i_table[nextByte].pkt_type;
}
else
{
// unsynced - process data until we see a sync point
m_pIPktFn = &EtmV4IPktProcImpl::iNotSync;
m_curr_packet.type = ETM4_PKT_I_NOTSYNC;
}
m_process_state = PROC_DATA;
case PROC_DATA:
m_currPacketData.push_back(pDataBlock[m_blockBytesProcessed]);
m_blockBytesProcessed++;
(this->*m_pIPktFn)();
break;
case PROC_DATA:
// loop till full packet or no more data...
while (!m_trcIn.empty() && (m_process_state == PROC_DATA))
{
nextByte = m_trcIn.peekNextByte();
m_trcIn.copyByteToPkt(); // move next byte into the packet
// m_currPacketData.push_back(pDataBlock[m_blockBytesProcessed]);
// m_blockBytesProcessed++;
(this->*m_pIPktFn)(nextByte);
}
break;
case SEND_PKT:
resp = outputPacket();
InitPacketState();
m_process_state = PROC_HDR;
break;
case SEND_PKT:
resp = outputPacket();
InitPacketState();
m_process_state = PROC_HDR;
break;
case SEND_UNSYNCED:
resp = outputUnsyncedRawPacket();
if(m_update_on_unsync_packet_index != 0)
{
m_packet_index = m_update_on_unsync_packet_index;
m_update_on_unsync_packet_index = 0;
case SEND_UNSYNCED:
resp = outputUnsyncedRawPacket();
if (m_update_on_unsync_packet_index != 0)
{
m_packet_index = m_update_on_unsync_packet_index;
m_update_on_unsync_packet_index = 0;
}
m_process_state = PROC_DATA; // after dumping unsynced data, still in data mode.
break;
}
m_process_state = PROC_DATA; // after dumping unsynced data, still in data mode.
break;
}
done = true;
}
catch(ocsdError &err)
{
done = true;
m_interface->LogError(err);
if( (err.getErrorCode() == OCSD_ERR_BAD_PACKET_SEQ) ||
(err.getErrorCode() == OCSD_ERR_INVALID_PCKT_HDR))
{
// send invalid packets up the pipe to let the next stage decide what to do.
m_process_state = SEND_PKT;
done = false;
}
else
{
@ -145,14 +197,15 @@ ocsd_datapath_resp_t EtmV4IPktProcImpl::processData( const ocsd_trc_index_t ind
}
catch(...)
{
done = true;
/// vv bad at this point.
resp = OCSD_RESP_FATAL_SYS_ERR;
const ocsdError &fatal = ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_FAIL,m_packet_index,m_config.getTraceID(),"Unknown System Error decoding trace.");
m_interface->LogError(fatal);
}
}
} while (!done);
*numBytesProcessed = m_blockBytesProcessed;
*numBytesProcessed = m_trcIn.processed();
return resp;
}
@ -230,38 +283,35 @@ ocsd_datapath_resp_t EtmV4IPktProcImpl::outputUnsyncedRawPacket()
return resp;
}
void EtmV4IPktProcImpl::iNotSync()
void EtmV4IPktProcImpl::iNotSync(const uint8_t lastByte)
{
uint8_t lastByte = m_currPacketData.back(); // peek at the byte being processed...
// is it an extension byte?
if(lastByte == 0x00) // TBD : add check for forced sync in here?
if (lastByte == 0x00) // TBD : add check for forced sync in here?
{
if(m_currPacketData.size() > 1)
if (m_currPacketData.size() > 1)
{
m_dump_unsynced_bytes = m_currPacketData.size() - 1;
m_process_state = SEND_UNSYNCED;
// outputting some data then update packet index after so output indexes accurate
m_update_on_unsync_packet_index = m_blockIndex + m_blockBytesProcessed - 1;
m_update_on_unsync_packet_index = m_blockIndex + m_trcIn.processed() - 1;
}
else
m_packet_index = m_blockIndex + m_blockBytesProcessed - 1; // set it up now otherwise.
m_packet_index = m_blockIndex + m_trcIn.processed() - 1; // set it up now otherwise.
m_pIPktFn = m_i_table[lastByte].pptkFn;
m_pIPktFn = m_i_table[lastByte].pptkFn;
}
else if(m_currPacketData.size() >= 8)
else if (m_currPacketData.size() >= 8)
{
m_dump_unsynced_bytes = m_currPacketData.size();
m_process_state = SEND_UNSYNCED;
// outputting some data then update packet index after so output indexes accurate
m_update_on_unsync_packet_index = m_blockIndex + m_blockBytesProcessed;
m_update_on_unsync_packet_index = m_blockIndex + m_trcIn.processed();
}
}
void EtmV4IPktProcImpl::iPktNoPayload()
void EtmV4IPktProcImpl::iPktNoPayload(const uint8_t lastByte)
{
// some expansion may be required...
uint8_t lastByte = m_currPacketData.back();
switch(m_curr_packet.type)
{
case ETM4_PKT_I_ADDR_MATCH:
@ -281,20 +331,27 @@ void EtmV4IPktProcImpl::iPktNoPayload()
case ETM4_PKT_I_COND_FLUSH:
case ETM4_PKT_I_EXCEPT_RTN:
case ETM4_PKT_I_TRACE_ON:
case ETM4_PKT_I_FUNC_RET:
case ETM4_PKT_I_IGNORE:
default: break;
}
m_process_state = SEND_PKT; // now just send it....
}
void EtmV4IPktProcImpl::iPktReserved()
void EtmV4IPktProcImpl::iPktReserved(const uint8_t lastByte)
{
m_curr_packet.updateErrType(ETM4_PKT_I_RESERVED); // swap type for err type
m_curr_packet.updateErrType(ETM4_PKT_I_RESERVED, lastByte); // swap type for err type
throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_INVALID_PCKT_HDR,m_packet_index,m_config.getTraceID());
}
void EtmV4IPktProcImpl::iPktExtension()
void EtmV4IPktProcImpl::iPktInvalidCfg(const uint8_t lastByte)
{
m_curr_packet.updateErrType(ETM4_PKT_I_RESERVED_CFG, lastByte); // swap type for err type
throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_INVALID_PCKT_HDR, m_packet_index, m_config.getTraceID());
}
void EtmV4IPktProcImpl::iPktExtension(const uint8_t lastByte)
{
uint8_t lastByte = m_currPacketData.back();
if(m_currPacketData.size() == 2)
{
// not sync and not next by 0x00 - not sync sequence
@ -331,9 +388,8 @@ void EtmV4IPktProcImpl::iPktExtension()
}
}
void EtmV4IPktProcImpl::iPktASync()
void EtmV4IPktProcImpl::iPktASync(const uint8_t lastByte)
{
uint8_t lastByte = m_currPacketData.back();
if(lastByte != 0x00)
{
// not sync and not next by 0x00 - not sync sequence if < 12
@ -372,9 +428,8 @@ void EtmV4IPktProcImpl::iPktASync()
}
}
void EtmV4IPktProcImpl::iPktTraceInfo()
void EtmV4IPktProcImpl::iPktTraceInfo(const uint8_t lastByte)
{
uint8_t lastByte = m_currPacketData.back();
if(m_currPacketData.size() == 1) // header
{
//clear flags
@ -445,11 +500,8 @@ void EtmV4IPktProcImpl::iPktTraceInfo()
}
void EtmV4IPktProcImpl::iPktTimestamp()
void EtmV4IPktProcImpl::iPktTimestamp(const uint8_t lastByte)
{
// save the latest byte
uint8_t lastByte = m_currPacketData.back();
// process the header byte
if(m_currPacketData.size() == 1)
{
@ -498,9 +550,9 @@ void EtmV4IPktProcImpl::iPktTimestamp()
}
}
void EtmV4IPktProcImpl::iPktException()
void EtmV4IPktProcImpl::iPktException(const uint8_t lastByte)
{
uint8_t lastByte = m_currPacketData.back();
uint16_t excep_type = 0;
switch(m_currPacketData.size())
{
@ -512,7 +564,7 @@ void EtmV4IPktProcImpl::iPktException()
if(m_currPacketData.size() == (unsigned)m_excep_size)
{
uint16_t excep_type = (m_currPacketData[1] >> 1) & 0x1F;
excep_type = (m_currPacketData[1] >> 1) & 0x1F;
uint8_t addr_interp = (m_currPacketData[1] & 0x40) >> 5 | (m_currPacketData[1] & 0x1);
uint8_t m_fault_pending = 0;
uint8_t m_type = (m_config.coreProfile() == profile_CortexM) ? 1 : 0;
@ -530,11 +582,10 @@ void EtmV4IPktProcImpl::iPktException()
}
}
void EtmV4IPktProcImpl::iPktCycleCntF123()
void EtmV4IPktProcImpl::iPktCycleCntF123(const uint8_t lastByte)
{
ocsd_etmv4_i_pkt_type format = m_curr_packet.type;
uint8_t lastByte = m_currPacketData.back();
if( m_currPacketData.size() == 1)
{
m_count_done = m_commit_done = false;
@ -606,9 +657,8 @@ void EtmV4IPktProcImpl::iPktCycleCntF123()
}
}
void EtmV4IPktProcImpl::iPktSpeclRes()
{
uint8_t lastByte = m_currPacketData.back();
void EtmV4IPktProcImpl::iPktSpeclRes(const uint8_t lastByte)
{
if(m_currPacketData.size() == 1)
{
switch(m_curr_packet.getType())
@ -650,9 +700,8 @@ void EtmV4IPktProcImpl::iPktSpeclRes()
}
}
void EtmV4IPktProcImpl::iPktCondInstr()
void EtmV4IPktProcImpl::iPktCondInstr(const uint8_t lastByte)
{
uint8_t lastByte = m_currPacketData.back();
bool bF1Done = false;
if(m_currPacketData.size() == 1)
@ -691,10 +740,8 @@ void EtmV4IPktProcImpl::iPktCondInstr()
}
}
void EtmV4IPktProcImpl::iPktCondResult()
void EtmV4IPktProcImpl::iPktCondResult(const uint8_t lastByte)
{
//static ocsd_etmv4_i_pkt_type format = ETM4_PKT_I_COND_RES_F1; // conditional result formats F1-F4
uint8_t lastByte = m_currPacketData.back();
if(m_currPacketData.size() == 1)
{
m_F1P1_done = false; // F1 payload 1 done
@ -763,10 +810,10 @@ void EtmV4IPktProcImpl::iPktCondResult()
}
}
void EtmV4IPktProcImpl::iPktContext()
void EtmV4IPktProcImpl::iPktContext(const uint8_t lastByte)
{
bool bSendPacket = false;
uint8_t lastByte = m_currPacketData.back();
if(m_currPacketData.size() == 1)
{
if((lastByte & 0x1) == 0)
@ -840,10 +887,8 @@ void EtmV4IPktProcImpl::extractAndSetContextInfo(const std::vector<uint8_t> &buf
}
}
void EtmV4IPktProcImpl::iPktAddrCtxt()
void EtmV4IPktProcImpl::iPktAddrCtxt(const uint8_t lastByte)
{
uint8_t lastByte = m_currPacketData.back();
if( m_currPacketData.size() == 1)
{
m_addrIS = 0;
@ -910,13 +955,14 @@ void EtmV4IPktProcImpl::iPktAddrCtxt()
}
}
void EtmV4IPktProcImpl::iPktShortAddr()
void EtmV4IPktProcImpl::iPktShortAddr(const uint8_t lastByte)
{
uint8_t lastByte = m_currPacketData.back();
if(m_currPacketData.size() == 1)
if (m_currPacketData.size() == 1)
{
m_addr_done = false;
m_addrIS = (lastByte == ETM4_PKT_I_ADDR_S_IS0) ? 0 : 1;
m_addrIS = 0;
if (lastByte == ETM4_PKT_I_ADDR_S_IS1)
m_addrIS = 1;
}
else if(!m_addr_done)
{
@ -954,7 +1000,7 @@ int EtmV4IPktProcImpl::extractShortAddr(const std::vector<uint8_t> &buffer, cons
return idx;
}
void EtmV4IPktProcImpl::iPktLongAddr()
void EtmV4IPktProcImpl::iPktLongAddr(const uint8_t lastByte)
{
if(m_currPacketData.size() == 1)
{
@ -998,10 +1044,8 @@ void EtmV4IPktProcImpl::iPktLongAddr()
}
}
void EtmV4IPktProcImpl::iPktQ()
void EtmV4IPktProcImpl::iPktQ(const uint8_t lastByte)
{
uint8_t lastByte = m_currPacketData.back();
if(m_currPacketData.size() == 1)
{
m_Q_type = lastByte & 0xF;
@ -1112,7 +1156,7 @@ void EtmV4IPktProcImpl::iPktQ()
}
void EtmV4IPktProcImpl::iAtom()
void EtmV4IPktProcImpl::iAtom(const uint8_t lastByte)
{
// patterns lsbit = oldest atom, ms bit = newest.
static const uint32_t f4_patterns[] = {
@ -1122,7 +1166,6 @@ void EtmV4IPktProcImpl::iAtom()
0x5 // NENE
};
uint8_t lastByte = m_currPacketData.back();
uint8_t pattIdx = 0, pattCount = 0;
uint32_t pattern;
@ -1212,13 +1255,23 @@ void EtmV4IPktProcImpl::BuildIPacketTable()
m_i_table[0x04].pkt_type = ETM4_PKT_I_TRACE_ON;
m_i_table[0x04].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
// b0000 0101 - Funct ret V8M
m_i_table[0x05].pkt_type = ETM4_PKT_I_FUNC_RET;
if ((m_config.coreProfile() == profile_CortexM) &&
(OCSD_IS_V8_ARCH(m_config.archVersion())) &&
(m_config.FullVersion() >= 0x42))
{
m_i_table[0x05].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
}
// b0000 0110 - exception
m_i_table[0x06].pkt_type = ETM4_PKT_I_EXCEPT;
m_i_table[0x06].pptkFn = &EtmV4IPktProcImpl::iPktException;
// b0000 0111 - exception return
m_i_table[0x07].pkt_type = ETM4_PKT_I_EXCEPT_RTN;
m_i_table[0x07].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
m_i_table[0x07].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
// b0000 110x - cycle count f2
// b0000 111x - cycle count f1
@ -1238,22 +1291,27 @@ void EtmV4IPktProcImpl::BuildIPacketTable()
// b0010 0xxx - NDSM
for(int i = 0; i < 8; i++)
{
m_i_table[0x20+i].pkt_type = ETM4_PKT_I_NUM_DS_MKR;
m_i_table[0x20+i].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
m_i_table[0x20 + i].pkt_type = ETM4_PKT_I_NUM_DS_MKR;
if (m_config.enabledDataTrace())
m_i_table[0x20+i].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
else
m_i_table[0x20+i].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
}
// b0010 10xx, b0010 1100 - UDSM
for(int i = 0; i < 5; i++)
{
m_i_table[0x28+i].pkt_type = ETM4_PKT_I_UNNUM_DS_MKR;
m_i_table[0x28+i].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
if (m_config.enabledDataTrace())
m_i_table[0x28+i].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
else
m_i_table[0x28+i].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
}
// b0010 1101 - commit
m_i_table[0x2D].pkt_type = ETM4_PKT_I_COMMIT;
m_i_table[0x2D].pptkFn = &EtmV4IPktProcImpl::iPktSpeclRes;
// b0010 111x - cancel f1
for(int i = 0; i < 2; i++)
{
@ -1284,68 +1342,107 @@ void EtmV4IPktProcImpl::BuildIPacketTable()
m_i_table[0x38+i].pptkFn = &EtmV4IPktProcImpl::iPktSpeclRes;
}
bool bCondValid = m_config.hasCondTrace() && m_config.enabledCondITrace();
// b0100 000x, b0100 0010 - cond I f2
for(int i = 0; i < 3; i++)
for (int i = 0; i < 3; i++)
{
m_i_table[0x40+i].pkt_type = ETM4_PKT_I_COND_I_F2;
m_i_table[0x40+i].pptkFn = &EtmV4IPktProcImpl::iPktCondInstr;
m_i_table[0x40 + i].pkt_type = ETM4_PKT_I_COND_I_F2;
if (bCondValid)
m_i_table[0x40 + i].pptkFn = &EtmV4IPktProcImpl::iPktCondInstr;
else
m_i_table[0x40 + i].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
}
// b0100 0011 - cond flush
m_i_table[0x43].pkt_type = ETM4_PKT_I_COND_FLUSH;
m_i_table[0x43].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
if (bCondValid)
m_i_table[0x43].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
else
m_i_table[0x43].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
// b0100 010x, b0100 0110 - cond res f4
for(int i = 0; i < 3; i++)
for (int i = 0; i < 3; i++)
{
m_i_table[0x44+i].pkt_type = ETM4_PKT_I_COND_RES_F4;
m_i_table[0x44+i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
m_i_table[0x44 + i].pkt_type = ETM4_PKT_I_COND_RES_F4;
if (bCondValid)
m_i_table[0x44 + i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
else
m_i_table[0x44 + i].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
}
// b0100 100x, b0100 0110 - cond res f2
// b0100 110x, b0100 1110 - cond res f2
for(int i = 0; i < 3; i++)
for (int i = 0; i < 3; i++)
{
m_i_table[0x48+i].pkt_type = ETM4_PKT_I_COND_RES_F2;
m_i_table[0x48+i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
m_i_table[0x48 + i].pkt_type = ETM4_PKT_I_COND_RES_F2;
if (bCondValid)
m_i_table[0x48 + i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
else
m_i_table[0x48 + i].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
}
for(int i = 0; i < 3; i++)
for (int i = 0; i < 3; i++)
{
m_i_table[0x4C+i].pkt_type = ETM4_PKT_I_COND_RES_F2;
m_i_table[0x4C+i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
m_i_table[0x4C + i].pkt_type = ETM4_PKT_I_COND_RES_F2;
if (bCondValid)
m_i_table[0x4C + i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
else
m_i_table[0x4C + i].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
}
// b0101xxxx - cond res f3
for(int i = 0; i < 16; i++)
for (int i = 0; i < 16; i++)
{
m_i_table[0x50+i].pkt_type = ETM4_PKT_I_COND_RES_F3;
m_i_table[0x50+i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
m_i_table[0x50 + i].pkt_type = ETM4_PKT_I_COND_RES_F3;
if (bCondValid)
m_i_table[0x50 + i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
else
m_i_table[0x50 + i].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
}
// b011010xx - cond res f1
for(int i = 0; i < 4; i++)
for (int i = 0; i < 4; i++)
{
m_i_table[0x68+i].pkt_type = ETM4_PKT_I_COND_RES_F1;
m_i_table[0x68+i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
m_i_table[0x68 + i].pkt_type = ETM4_PKT_I_COND_RES_F1;
if (bCondValid)
m_i_table[0x68 + i].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
else
m_i_table[0x68 + i].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
}
// b0110 1100 - cond instr f1
m_i_table[0x6C].pkt_type = ETM4_PKT_I_COND_I_F1;
m_i_table[0x6C].pptkFn = &EtmV4IPktProcImpl::iPktCondInstr;
if (bCondValid)
m_i_table[0x6C].pptkFn = &EtmV4IPktProcImpl::iPktCondInstr;
else
m_i_table[0x6C].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
// b0110 1101 - cond instr f3
m_i_table[0x6D].pkt_type = ETM4_PKT_I_COND_I_F3;
m_i_table[0x6D].pptkFn = &EtmV4IPktProcImpl::iPktCondInstr;
if (bCondValid)
m_i_table[0x6D].pptkFn = &EtmV4IPktProcImpl::iPktCondInstr;
else
m_i_table[0x6D].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
// b0110111x - cond res f1
for(int i = 0; i < 2; i++)
for (int i = 0; i < 2; i++)
{
// G++ cannot understand [0x6E+i] so change these round
m_i_table[i+0x6E].pkt_type = ETM4_PKT_I_COND_RES_F1;
m_i_table[i+0x6E].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
m_i_table[i + 0x6E].pkt_type = ETM4_PKT_I_COND_RES_F1;
if (bCondValid)
m_i_table[i + 0x6E].pptkFn = &EtmV4IPktProcImpl::iPktCondResult;
else
m_i_table[i + 0x6E].pptkFn = &EtmV4IPktProcImpl::iPktInvalidCfg;
}
// b01110001 - b01111111 - cond res f1
// ETM 4.3 introduces ignore packets
if (m_config.FullVersion() >= 0x43)
{
m_i_table[0x70].pkt_type = ETM4_PKT_I_IGNORE;
m_i_table[0x70].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload;
}
// b01110001 - b01111111 - event trace
for(int i = 0; i < 15; i++)
{
m_i_table[0x71+i].pkt_type = ETM4_PKT_I_EVENT;
@ -1399,12 +1496,27 @@ void EtmV4IPktProcImpl::BuildIPacketTable()
m_i_table[0x9D+i].pkt_type = (i == 0) ? ETM4_PKT_I_ADDR_L_64IS0 : ETM4_PKT_I_ADDR_L_64IS1;
m_i_table[0x9D+i].pptkFn = &EtmV4IPktProcImpl::iPktLongAddr;
}
// b1010xxxx - Q packet
for(int i = 0; i < 16; i++)
for (int i = 0; i < 16; i++)
{
m_i_table[0xA0+i].pkt_type = ETM4_PKT_I_Q;
m_i_table[0xA0+i].pptkFn = &EtmV4IPktProcImpl::iPktQ;
m_i_table[0xA0 + i].pkt_type = ETM4_PKT_I_Q;
// certain Q type codes are reserved.
switch (i) {
case 0x3:
case 0x4:
case 0x7:
case 0x8:
case 0x9:
case 0xD:
case 0xE:
// don't update pkt fn - leave at default reserved.
break;
default:
// if this config supports Q elem - otherwise reserved again.
if (m_config.hasQElem())
m_i_table[0xA0 + i].pptkFn = &EtmV4IPktProcImpl::iPktQ;
}
}
// Atom Packets - all no payload but have specific pattern generation fn

View File

@ -39,6 +39,31 @@
#include "opencsd/etmv4/trc_cmp_cfg_etmv4.h"
#include "opencsd/etmv4/trc_pkt_elem_etmv4i.h"
class TraceRawBuffer
{
public:
TraceRawBuffer();
~TraceRawBuffer() {};
// init the buffer
void init(const uint32_t size, const uint8_t *rawtrace, std::vector<uint8_t> *out_packet);
void copyByteToPkt(); // move a byte to the packet buffer
uint8_t peekNextByte(); // value of next byte in buffer.
bool empty() { return m_bufProcessed == m_bufSize; };
// bytes processed.
uint32_t processed() { return m_bufProcessed; };
// buffer size;
uint32_t size() { return m_bufSize; }
private:
uint32_t m_bufSize;
uint32_t m_bufProcessed;
const uint8_t *m_pBuffer;
std::vector<uint8_t> *pkt;
};
class EtmV4IPktProcImpl
{
public:
@ -81,11 +106,12 @@ class EtmV4IPktProcImpl
EtmV4Config m_config;
/** packet data **/
std::vector<uint8_t> m_currPacketData; // raw data
TraceRawBuffer m_trcIn; // trace data in buffer
std::vector<uint8_t> m_currPacketData; // raw data packet
int m_currPktIdx; // index into raw packet when expanding
EtmV4ITrcPacket m_curr_packet; // expanded packet
ocsd_trc_index_t m_packet_index; // index of the start of the current packet
uint32_t m_blockBytesProcessed; // number of bytes processed in the current data block
// uint32_t m_blockBytesProcessed; // number of bytes processed in the current data block
ocsd_trc_index_t m_blockIndex; // index at the start of the current data block being processed
// searching for sync
@ -110,9 +136,9 @@ class EtmV4IPktProcImpl
#define TINFO_KEY_SECT 0x02
#define TINFO_SPEC_SECT 0x04
#define TINFO_CYCT_SECT 0x08
#define TINFO_CTRL 0x10
#define TINFO_ALL_SECT 0x0F
#define TINFO_ALL 0x1F
#define TINFO_CTRL 0x20
#define TINFO_ALL_SECT 0x1F
#define TINFO_ALL 0x3F
// address and context packets
@ -152,24 +178,25 @@ class EtmV4IPktProcImpl
ocsd_datapath_resp_t outputPacket();
ocsd_datapath_resp_t outputUnsyncedRawPacket();
void iNotSync(); // not synced yet
void iPktNoPayload(); // process a single byte packet
void iPktReserved(); // deal with reserved header value
void iPktExtension();
void iPktASync();
void iPktTraceInfo();
void iPktTimestamp();
void iPktException();
void iPktCycleCntF123();
void iPktSpeclRes();
void iPktCondInstr();
void iPktCondResult();
void iPktContext();
void iPktAddrCtxt();
void iPktShortAddr();
void iPktLongAddr();
void iPktQ();
void iAtom();
void iNotSync(const uint8_t lastByte); // not synced yet
void iPktNoPayload(const uint8_t lastByte); // process a single byte packet
void iPktReserved(const uint8_t lastByte); // deal with reserved header value
void iPktExtension(const uint8_t lastByte);
void iPktASync(const uint8_t lastByte);
void iPktTraceInfo(const uint8_t lastByte);
void iPktTimestamp(const uint8_t lastByte);
void iPktException(const uint8_t lastByte);
void iPktCycleCntF123(const uint8_t lastByte);
void iPktSpeclRes(const uint8_t lastByte);
void iPktCondInstr(const uint8_t lastByte);
void iPktCondResult(const uint8_t lastByte);
void iPktContext(const uint8_t lastByte);
void iPktAddrCtxt(const uint8_t lastByte);
void iPktShortAddr(const uint8_t lastByte);
void iPktLongAddr(const uint8_t lastByte);
void iPktQ(const uint8_t lastByte);
void iAtom(const uint8_t lastByte);
void iPktInvalidCfg(const uint8_t lastByte); // packet invalid in current config.
unsigned extractContField(const std::vector<uint8_t> &buffer, const unsigned st_idx, uint32_t &value, const unsigned byte_limit = 5);
unsigned extractContField64(const std::vector<uint8_t> &buffer, const unsigned st_idx, uint64_t &value, const unsigned byte_limit = 9);
@ -180,7 +207,7 @@ class EtmV4IPktProcImpl
int extractShortAddr(const std::vector<uint8_t> &buffer, const int st_idx, const uint8_t IS, uint32_t &value, int &bits);
// packet processing is table driven.
typedef void (EtmV4IPktProcImpl::*PPKTFN)(void);
typedef void (EtmV4IPktProcImpl::*PPKTFN)(uint8_t);
PPKTFN m_pIPktFn;
struct _pkt_i_table_t {

View File

@ -40,6 +40,8 @@ ocsd_err_t TrcIDecode::DecodeInstruction(ocsd_instr_info *instr_info)
{
ocsd_err_t err = OCSD_OK;
clear_instr_subtype();
SetArchVersion(instr_info);
switch(instr_info->isa)
{
case ocsd_isa_arm:
@ -65,6 +67,22 @@ ocsd_err_t TrcIDecode::DecodeInstruction(ocsd_instr_info *instr_info)
return err;
}
void TrcIDecode::SetArchVersion(ocsd_instr_info *instr_info)
{
uint16_t arch = 0x0700;
switch (instr_info->pe_type.arch)
{
case ARCH_V8: arch = 0x0800; break;
case ARCH_V8r3: arch = 0x0803; break;
case ARCH_V7:
default:
break;
}
set_arch_version(arch);
}
ocsd_err_t TrcIDecode::DecodeA32(ocsd_instr_info *instr_info)
{
uint32_t branchAddr = 0;
@ -107,7 +125,13 @@ ocsd_err_t TrcIDecode::DecodeA32(ocsd_instr_info *instr_info)
break;
}
}
else if (instr_info->wfi_wfe_branch)
{
if (inst_ARM_wfiwfe(instr_info->opcode))
{
instr_info->type = OCSD_INSTR_WFI_WFE;
}
}
instr_info->is_conditional = inst_ARM_is_conditional(instr_info->opcode);
return OCSD_OK;
@ -123,17 +147,17 @@ ocsd_err_t TrcIDecode::DecodeA64(ocsd_instr_info *instr_info)
instr_info->next_isa = instr_info->isa; // assume same ISA
instr_info->is_link = 0;
if(inst_A64_is_indirect_branch(instr_info->opcode))
if(inst_A64_is_indirect_branch_link(instr_info->opcode, &instr_info->is_link))
{
instr_info->type = OCSD_INSTR_BR_INDIRECT;
instr_info->is_link = inst_A64_is_branch_and_link(instr_info->opcode);
// instr_info->is_link = inst_A64_is_branch_and_link(instr_info->opcode);
}
else if(inst_A64_is_direct_branch(instr_info->opcode))
else if(inst_A64_is_direct_branch_link(instr_info->opcode, &instr_info->is_link))
{
inst_A64_branch_destination(instr_info->instr_addr,instr_info->opcode,&branchAddr);
instr_info->type = OCSD_INSTR_BR;
instr_info->branch_addr = (ocsd_vaddr_t)branchAddr;
instr_info->is_link = inst_A64_is_branch_and_link(instr_info->opcode);
// instr_info->is_link = inst_A64_is_branch_and_link(instr_info->opcode);
}
else if((barrier = inst_A64_barrier(instr_info->opcode)) != ARM_BARRIER_NONE)
{
@ -150,6 +174,13 @@ ocsd_err_t TrcIDecode::DecodeA64(ocsd_instr_info *instr_info)
break;
}
}
else if (instr_info->wfi_wfe_branch)
{
if (inst_A64_wfiwfe(instr_info->opcode))
{
instr_info->type = OCSD_INSTR_WFI_WFE;
}
}
instr_info->is_conditional = inst_A64_is_conditional(instr_info->opcode);
@ -172,20 +203,20 @@ ocsd_err_t TrcIDecode::DecodeT32(ocsd_instr_info *instr_info)
instr_info->type = OCSD_INSTR_OTHER; // default type
instr_info->next_isa = instr_info->isa; // assume same ISA
instr_info->is_link = 0;
instr_info->is_conditional = 0;
if(inst_Thumb_is_indirect_branch(instr_info->opcode))
{
instr_info->type = OCSD_INSTR_BR_INDIRECT;
instr_info->is_link = inst_Thumb_is_branch_and_link(instr_info->opcode);
}
else if(inst_Thumb_is_direct_branch(instr_info->opcode))
if(inst_Thumb_is_direct_branch_link(instr_info->opcode,&instr_info->is_link, &instr_info->is_conditional))
{
inst_Thumb_branch_destination((uint32_t)instr_info->instr_addr,instr_info->opcode,&branchAddr);
instr_info->type = OCSD_INSTR_BR;
instr_info->branch_addr = (ocsd_vaddr_t)(branchAddr & ~0x1);
if((branchAddr & 0x1) == 0)
instr_info->next_isa = ocsd_isa_arm;
instr_info->is_link = inst_Thumb_is_branch_and_link(instr_info->opcode);
}
else if (inst_Thumb_is_indirect_branch_link(instr_info->opcode, &instr_info->is_link))
{
instr_info->type = OCSD_INSTR_BR_INDIRECT;
}
else if((barrier = inst_Thumb_barrier(instr_info->opcode)) != ARM_BARRIER_NONE)
{
@ -202,7 +233,13 @@ ocsd_err_t TrcIDecode::DecodeT32(ocsd_instr_info *instr_info)
break;
}
}
else if (instr_info->wfi_wfe_branch)
{
if (inst_Thumb_wfiwfe(instr_info->opcode))
{
instr_info->type = OCSD_INSTR_WFI_WFE;
}
}
instr_info->is_conditional = inst_Thumb_is_conditional(instr_info->opcode);
instr_info->thumb_it_conditions = inst_Thumb_is_IT(instr_info->opcode);

View File

@ -5,7 +5,6 @@
* \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
*/
/*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -40,13 +39,15 @@ block identification and trace decode.
#include "i_dec/trc_idec_arminst.h"
#include <stddef.h> /* for NULL */
#include <assert.h>
static ocsd_instr_subtype instr_sub_type = OCSD_S_INSTR_NONE;
/* need to spot the architecture version for certain instructions */
static uint16_t arch_version = 0x70;
ocsd_instr_subtype get_instr_subtype()
{
return instr_sub_type;
@ -57,6 +58,11 @@ void clear_instr_subtype()
instr_sub_type = OCSD_S_INSTR_NONE;
}
void set_arch_version(uint16_t version)
{
arch_version = version;
}
int inst_ARM_is_direct_branch(uint32_t inst)
{
int is_direct_branch = 1;
@ -75,6 +81,15 @@ int inst_ARM_is_direct_branch(uint32_t inst)
return is_direct_branch;
}
int inst_ARM_wfiwfe(uint32_t inst)
{
if ( ((inst & 0xf0000000) != 0xf0000000) &&
((inst & 0x0ffffffe) == 0x0320f002)
)
/* WFI & WFE may be traced as branches in etm4.3 ++ */
return 1;
return 0;
}
int inst_ARM_is_indirect_branch(uint32_t inst)
{
@ -88,14 +103,24 @@ int inst_ARM_is_indirect_branch(uint32_t inst)
}
} else if ((inst & 0x0ff000d0) == 0x01200010) {
/* BLX (register), BX */
if ((inst & 0xFF) == 0x1E)
instr_sub_type = OCSD_S_INSTR_V7_IMPLIED_RET; /* BX LR */
} else if ((inst & 0x0ff000f0) == 0x01200020) {
/* BXJ: in v8 this behaves like BX */
} else if ((inst & 0x0e108000) == 0x08108000) {
/* POP {...,pc} or LDMxx {...,pc} */
if ((inst & 0x0FFFA000) == 0x08BD8000) /* LDMIA SP!,{...,pc} */
instr_sub_type = OCSD_S_INSTR_V7_IMPLIED_RET;
} else if ((inst & 0x0e50f000) == 0x0410f000) {
/* LDR PC,imm... inc. POP {PC} */
if ( (inst & 0x01ff0000) == 0x009D0000)
instr_sub_type = OCSD_S_INSTR_V7_IMPLIED_RET; /* LDR PC, [SP], #imm */
} else if ((inst & 0x0e50f010) == 0x0610f000) {
/* LDR PC,reg */
} else if ((inst & 0x0fe0f000) == 0x01a0f000) {
/* MOV PC,rx */
if ((inst & 0x00100FFF) == 0x00E) /* ensure the S=0, LSL #0 variant - i.e plain MOV */
instr_sub_type = OCSD_S_INSTR_V7_IMPLIED_RET; /* MOV PC, R14 */
} else if ((inst & 0x0f900080) == 0x01000000) {
/* "Miscellaneous instructions" - in DP space */
is_indirect_branch = 0;
@ -119,39 +144,88 @@ int inst_ARM_is_indirect_branch(uint32_t inst)
return is_indirect_branch;
}
int inst_Thumb_is_direct_branch(uint32_t inst)
{
uint8_t link, cond;
return inst_Thumb_is_direct_branch_link(inst, &link, &cond);
}
int inst_Thumb_is_direct_branch_link(uint32_t inst, uint8_t *is_link, uint8_t *is_cond)
{
int is_direct_branch = 1;
if ((inst & 0xf0000000) == 0xd0000000 && (inst & 0x0e000000) != 0x0e000000) {
/* B<c> (encoding T1) */
*is_cond = 1;
} else if ((inst & 0xf8000000) == 0xe0000000) {
/* B (encoding T2) */
} else if ((inst & 0xf800d000) == 0xf0008000 && (inst & 0x03800000) != 0x03800000) {
/* B (encoding T3) */
*is_cond = 1;
} else if ((inst & 0xf8009000) == 0xf0009000) {
/* B (encoding T4); BL (encoding T1) */
if (inst & 0x00004000) {
*is_link = 1;
instr_sub_type = OCSD_S_INSTR_BR_LINK;
}
} else if ((inst & 0xf800d001) == 0xf000c000) {
/* BLX (imm) (encoding T2) */
*is_link = 1;
instr_sub_type = OCSD_S_INSTR_BR_LINK;
} else if ((inst & 0xf5000000) == 0xb1000000) {
/* CB(NZ) */
*is_cond = 1;
} else {
is_direct_branch = 0;
}
return is_direct_branch;
}
int inst_Thumb_wfiwfe(uint32_t inst)
{
int is_wfiwfe = 1;
/* WFI, WFE may be branches in etm4.3++ */
if ((inst & 0xfffffffe) == 0xf3af8002) {
/* WFI & WFE (encoding T2) */
}
else if ((inst & 0xffef0000) == 0xbf200000) {
/* WFI & WFE (encoding T1) */
}
else {
is_wfiwfe = 0;
}
return is_wfiwfe;
}
int inst_Thumb_is_indirect_branch(uint32_t inst)
{
uint8_t link;
return inst_Thumb_is_indirect_branch_link(inst, &link);
}
int inst_Thumb_is_indirect_branch_link(uint32_t inst, uint8_t *is_link)
{
/* See e.g. PFT Table 2-3 and Table 2-5 */
int is_branch = 1;
if ((inst & 0xff000000) == 0x47000000) {
/* BX, BLX (reg) */
/* BX, BLX (reg) [v8M includes BXNS, BLXNS] */
if (inst & 0x00800000) {
*is_link = 1;
instr_sub_type = OCSD_S_INSTR_BR_LINK;
}
else if ((inst & 0x00780000) == 0x00700000) {
instr_sub_type = OCSD_S_INSTR_V7_IMPLIED_RET; /* BX LR */
}
} else if ((inst & 0xfff0d000) == 0xf3c08000) {
/* BXJ: in v8 this behaves like BX */
} else if ((inst & 0xff000000) == 0xbd000000) {
/* POP {pc} */
instr_sub_type = OCSD_S_INSTR_V7_IMPLIED_RET;
} else if ((inst & 0xfd870000) == 0x44870000) {
/* MOV PC,reg or ADD PC,reg */
if ((inst & 0xffff0000) == 0x46f700000)
instr_sub_type = OCSD_S_INSTR_V7_IMPLIED_RET; /* MOV PC,LR */
} else if ((inst & 0xfff0ffe0) == 0xe8d0f000) {
/* TBB/TBH */
} else if ((inst & 0xffd00000) == 0xe8100000) {
@ -166,18 +240,27 @@ int inst_Thumb_is_indirect_branch(uint32_t inst)
/* LDR PC,literal (T2) */
} else if ((inst & 0xfff0f800) == 0xf850f800) {
/* LDR PC,imm (T4) */
if((inst & 0x000f0f00) == 0x000d0b00)
instr_sub_type = OCSD_S_INSTR_V7_IMPLIED_RET; /* LDR PC, [SP], #imm*/
} else if ((inst & 0xfff0ffc0) == 0xf850f000) {
/* LDR PC,reg (T2) */
} else if ((inst & 0xfe508000) == 0xe8108000) {
/* LDM PC */
if ((inst & 0x0FFF0000) == 0x08BD0000) /* LDMIA [SP]!, */
instr_sub_type = OCSD_S_INSTR_V7_IMPLIED_RET; /* POP {...,pc} */
} else {
is_branch = 0;
}
return is_branch;
}
int inst_A64_is_direct_branch(uint32_t inst)
{
uint8_t link = 0;
return inst_A64_is_direct_branch_link(inst, &link);
}
int inst_A64_is_direct_branch_link(uint32_t inst, uint8_t *is_link)
{
int is_direct_branch = 1;
if ((inst & 0x7c000000) == 0x34000000) {
@ -186,31 +269,75 @@ int inst_A64_is_direct_branch(uint32_t inst)
/* B<cond> */
} else if ((inst & 0x7c000000) == 0x14000000) {
/* B, BL imm */
if (inst & 0x80000000) {
*is_link = 1;
instr_sub_type = OCSD_S_INSTR_BR_LINK;
}
} else {
is_direct_branch = 0;
}
return is_direct_branch;
}
int inst_A64_wfiwfe(uint32_t inst)
{
/* WFI, WFE may be traced as branches in etm 4.3++ */
if ((inst & 0xffffffdf) == 0xd503205f)
return 1;
return 0;
}
int inst_A64_is_indirect_branch(uint32_t inst)
{
uint8_t link = 0;
return inst_A64_is_indirect_branch_link(inst, &link);
}
int inst_A64_is_indirect_branch_link(uint32_t inst, uint8_t *is_link)
{
int is_indirect_branch = 1;
if ((inst & 0xffdffc1f) == 0xd61f0000) {
/* BR, BLR */
if (inst & 0x00200000) {
*is_link = 1;
instr_sub_type = OCSD_S_INSTR_BR_LINK;
}
} else if ((inst & 0xfffffc1f) == 0xd65f0000) {
instr_sub_type = OCSD_S_INSTR_V8_RET;
/* RET */
} else if ((inst & 0xffffffff) == 0xd69f03e0) {
/* ERET */
instr_sub_type = OCSD_S_INSTR_V8_ERET;
} else if (arch_version >= 0x0803) {
/* new pointer auth instr for v8.3 arch */
if ((inst & 0xffdff800) == 0xd61f0800) {
/* BRAA, BRAB, BLRAA, BLRBB */
if (inst & 0x00200000) {
*is_link = 1;
instr_sub_type = OCSD_S_INSTR_BR_LINK;
}
} else if ((inst & 0xffdff81F) == 0xd71f081F) {
/* BRAAZ, BRABZ, BLRAAZ, BLRBBZ */
if (inst & 0x00200000) {
*is_link = 1;
instr_sub_type = OCSD_S_INSTR_BR_LINK;
}
} else if ((inst & 0xfffffbff) == 0xd69f0bff) {
/* ERETAA, ERETAB */
instr_sub_type = OCSD_S_INSTR_V8_ERET;
} else if ((inst & 0xfffffbff) == 0xd65f0bff) {
/* RETAA, RETAB */
instr_sub_type = OCSD_S_INSTR_V8_RET;
} else {
is_indirect_branch = 0;
}
} else {
is_indirect_branch = 0;
}
return is_indirect_branch;
}
int inst_ARM_branch_destination(uint32_t addr, uint32_t inst, uint32_t *pnpc)
{
uint32_t npc;
@ -235,7 +362,6 @@ int inst_ARM_branch_destination(uint32_t addr, uint32_t inst, uint32_t *pnpc)
return is_direct_branch;
}
int inst_Thumb_branch_destination(uint32_t addr, uint32_t inst, uint32_t *pnpc)
{
uint32_t npc;
@ -290,7 +416,6 @@ int inst_Thumb_branch_destination(uint32_t addr, uint32_t inst, uint32_t *pnpc)
return is_direct_branch;
}
int inst_A64_branch_destination(uint64_t addr, uint32_t inst, uint64_t *pnpc)
{
uint64_t npc;
@ -322,21 +447,18 @@ int inst_ARM_is_branch(uint32_t inst)
inst_ARM_is_direct_branch(inst);
}
int inst_Thumb_is_branch(uint32_t inst)
{
return inst_Thumb_is_indirect_branch(inst) ||
inst_Thumb_is_direct_branch(inst);
}
int inst_A64_is_branch(uint32_t inst)
{
return inst_A64_is_indirect_branch(inst) ||
inst_A64_is_direct_branch(inst);
}
int inst_ARM_is_branch_and_link(uint32_t inst)
{
int is_branch = 1;
@ -359,7 +481,6 @@ int inst_ARM_is_branch_and_link(uint32_t inst)
return is_branch;
}
int inst_Thumb_is_branch_and_link(uint32_t inst)
{
int is_branch = 1;
@ -375,7 +496,6 @@ int inst_Thumb_is_branch_and_link(uint32_t inst)
return is_branch;
}
int inst_A64_is_branch_and_link(uint32_t inst)
{
int is_branch = 1;
@ -385,19 +505,28 @@ int inst_A64_is_branch_and_link(uint32_t inst)
} else if ((inst & 0xfc000000) == 0x94000000) {
/* BL */
instr_sub_type = OCSD_S_INSTR_BR_LINK;
} else if (arch_version >= 0x0803) {
/* new pointer auth instr for v8.3 arch */
if ((inst & 0xfffff800) == 0xd73f0800) {
/* BLRAA, BLRBB */
instr_sub_type = OCSD_S_INSTR_BR_LINK;
} else if ((inst & 0xfffff81F) == 0xd63f081F) {
/* BLRAAZ, BLRBBZ */
instr_sub_type = OCSD_S_INSTR_BR_LINK;
} else {
is_branch = 0;
}
} else {
is_branch = 0;
}
return is_branch;
}
int inst_ARM_is_conditional(uint32_t inst)
{
return (inst & 0xe0000000) != 0xe0000000;
}
int inst_Thumb_is_conditional(uint32_t inst)
{
if ((inst & 0xf0000000) == 0xd0000000 && (inst & 0x0e000000) != 0x0e000000) {
@ -413,7 +542,6 @@ int inst_Thumb_is_conditional(uint32_t inst)
return 0;
}
unsigned int inst_Thumb_is_IT(uint32_t inst)
{
if ((inst & 0xff000000) == 0xbf000000 &&
@ -433,7 +561,6 @@ unsigned int inst_Thumb_is_IT(uint32_t inst)
}
}
/*
Test whether an A64 instruction is conditional.
@ -454,7 +581,6 @@ int inst_A64_is_conditional(uint32_t inst)
return 0;
}
arm_barrier_t inst_ARM_barrier(uint32_t inst)
{
if ((inst & 0xfff00000) == 0xf5700000) {
@ -484,7 +610,6 @@ arm_barrier_t inst_ARM_barrier(uint32_t inst)
}
}
arm_barrier_t inst_Thumb_barrier(uint32_t inst)
{
if ((inst & 0xffffff00) == 0xf3bf8f00) {
@ -516,7 +641,6 @@ arm_barrier_t inst_Thumb_barrier(uint32_t inst)
}
}
arm_barrier_t inst_A64_barrier(uint32_t inst)
{
if ((inst & 0xfffff09f) == 0xd503309f) {
@ -535,20 +659,17 @@ arm_barrier_t inst_A64_barrier(uint32_t inst)
}
}
int inst_ARM_is_UDF(uint32_t inst)
{
return (inst & 0xfff000f0) == 0xe7f000f0;
}
int inst_Thumb_is_UDF(uint32_t inst)
{
return (inst & 0xff000000) == 0xde000000 || /* T1 */
(inst & 0xfff0f000) == 0xf7f0a000; /* T2 */
}
int inst_A64_is_UDF(uint32_t inst)
{
/* No A64 encodings are formally allocated as permanently undefined,

View File

@ -42,7 +42,7 @@ TrcMemAccBufPtr::TrcMemAccBufPtr(const ocsd_vaddr_t s_address, const uint8_t *p_
{
}
const uint32_t TrcMemAccBufPtr::readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint32_t reqBytes, uint8_t *byteBuffer)
const uint32_t TrcMemAccBufPtr::readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint8_t trcID, const uint32_t reqBytes, uint8_t *byteBuffer)
{
// mapper wlll filter memory spaces.
uint32_t bytesRead = bytesInRange(address,reqBytes); // check bytes available

View File

@ -0,0 +1,176 @@
/*!
* \file trc_mem_acc_cache.cpp
* \brief OpenCSD : Memory accessor cache.
*
* \copyright Copyright (c) 2018, ARM Limited. All Rights Reserved.
*/
/*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <cstring>
#include <sstream>
#include <iomanip>
#include "mem_acc/trc_mem_acc_cache.h"
#include "mem_acc/trc_mem_acc_base.h"
#include "interfaces/trc_error_log_i.h"
#ifdef LOG_CACHE_STATS
#define INC_HITS_RL(idx) m_hits++; m_hit_rl[m_mru_idx]++;
#define INC_MISS() m_misses++;
#define INC_PAGES() m_pages++;
#define SET_MAX_RL(idx) \
{ \
if (m_hit_rl_max[idx] < m_hit_rl[idx]) \
m_hit_rl_max[idx] = m_hit_rl[idx]; \
m_hit_rl[idx] = 0; \
}
#define INC_RL(idx) m_hit_rl[m_mru_idx]++;
#else
#define INC_HITS_RL(idx)
#define INC_MISS()
#define INC_PAGES()
#define SET_MAX_RL(idx)
#define INC_RL(idx)
#endif
// uncomment to log cache ops
//#define LOG_CACHE_OPS
ocsd_err_t TrcMemAccCache::readBytesFromCache(TrcMemAccessorBase *p_accessor, const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint8_t trcID, uint32_t *numBytes, uint8_t *byteBuffer)
{
uint32_t bytesRead = 0, reqBytes = *numBytes;
ocsd_err_t err = OCSD_OK;
#ifdef LOG_CACHE_OPS
std::ostringstream oss;
#endif
if (m_bCacheEnabled)
{
if (blockInCache(address, reqBytes))
{
bytesRead = reqBytes;
memcpy(byteBuffer, &m_mru[m_mru_idx].data[address - m_mru[m_mru_idx].st_addr], reqBytes);
#ifdef LOG_CACHE_OPS
oss << "TrcMemAccCache:: hit [page: " << std::dec << m_mru_idx << "[addr:0x" << std::hex << address << ", bytes: " << std::dec << reqBytes << "]\n";
logMsg(oss.str());
#endif
INC_HITS_RL(m_mru_idx);
}
else
{
INC_MISS();
#ifdef LOG_CACHE_OPS
oss << "TrcMemAccCache:: miss [addr:0x" << std::hex << address << ", bytes: " << std::dec << reqBytes << "]\n";
logMsg(oss.str());
#endif
/* need a new cache page - check the underlying accessor for the data */
m_mru_idx = m_mru_next_new;
m_mru[m_mru_idx].valid_len = p_accessor->readBytes(address, mem_space, trcID, MEM_ACC_CACHE_PAGE_SIZE, &m_mru[m_mru_idx].data[0]);
/* check return length valid - v bad if return length more than request */
if (m_mru[m_mru_idx].valid_len > MEM_ACC_CACHE_PAGE_SIZE)
{
m_mru[m_mru_idx].valid_len = 0; // set to nothing returned.
err = OCSD_ERR_MEM_ACC_BAD_LEN;
}
if (m_mru[m_mru_idx].valid_len > 0)
{
// got some data - so save the
m_mru[m_mru_idx].st_addr = address;
// log the run length hit counts
SET_MAX_RL(m_mru_idx);
#ifdef LOG_CACHE_OPS
oss.str("");
oss << "TrcMemAccCache:: load [page: " << std::dec << m_mru_idx << "[addr:0x" << std::hex << address << ", bytes: " << std::dec << m_mru[m_mru_idx].valid_len << "]\n";
logMsg(oss.str());
#endif
INC_PAGES();
// increment the next new page counter.
m_mru_next_new++;
if (m_mru_next_new == MEM_ACC_CACHE_MRU_SIZE)
m_mru_next_new = 0;
if (blockInPage(address, reqBytes)) /* check we got the data we needed */
{
bytesRead = reqBytes;
memcpy(byteBuffer, &m_mru[m_mru_idx].data[address - m_mru[m_mru_idx].st_addr], reqBytes);
INC_RL(m_mru_idx);
}
else
{
#ifdef LOG_CACHE_OPS
oss.str("");
oss << "TrcMemAccCache:: miss-after-load [page: " << std::dec << m_mru_idx << "[addr:0x" << std::hex << address << ", bytes: " << std::dec << m_mru[m_mru_idx].valid_len << "]\n";
logMsg(oss.str());
#endif
INC_MISS();
}
}
}
}
*numBytes = bytesRead;
return err;
}
void TrcMemAccCache::logMsg(const std::string &szMsg)
{
if (m_err_log)
m_err_log->LogMessage(ITraceErrorLog::HANDLE_GEN_INFO, OCSD_ERR_SEV_INFO, szMsg);
}
void TrcMemAccCache::setErrorLog(ITraceErrorLog *log)
{
m_err_log = log;
}
void TrcMemAccCache::logAndClearCounts()
{
#ifdef LOG_CACHE_STATS
std::ostringstream oss;
oss << "TrcMemAccCache:: cache performance: hits(" << std::dec << m_hits << "), miss(" << m_misses << "), pages(" << m_pages << ")\n";
logMsg(oss.str());
for (int i = 0; i < MEM_ACC_CACHE_MRU_SIZE; i++)
{
if (m_hit_rl_max[i] < m_hit_rl[i])
m_hit_rl_max[i] = m_hit_rl[i];
oss.str("");
oss << "Run length max page " << std::dec << i << ": " << m_hit_rl_max[i] << "\n";
logMsg(oss.str());
}
m_hits = m_misses = m_pages = 0;
#endif
}
/* End of File trc_mem_acc_cache.cpp */

View File

@ -19,13 +19,15 @@ TrcMemAccCB::TrcMemAccCB(const ocsd_vaddr_t s_address,
}
/** Memory access override - allow decoder to read bytes from the buffer. */
const uint32_t TrcMemAccCB::readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t memSpace, const uint32_t reqBytes, uint8_t *byteBuffer)
const uint32_t TrcMemAccCB::readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t memSpace, const uint8_t trcID, const uint32_t reqBytes, uint8_t *byteBuffer)
{
// if we have a callback object, use it to call back.
if(m_p_CBclass)
return m_p_CBclass->readBytes(address,memSpace,reqBytes,byteBuffer);
if(m_p_CBfn)
return m_p_CBfn(m_p_cbfn_context, address,memSpace,reqBytes,byteBuffer);
if (m_p_CBIDfn)
return m_p_CBIDfn(m_p_cbfn_context, address, memSpace, trcID, reqBytes, byteBuffer);
return 0;
}

View File

@ -199,7 +199,7 @@ TrcMemAccessorFile * TrcMemAccessorFile::getExistingFileAccessor(const std::stri
/***************************************************/
/* accessor instance functions */
/***************************************************/
const uint32_t TrcMemAccessorFile::readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint32_t reqBytes, uint8_t *byteBuffer)
const uint32_t TrcMemAccessorFile::readBytes(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint8_t trcID, const uint32_t reqBytes, uint8_t *byteBuffer)
{
if(!m_mem_file.is_open())
return 0;

View File

@ -34,17 +34,23 @@
#include "mem_acc/trc_mem_acc_mapper.h"
#include "mem_acc/trc_mem_acc_file.h"
#include "common/ocsd_error.h"
/************************************************************************************/
/* mappers base class */
/************************************************************************************/
#define USING_MEM_ACC_CACHE
TrcMemAccMapper::TrcMemAccMapper() :
m_acc_curr(0),
m_trace_id_curr(0),
m_using_trace_id(false),
m_err_log(0)
{
#ifdef USING_MEM_ACC_CACHE
m_cache.enableCaching(true);
#endif
}
TrcMemAccMapper::TrcMemAccMapper(bool using_trace_id) :
@ -53,27 +59,64 @@ TrcMemAccMapper::TrcMemAccMapper(bool using_trace_id) :
m_using_trace_id(using_trace_id),
m_err_log(0)
{
#ifdef USING_MEM_ACC_CACHE
m_cache.enableCaching(true);
#endif
}
TrcMemAccMapper::~TrcMemAccMapper()
{
}
void TrcMemAccMapper::setErrorLog(ITraceErrorLog *err_log_i)
{
m_err_log = err_log_i;
m_cache.setErrorLog(err_log_i);
}
// memory access interface
ocsd_err_t TrcMemAccMapper::ReadTargetMemory(const ocsd_vaddr_t address, const uint8_t cs_trace_id, const ocsd_mem_space_acc_t mem_space, uint32_t *num_bytes, uint8_t *p_buffer)
{
bool bReadFromCurr = true;
uint32_t readBytes = 0;
ocsd_err_t err = OCSD_OK;
/* see if the address is in any range we know */
if(!readFromCurrent(address, mem_space, cs_trace_id))
bReadFromCurr = findAccessor(address, mem_space, cs_trace_id);
if (!readFromCurrent(address, mem_space, cs_trace_id))
{
bReadFromCurr = findAccessor(address, mem_space, cs_trace_id);
// found a new accessor - invalidate any cache entries used by the previous one.
if (m_cache.enabled() && bReadFromCurr)
m_cache.invalidateAll();
}
/* if bReadFromCurr then we know m_acc_curr is set */
if(bReadFromCurr)
*num_bytes = m_acc_curr->readBytes(address, mem_space, *num_bytes,p_buffer);
else
*num_bytes = 0;
return OCSD_OK;
if (bReadFromCurr)
{
// use cache if enabled and the amount fits into a cache page
if (m_cache.enabled_for_size(*num_bytes))
{
// read from cache - or load a new cache page and read....
readBytes = *num_bytes;
err = m_cache.readBytesFromCache(m_acc_curr, address, mem_space, cs_trace_id, &readBytes, p_buffer);
if (err != OCSD_OK)
LogWarn(err, "Mem Acc: Cache access error");
}
else
{
readBytes = m_acc_curr->readBytes(address, mem_space, cs_trace_id, *num_bytes, p_buffer);
// guard against bad accessor returns (e.g. callback not obeying the rules for return values)
if (readBytes > *num_bytes)
{
err = OCSD_ERR_MEM_ACC_BAD_LEN;
LogWarn(err,"Mem acc: bad return length");
}
}
}
*num_bytes = readBytes;
return err;
}
void TrcMemAccMapper::RemoveAllAccessors()
@ -84,8 +127,12 @@ void TrcMemAccMapper::RemoveAllAccessors()
{
TrcMemAccFactory::DestroyAccessor(pAcc);
pAcc = getNextAccessor();
if (m_cache.enabled())
m_cache.invalidateAll();
}
clearAccessorList();
if (m_cache.enabled())
m_cache.logAndClearCounts();
}
ocsd_err_t TrcMemAccMapper::RemoveAccessorByAddress(const ocsd_vaddr_t st_address, const ocsd_mem_space_acc_t mem_space, const uint8_t cs_trace_id /* = 0 */)
@ -95,9 +142,13 @@ ocsd_err_t TrcMemAccMapper::RemoveAccessorByAddress(const ocsd_vaddr_t st_addres
{
err = RemoveAccessor(m_acc_curr);
m_acc_curr = 0;
if (m_cache.enabled())
m_cache.invalidateAll();
}
else
err = OCSD_ERR_INVALID_PARAM_VAL;
if (m_cache.enabled())
m_cache.logAndClearCounts();
return err;
}
@ -107,6 +158,16 @@ void TrcMemAccMapper::LogMessage(const std::string &msg)
m_err_log->LogMessage(ITraceErrorLog::HANDLE_GEN_INFO,OCSD_ERR_SEV_INFO,msg);
}
void TrcMemAccMapper::LogWarn(const ocsd_err_t err, const std::string &msg)
{
if (m_err_log)
{
ocsdError err_ocsd(OCSD_ERR_SEV_WARN,err,msg);
m_err_log->LogError(ITraceErrorLog::HANDLE_GEN_INFO, &err_ocsd);
}
}
/************************************************************************************/
/* mappers global address space class - no differentiation in core trace IDs */
/************************************************************************************/

View File

@ -41,6 +41,7 @@ OcsdCodeFollower::OcsdCodeFollower()
m_instr_info.pe_type.profile = profile_Unknown;
m_instr_info.isa = ocsd_isa_unknown;
m_instr_info.dsb_dmb_waypoints = 0;
m_instr_info.wfi_wfe_branch = 0;
m_instr_info.instr_addr = 0;
m_instr_info.opcode = 0;
m_pMemAccess = 0;

View File

@ -105,6 +105,7 @@ DecodeTree::DecodeTree() :
DecodeTree::~DecodeTree()
{
destroyMemAccMapper();
for(uint8_t i = 0; i < 0x80; i++)
{
destroyDecodeElement(i);
@ -314,7 +315,36 @@ ocsd_err_t DecodeTree::addBinFileRegionMemAcc(const ocsd_file_mem_region_t *regi
return err;
}
ocsd_err_t DecodeTree::addCallbackMemAcc(const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAcc_CB p_cb_func, const void *p_context)
ocsd_err_t DecodeTree::updateBinFileRegionMemAcc(const ocsd_file_mem_region_t *region_array, const int num_regions, const ocsd_mem_space_acc_t mem_space, const std::string &filepath)
{
if (!hasMemAccMapper())
return OCSD_ERR_NOT_INIT;
if ((region_array == 0) || (num_regions == 0) || (filepath.length() == 0))
return OCSD_ERR_INVALID_PARAM_VAL;
TrcMemAccessorFile *pAcc = TrcMemAccessorFile::getExistingFileAccessor(filepath);
if (!pAcc)
return OCSD_ERR_INVALID_PARAM_VAL;
int curr_region_idx = 0;
while (curr_region_idx < num_regions)
{
// check "new" range
if (!pAcc->addrStartOfRange(region_array[curr_region_idx].start_address))
{
// ensure adds cleanly
if (!pAcc->AddOffsetRange(region_array[curr_region_idx].start_address,
region_array[curr_region_idx].region_size,
region_array[curr_region_idx].file_offset))
return OCSD_ERR_INVALID_PARAM_VAL; // otherwise bail out
}
curr_region_idx++;
}
return OCSD_OK;
}
ocsd_err_t DecodeTree::initCallbackMemAcc(const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address,
const ocsd_mem_space_acc_t mem_space, void *p_cb_func, bool IDfn, const void *p_context)
{
if(!hasMemAccMapper())
return OCSD_ERR_NOT_INIT;
@ -329,7 +359,11 @@ ocsd_err_t DecodeTree::addCallbackMemAcc(const ocsd_vaddr_t st_address, const oc
TrcMemAccCB *pCBAcc = dynamic_cast<TrcMemAccCB *>(p_accessor);
if(pCBAcc)
{
pCBAcc->setCBIfFn(p_cb_func, p_context);
if (IDfn)
pCBAcc->setCBIDIfFn((Fn_MemAccID_CB)p_cb_func, p_context);
else
pCBAcc->setCBIfFn((Fn_MemAcc_CB)p_cb_func, p_context);
err = m_default_mapper->AddAccessor(p_accessor,0);
}
else
@ -341,6 +375,16 @@ ocsd_err_t DecodeTree::addCallbackMemAcc(const ocsd_vaddr_t st_address, const oc
return err;
}
ocsd_err_t DecodeTree::addCallbackMemAcc(const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAcc_CB p_cb_func, const void *p_context)
{
return initCallbackMemAcc(st_address, en_address, mem_space, (void *)p_cb_func, false, p_context);
}
ocsd_err_t DecodeTree::addCallbackIDMemAcc(const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAccID_CB p_cb_func, const void *p_context)
{
return initCallbackMemAcc(st_address, en_address, mem_space, (void *)p_cb_func, true, p_context);
}
ocsd_err_t DecodeTree::removeMemAccByAddress(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space)
{
if(!hasMemAccMapper())

View File

@ -61,6 +61,7 @@ static const char *s_errorCodeDescs[][2] = {
{"OCSD_ERR_DATA_DECODE_FATAL", "A decoder in the data path has returned a fatal error."},
/* frame deformatter errors */
{"OCSD_ERR_DFMTR_NOTCONTTRACE", "Trace input to deformatter none-continuous"},
{"OCSD_ERR_DFMTR_BAD_FHSYNC", "Bad frame or half frame sync in trace deformatter"},
/* packet processor errors - protocol issues etc */
{"OCSD_ERR_BAD_PACKET_SEQ","Bad packet sequence"},
{"OCSD_ERR_INVALID_PCKT_HDR","Invalid packet header"},
@ -79,6 +80,7 @@ static const char *s_errorCodeDescs[][2] = {
{"OCSD_ERR_MEM_ACC_OVERLAP","Attempted to set an overlapping range in memory access map."},
{"OCSD_ERR_MEM_ACC_FILE_NOT_FOUND","Memory access file could not be opened."},
{"OCSD_ERR_MEM_ACC_FILE_DIFF_RANGE","Attempt to re-use the same memory access file for a different address range."},
{"OCSD_ERR_MEM_ACC_BAD_LEN","Memory accessor returned a bad read length value (larger than requested."},
{"OCSD_ERR_MEM_ACC_RANGE_INVALID","Address range in accessor set to invalid values."},
/* test errors - errors generated only by the test code, not the library */
{"OCSD_ERR_TEST_SNAPSHOT_PARSE", "Test snapshot file parse error"},
@ -90,7 +92,7 @@ static const char *s_errorCodeDescs[][2] = {
{"OCSD_ERR_DCDREG_NAME_UNKNOWN","Attempted to find a decoder with a name that is not known in the library."},
{"OCSD_ERR_DCDREG_TYPE_UNKNOWN","Attempted to find a decoder with a type that is not known in the library."},
/* decoder config */
{"OCSD_ERR_DCD_INTERFACE_UNUSED","Attempt to connect or use and inteface not supported by this decoder."},
{"OCSD_ERR_DCD_INTERFACE_UNUSED","Attempt to connect or use and interface not supported by this decoder."},
/* end marker*/
{"OCSD_ERR_LAST", "No error - error code end marker"}
};

View File

@ -35,7 +35,7 @@
#include "common/ocsd_error_logger.h"
#include <iostream>
//#include <iostream>
#include <sstream>
ocsdDefaultErrorLogger::ocsdDefaultErrorLogger() :

View File

@ -32,7 +32,7 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "ocsd_if_version.h"
#include "opencsd/ocsd_if_version.h"
#include "common/ocsd_version.h"
const uint32_t ocsdVersion::vers_num()

View File

@ -179,6 +179,7 @@ ocsd_err_t TrcPktDecodePtm::onProtocolConfig()
m_instr_info.pe_type.profile = m_config->coreProfile();
m_instr_info.pe_type.arch = m_config->archVersion();
m_instr_info.dsb_dmb_waypoints = m_config->dmsbWayPt() ? 1 : 0;
m_instr_info.wfi_wfe_branch = 0;
return err;
}
@ -576,10 +577,11 @@ ocsd_datapath_resp_t TrcPktDecodePtm::processAtomRange(const ocsd_atm_val A, con
}
m_output_elem.setType(OCSD_GEN_TRC_ELEM_INSTR_RANGE);
m_output_elem.setLastInstrInfo((A == ATOM_E),m_instr_info.type, m_instr_info.sub_type);
m_output_elem.setLastInstrInfo((A == ATOM_E),m_instr_info.type, m_instr_info.sub_type,m_instr_info.instr_size);
m_output_elem.setISA(m_curr_pe_state.isa);
if(m_curr_packet_in->hasCC())
m_output_elem.setCycleCount(m_curr_packet_in->getCCVal());
m_output_elem.setLastInstrCond(m_instr_info.is_conditional);
resp = outputTraceElementIdx(m_index_curr_pkt,m_output_elem);
m_curr_pe_state.instr_addr = m_instr_info.instr_addr;
@ -594,8 +596,9 @@ ocsd_datapath_resp_t TrcPktDecodePtm::processAtomRange(const ocsd_atm_val A, con
{
// some trace before we were out of memory access range
m_output_elem.setType(OCSD_GEN_TRC_ELEM_INSTR_RANGE);
m_output_elem.setLastInstrInfo(true,m_instr_info.type, m_instr_info.sub_type);
m_output_elem.setLastInstrInfo(true,m_instr_info.type, m_instr_info.sub_type,m_instr_info.instr_size);
m_output_elem.setISA(m_curr_pe_state.isa);
m_output_elem.setLastInstrCond(m_instr_info.is_conditional);
resp = outputTraceElementIdx(m_index_curr_pkt,m_output_elem);
}
}
@ -612,6 +615,7 @@ ocsd_err_t TrcPktDecodePtm::traceInstrToWP(bool &bWPFound, const waypoint_trace_
ocsd_mem_space_acc_t mem_space = (m_pe_context.security_level == ocsd_sec_secure) ? OCSD_MEM_SPACE_S : OCSD_MEM_SPACE_N;
m_output_elem.st_addr = m_output_elem.en_addr = m_instr_info.instr_addr;
m_output_elem.num_instr_range = 0;
bWPFound = false;
@ -634,6 +638,7 @@ ocsd_err_t TrcPktDecodePtm::traceInstrToWP(bool &bWPFound, const waypoint_trace_
// update the range decoded address in the output packet.
m_output_elem.en_addr = m_instr_info.instr_addr;
m_output_elem.num_instr_range++;
m_output_elem.last_i_type = m_instr_info.type;
// either walking to match the next instruction address or a real waypoint

View File

@ -39,9 +39,17 @@ static struct _ap_map_elements {
ocsd_arch_profile_t ap;
} ap_map_array[] =
{
{ "Cortex-A77", { ARCH_V8r3, profile_CortexA } },
{ "Cortex-A76", { ARCH_V8r3, profile_CortexA } },
{ "Cortex-A75", { ARCH_V8r3, profile_CortexA } },
{ "Cortex-A73", { ARCH_V8, profile_CortexA } },
{ "Cortex-A72", { ARCH_V8, profile_CortexA } },
{ "Cortex-A65", { ARCH_V8r3, profile_CortexA } },
{ "Cortex-A57", { ARCH_V8, profile_CortexA } },
{ "Cortex-A55", { ARCH_V8r3, profile_CortexA } },
{ "Cortex-A53", { ARCH_V8, profile_CortexA } },
{ "Cortex-A35", { ARCH_V8, profile_CortexA } },
{ "Cortex-A32", { ARCH_V8, profile_CortexA } },
{ "Cortex-A17", { ARCH_V7, profile_CortexA } },
{ "Cortex-A15", { ARCH_V7, profile_CortexA } },
{ "Cortex-A12", { ARCH_V7, profile_CortexA } },
@ -49,9 +57,13 @@ static struct _ap_map_elements {
{ "Cortex-A8", { ARCH_V7, profile_CortexA } },
{ "Cortex-A7", { ARCH_V7, profile_CortexA } },
{ "Cortex-A5", { ARCH_V7, profile_CortexA } },
{ "Cortex-R52", { ARCH_V8, profile_CortexR } },
{ "Cortex-R8", { ARCH_V7, profile_CortexR } },
{ "Cortex-R7", { ARCH_V7, profile_CortexR } },
{ "Cortex-R5", { ARCH_V7, profile_CortexR } },
{ "Cortex-R4", { ARCH_V7, profile_CortexR } },
{ "Cortex-M33", { ARCH_V8, profile_CortexM } },
{ "Cortex-M23", { ARCH_V8, profile_CortexM } },
{ "Cortex-M0", { ARCH_V7, profile_CortexM } },
{ "Cortex-M0+", { ARCH_V7, profile_CortexM } },
{ "Cortex-M3", { ARCH_V7, profile_CortexM } },

View File

@ -393,9 +393,21 @@ bool TraceFmtDcdImpl::checkForSync()
uint32_t TraceFmtDcdImpl::findfirstFSync()
{
uint32_t unsynced = m_in_block_size; // consider entire block as unsynced at present.
//**TBD - handle fsync patterns in TPIU captured code
return unsynced;
uint32_t processed = 0;
const uint32_t FSYNC_PATTERN = 0x7FFFFFFF; // LE host pattern for FSYNC
const uint8_t *dataPtr = m_in_block_base;
while (processed < (m_in_block_size - 3))
{
if (*((uint32_t *)(dataPtr)) == FSYNC_PATTERN)
{
m_frame_synced = true;
break;
}
processed++;
dataPtr++;
}
return processed;
}
void TraceFmtDcdImpl::outputUnsyncedBytes(uint32_t /*num_bytes*/)
@ -453,7 +465,7 @@ bool TraceFmtDcdImpl::extractFrame()
bool cont_process = true; // continue processing after extraction.
uint32_t f_sync_bytes = 0; // skipped f sync bytes
uint32_t h_sync_bytes = 0; // skipped h sync bytes
uint32_t ex_bytes = 0; // extracted bytes
uint32_t ex_bytes = 0; // extracted this pass (may be filling out part frame)
// memory aligned sources are always multiples of frames, aligned to start.
if( m_cfgFlags & OCSD_DFRMTR_FRAME_MEM_ALIGN)
@ -512,8 +524,6 @@ bool TraceFmtDcdImpl::extractFrame()
f_sync_bytes += 4;
dataPtr += 4;
cont_process = (bool)(dataPtr < eodPtr);
// TBD: output raw FSYNC data on raw frame channel.
}
}
@ -526,6 +536,7 @@ bool TraceFmtDcdImpl::extractFrame()
if(*((uint32_t *)(dataPtr)) == FSYNC_PATTERN)
{
// throw an illegal FSYNC error
throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_DFMTR_BAD_FHSYNC, m_trc_curr_idx, "Bad FSYNC in frame.");
}
}
@ -546,12 +557,11 @@ bool TraceFmtDcdImpl::extractFrame()
m_ex_frm_n_bytes-=2;
ex_bytes -= 2;
h_sync_bytes+=2;
// TBD: output raw HSYNC data on raw frame channel.
}
else
{
// throw illegal HSYNC error.
throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_DFMTR_BAD_FHSYNC, m_trc_curr_idx, "Bad HSYNC in frame.");
}
}
@ -565,22 +575,25 @@ bool TraceFmtDcdImpl::extractFrame()
cont_process = true;
}
// total bytes processed this pass
uint32_t total_processed = ex_bytes + f_sync_bytes + h_sync_bytes;
// output raw data on raw frame channel - packed raw.
if ((m_ex_frm_n_bytes == OCSD_DFRMTR_FRAME_SIZE) && m_b_output_packed_raw)
if (((m_ex_frm_n_bytes == OCSD_DFRMTR_FRAME_SIZE) || !cont_process) && m_b_output_packed_raw)
{
outputRawMonBytes( OCSD_OP_DATA,
m_trc_curr_idx,
OCSD_FRM_PACKED,
ex_bytes + f_sync_bytes + h_sync_bytes,
total_processed,
m_in_block_base+m_in_block_processed,
0);
}
// update the processed count for the buffer
m_in_block_processed += m_ex_frm_n_bytes + f_sync_bytes + h_sync_bytes;
m_in_block_processed += total_processed;
// update index past the processed data
m_trc_curr_idx += m_ex_frm_n_bytes + f_sync_bytes + h_sync_bytes;
m_trc_curr_idx += total_processed;
return cont_process;
}
@ -817,7 +830,7 @@ ocsd_err_t TraceFormatterFrameDecoder::Configure(uint32_t cfg_flags)
m_pDecoder = new (std::nothrow) TraceFmtDcdImpl();
if(!m_pDecoder) return OCSD_ERR_MEM;
}
m_pDecoder->m_cfgFlags = cfg_flags;
m_pDecoder->DecodeConfigure(cfg_flags);
return OCSD_OK;
}

View File

@ -49,7 +49,7 @@ static const char *s_elem_descs[][2] =
{"OCSD_GEN_TRC_ELEM_ADDR_NACC","Tracing in inaccessible memory area."},
{"OCSD_GEN_TRC_ELEM_ADDR_UNKNOWN","Tracing unknown address area."},
{"OCSD_GEN_TRC_ELEM_EXCEPTION","Exception"},
{"OCSD_GEN_TRC_ELEM_EXCEPTION_RET","Expection return"},
{"OCSD_GEN_TRC_ELEM_EXCEPTION_RET","Exception return"},
{"OCSD_GEN_TRC_ELEM_TIMESTAMP","Timestamp - preceding elements happeded before this time."},
{"OCSD_GEN_TRC_ELEM_CYCLE_COUNT","Cycle count - cycles since last cycle count value - associated with a preceding instruction range."},
{"OCSD_GEN_TRC_ELEM_EVENT","Event - numbered event or trigger"},
@ -71,7 +71,8 @@ static const char *instr_sub_type[] = {
"--- ",
"b+link ",
"A64:ret ",
"A64:eret "
"A64:eret ",
"V7:impl ret",
};
#define ST_SIZE (sizeof(instr_sub_type) / sizeof(const char *))
@ -105,12 +106,16 @@ void OcsdTraceElement::toString(std::string &str) const
{
case OCSD_GEN_TRC_ELEM_INSTR_RANGE:
oss << "exec range=0x" << std::hex << st_addr << ":[0x" << en_addr << "] ";
oss << "num_i(" << std::dec << num_instr_range << ") ";
oss << "last_sz(" << last_instr_sz << ") ";
oss << "(ISA=" << s_isa_str[(int)isa] << ") ";
oss << ((last_instr_exec == 1) ? "E " : "N ");
if((int)last_i_type < T_SIZE)
oss << instr_type[last_i_type];
if((last_i_subtype != OCSD_S_INSTR_NONE) && ((int)last_i_subtype < ST_SIZE))
oss << instr_sub_type[last_i_subtype];
if (last_instr_cond)
oss << " <cond>";
break;
case OCSD_GEN_TRC_ELEM_ADDR_NACC:
@ -118,9 +123,14 @@ void OcsdTraceElement::toString(std::string &str) const
break;
case OCSD_GEN_TRC_ELEM_EXCEPTION:
if(excep_ret_addr == 1)
if (excep_ret_addr == 1)
{
oss << "pref ret addr:0x" << std::hex << en_addr << "; ";
oss << "pref ret addr:0x" << std::hex << en_addr;
if (excep_ret_addr_br_tgt)
{
oss << " [addr also prev br tgt]";
}
oss << "; ";
}
oss << "excep num (0x" << std::setfill('0') << std::setw(2) << std::hex << exception_number << ") ";
break;
@ -150,6 +160,13 @@ void OcsdTraceElement::toString(std::string &str) const
printSWInfoPkt(oss);
break;
case OCSD_GEN_TRC_ELEM_EVENT:
if(trace_event.ev_type == EVENT_TRIGGER)
oss << " Trigger; ";
else if(trace_event.ev_type == EVENT_NUMBERED)
oss << " Numbered:" << std::dec << trace_event.ev_number << "; ";
break;
default: break;
}
if(has_cc)

View File

@ -63,12 +63,15 @@ void trcPrintableElem::getValStr(std::string &valStr, const int valTotalBitSize,
int validChars = valValidBits / 4;
if((valValidBits % 4) > 0) validChars++;
int QM = numHexChars - validChars;
while(QM)
{
QM--;
valStr += "?";
}
if (validChars < numHexChars)
{
int QM = numHexChars - validChars;
while (QM)
{
QM--;
valStr += "?";
}
}
if(valValidBits > 32)
{
sprintf(szFormatBuffer,"%%0%dllX",validChars); // create the format

View File

@ -88,6 +88,7 @@ SRCS+= \
# MEM_ACC
SRCS+= \
trc_mem_acc_base.cpp \
trc_mem_acc_cache.cpp \
trc_mem_acc_cb.cpp \
trc_mem_acc_mapper.cpp \
trc_mem_acc_bufptr.cpp \