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More accurately handle early EFER restoration on resume.

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Do not try to set LMA bit while CPU is still in legacy mode.
Apparently Intel CPUs ignore non-id writes to LMA, while AMD's
(over-)react with #GP.

Reported and tested by:	danfe
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
This commit is contained in:
Konstantin Belousov 2017-06-11 14:39:08 +00:00
parent cac23196c7
commit fc8929cb29
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=319825
1 changed files with 2 additions and 1 deletions
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3
sys/x86/acpica/acpi_wakeup.c
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@ -224,7 +224,8 @@ acpi_sleep_machdep(struct acpi_softc *sc, int state)
WAKECODE_FIXUP(reset_video, uint8_t, (acpi_reset_video != 0));
#ifdef __amd64__
WAKECODE_FIXUP(wakeup_efer, uint64_t, rdmsr(MSR_EFER));
WAKECODE_FIXUP(wakeup_efer, uint64_t, rdmsr(MSR_EFER) &
~(EFER_LMA));
#else
WAKECODE_FIXUP(wakeup_cr4, register_t, pcb->pcb_cr4);
#endif