arm64, qoriq_therm: fix handling sites on version 1 and 2
For version 2 extend the TMUV2_TMSAR() write loop over all site_ids registered for a particular SoC and actually use the site_id rather than always just the first [0] (which for the LX2080 would be a problem given there is no site0). Later, while version 2 adds the SITEs to enable to TMSR in bits 0..<n>, version 1 (e.g., LS1028, LS1046, LS1088) add MSITEs to TMR bits 16..31 or rather 15..0(16-<n>). Adjust the loops to only enable the site_ids listed for the particular SoC for monitoring. This now also deals with sparse site_ids (not starting at 0, or not being contiguous). MFC after: 1 week Sponsored by: Traverse Technologies (providing Ten64 HW for testing) Reviewed by: mmel Differential Revision: https://reviews.freebsd.org/D35764
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@ -435,8 +435,8 @@ qoriq_therm_attach(device_t dev)
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WR4(sc, TMUV2_TMTMIR, 0x0F); /* disable */
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/* these registers are not of settings is not in TRM */
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WR4(sc, TMUV2_TEUMR(0), 0x51009c00);
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for (int i = 0; i < 7; i++)
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WR4(sc, TMUV2_TMSAR(0), 0xE);
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for (int i = 0; i < sc->ntsensors; i++)
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WR4(sc, TMUV2_TMSAR(sc->tsensors[i].site_id), 0xE);
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}
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/* prepare calibration tables */
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@ -447,10 +447,14 @@ qoriq_therm_attach(device_t dev)
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goto fail;
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}
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/* start monitoring */
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sites = (1U << sc->ntsensors) - 1;
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sites = 0;
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if (sc->ver == 1) {
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for (int i = 0; i < sc->ntsensors; i++)
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sites |= 1 << (15 - sc->tsensors[i].site_id);
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WR4(sc, TMU_TMR, 0x8C000000 | sites);
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} else {
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for (int i = 0; i < sc->ntsensors; i++)
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sites |= 1 << sc->tsensors[i].site_id;
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WR4(sc, TMUV2_TMSR, sites);
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WR4(sc, TMU_TMR, 0x83000000);
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}
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