d/freebsd-dev
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mlx5: Implement support for configuring PCIe packet write ordering via a sysctl.

Browse Source 
Submitted by:   hselasky@
Approved by:    hselasky (mentor)
MFC after:      1 week
Sponsored by:   Mellanox Technologies
This commit is contained in:
Slava Shwartsman 2018-12-05 13:45:08 +00:00
parent 70b417cf90
commit feb5f357ea
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=341563
2 changed files with 22 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
sys/dev/mlx5/mlx5_core/mlx5_mr.c
View File

@ -1,5 +1,5 @@
/*-
* Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved.
* Copyright (c) 2013-2018, Mellanox Technologies, Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -30,6 +30,11 @@
#include <dev/mlx5/driver.h>
#include "mlx5_core.h"
static int mlx5_relaxed_ordering_write;
SYSCTL_INT(_hw_mlx5, OID_AUTO, relaxed_ordering_write, CTLFLAG_RWTUN,
&mlx5_relaxed_ordering_write, 0,
"Set to enable relaxed ordering for PCIe writes");
void mlx5_init_mr_table(struct mlx5_core_dev *dev)
{
struct mlx5_mr_table *table = &dev->priv.mr_table;
@ -63,6 +68,14 @@ int mlx5_core_create_mkey_cb(struct mlx5_core_dev *dev,
mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
MLX5_SET(create_mkey_in, in, opcode, MLX5_CMD_OP_CREATE_MKEY);
MLX5_SET(mkc, mkc, mkey_7_0, key);
if (mlx5_relaxed_ordering_write != 0) {
if (MLX5_CAP_GEN(dev, relaxed_ordering_write))
MLX5_SET(mkc, mkc, relaxed_ordering_write, 1);
else
return (-EPROTONOSUPPORT);
}
if (callback)
return mlx5_cmd_exec_cb(dev, in, inlen, out, outlen,
callback, context);

11
sys/dev/mlx5/mlx5_ifc.h
View File

@ -933,7 +933,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 log_max_cq[0x5];
u8 log_max_eq_sz[0x8];
u8 reserved_6[0x2];
u8 relaxed_ordering_write[1];
u8 reserved_6[0x1];
u8 log_max_mkey[0x6];
u8 reserved_7[0xc];
u8 log_max_eq[0x4];
@ -2424,9 +2425,13 @@ enum {
};
struct mlx5_ifc_mkc_bits {
u8 reserved_0[0x1];
u8 reserved_at_0[0x1];
u8 free[0x1];
u8 reserved_1[0xd];
u8 reserved_at_2[0x1];
u8 access_mode_4_2[0x3];
u8 reserved_at_6[0x7];
u8 relaxed_ordering_write[0x1];
u8 reserved_at_e[0x1];
u8 small_fence_on_rdma_read_response[0x1];
u8 umr_en[0x1];
u8 a[0x1];