Mdoc(7) janitor cleanup.

Reviewed and improved by:	ru
OK'ed by:	phk
Approved by:	re (rwatson)
This commit is contained in:
simon 2003-11-30 12:42:01 +00:00
parent 43cff8ce43
commit ff15145473

View File

@ -1,4 +1,4 @@
.\" Copyright (c) 2003 Poul-Henning Kamp <phk@FreeBSD.org>
.\" Copyright (c) 2003 Poul-Henning Kamp <phk@FreeBSD.org>
.\" All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
@ -25,87 +25,134 @@
.\" $FreeBSD$
.\"
.Dd November 23, 2003
.Dt CPU_ELAN 4
.Dt CPU_ELAN 4 i386
.Os
.Sh NAME
.Nm CPU_ELAN
.Nd AMD Elan 520 CPU support
.Sh SYNOPSIS
.Cd options CPU_ELAN
.Cd options CPU_ELAN_PPS
.Cd options CPU_ELAN_XTAL
.Cd sysctl machdep.elan_gpio_config
.Cd sysctl machdep.elan_freq
.Cd options CPU_SOEKRIS
.Cd "options CPU_ELAN"
.Cd "options CPU_ELAN_PPS"
.Cd "options CPU_ELAN_XTAL"
.Bl -item -compact
.It
.Va machdep.elan_gpio_config
.It
.Va machdep.elan_freq
.El
.Cd "options CPU_SOEKRIS"
.Sh DESCRIPTION
.Cd options CPU_ELAN
Enables support for the AMD Elan 520 CPU.
The
.Cd "options CPU_ELAN"
enables support for the AMD Elan 520 CPU.
.Pp
A device "/dev/elan-mmcr" exports the MMCR register bank to userland
A device
.Pa /dev/elan-mmcr
exports the MMCR register bank to userland
using
.Xr mmap 2 .
.Pp
The "i8254" timer will be adjusted to the slightly unorthodox
frequency 1189161Hz (32768 * 45 * 25 / 31) employed by the Elan.
The
.Tn i8254
timer will be adjusted to the slightly unorthodox
frequency 1189161 Hz (32768 * 45 * 25 / 31) employed by the Elan.
.Pp
A timecounter named "ELAN" is implemented using the general purpose timer 2,
A timecounter named
.Dq Li ELAN
is implemented using the general purpose timer 2,
but it will not be usable unless HZ is configured at 150 or higher.
This timecounter is much better than the "i8254" timecounter and should be
This timecounter is much better than the
.Dq Li i8254
timecounter and should be
used at all times.
.Pp
The
.Cd sysctl machdep.elan_gpio_config
.Va machdep.elan_gpio_config
.Xr sysctl 8
variable
enables configuration of the GPIO pins of the CPU.
The string must be exactly 32 characters long.
A '-' means the GPIO is unavailable.
A 'l' (lower-case L) configures a
A
.Ql -
means the GPIO is unavailable.
A
.Ql l
(lower-case ell) configures a
.Xr led 4
device (active low).
A 'L' configures a
A
.Ql L
configures a
.Xr led 4
device (active higH).
A '.' means no configuration for this GPIO.
device (active high).
A
.Ql \&.
means no configuration for this GPIO.
These
.Xr led 4
devices will be named "/dev/led/gpio%d".
For meaning of 'P', 'e' and 'E', see under
.Cd options CPU_ELAN_PPS .
devices will be named
.Pa /dev/led/gpio%d .
For meaning of
.Ql P ,
.Ql e
and
.Ql E ,
see under
.Cd "options CPU_ELAN_PPS" .
.Pp
The
.Cd options CPU_ELAN_XTAL
and
.Cd sysctl machdep.elan_freq
.Cd "options CPU_ELAN_XTAL"
and the
.Va machdep.elan_freq
.Xr sysctl 8
variable
can be used to set the CPU clock crystal frequency in Hz.
The default is 33333333 Hz.
.Pp
The
.Cd options CPU_ELAN_PPS
.Cd "options CPU_ELAN_PPS"
enables precision timestamping using the RFC2783 PPS-API via the
"/dev/elan-mmcr" device.
The resolution will be approx 125nsec and the precision \(+- 125nsec.
(for 125 nsec read "4 / CPU clock crystal frequency")
.Pa /dev/elan-mmcr
device.
The resolution will be approximately 125 nsec
and the precision \(+- 125 nsec.
(For 125 nsec read
.Dq "4 / CPU clock crystal frequency" . )
.Pp
The input signal must be connected to the TMR1IN pin and
a GPIO pin.
The GPIO pin must be configured with a 'P' in
.Cd sysctl machdep.elan_gpio_config .
The GPIO pin must be configured with a
.Ql P
in
.Va machdep.elan_gpio_config .
.Pp
In addition one GPIO pin can be configured with either 'e' (active low)
or 'E' (active high) to become a "echo" output of the input signal.
In addition, one GPIO pin can be configured with either
.Ql e
(active low)
or
.Ql E
(active high) to become a
.Dq echo
output of the input signal.
Please notice that this signal is not suitable for calibration.
.Pp
If the
.Cd options CPU_SOEKRIS
option is given, the support will additionally be tailored to the
.Cd "options CPU_SOEKRIS"
is given, the support will additionally be tailored to the
Soekris Engineering 45xx series of embedded computers.
The "error" led will be configured (as "/dev/led/error") and the GPIO pins which are not
The
.Dq error
led will be configured (as
.Pa /dev/led/error )
and the GPIO pins which are not
available will be disabled.
.Sh SEE ALSO
.Xr sysctl 8 ,
.Xr led 4 ,
.Xr sysctl 8
.Sh HISTORY
The
.Nm
code first appeared in
.Fx 5.x .
.Fx 4.7 .
.Sh AUTHORS
.An "Poul-Henning Kamp" Aq phk@FreeBSD.org