Remove arm11x6_setttb and armv7_setttb as they are unused. While here
remove unneeded code from the ARMv7 cpu assembly code. Sponsored by: ABT Systems Ltd
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46783b12e3
commit
ff300d2316
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=307925
@ -64,14 +64,6 @@ __FBSDID("$FreeBSD$");
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.cpu arm1176jz-s
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ENTRY(arm11x6_setttb)
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mov r1, #0
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mcr p15, 0, r0, c2, c0, 0 /* load new TTB */
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mcr p15, 0, r1, c8, c7, 0 /* invalidate I+D TLBs */
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mcr p15, 0, r1, c7, c10, 4 /* drain write buffer */
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RET
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END(arm11x6_setttb)
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/*
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* Preload the cache before issuing the WFI by conditionally disabling the
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* mcr intstructions the first time around the loop. Ensure the function is
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@ -37,56 +37,16 @@ __FBSDID("$FreeBSD$");
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.cpu cortex-a8
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#ifdef ELF_TRAMPOLINE
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.Lcoherency_level:
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.word _C_LABEL(arm_cache_loc)
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.Lcache_type:
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.word _C_LABEL(arm_cache_type)
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.Larmv7_dcache_line_size:
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.word _C_LABEL(arm_dcache_min_line_size)
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.Larmv7_icache_line_size:
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.word _C_LABEL(arm_icache_min_line_size)
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.Larmv7_idcache_line_size:
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.word _C_LABEL(arm_idcache_min_line_size)
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.Lway_mask:
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.word 0x3ff
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.Lmax_index:
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.word 0x7fff
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.Lpage_mask:
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.word 0xfff
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#define PT_NOS (1 << 5)
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#define PT_S (1 << 1)
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#define PT_INNER_NC 0
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#define PT_INNER_WT (1 << 0)
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#define PT_INNER_WB ((1 << 0) | (1 << 6))
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#define PT_INNER_WBWA (1 << 6)
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#define PT_OUTER_NC 0
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#define PT_OUTER_WT (2 << 3)
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#define PT_OUTER_WB (3 << 3)
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#define PT_OUTER_WBWA (1 << 3)
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#ifdef SMP
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#define PT_ATTR (PT_S|PT_INNER_WBWA|PT_OUTER_WBWA|PT_NOS)
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#else
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#define PT_ATTR (PT_INNER_WBWA|PT_OUTER_WBWA)
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#endif
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ENTRY(armv7_setttb)
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dsb
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orr r0, r0, #PT_ATTR
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mcr CP15_TTBR0(r0)
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isb
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#ifdef SMP
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mcr CP15_TLBIALLIS
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#else
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mcr CP15_TLBIALL
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#endif
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dsb
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isb
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RET
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END(armv7_setttb)
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#ifdef ELF_TRAMPOLINE
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/* Based on algorithm from ARM Architecture Reference Manual */
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ENTRY(armv7_dcache_wbinv_all)
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stmdb sp!, {r4, r5, r6, r7, r8, r9}
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@ -279,7 +279,6 @@ void armv6_idcache_wbinv_all (void);
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#endif
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#if defined(CPU_CORTEXA8) || defined(CPU_CORTEXA_MP) || \
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defined(CPU_MV_PJ4B) || defined(CPU_KRAIT)
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void armv7_setttb (u_int);
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void armv7_idcache_wbinv_all (void);
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void armv7_cpu_sleep (int);
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void armv7_setup (void);
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@ -297,7 +296,6 @@ void pj4bv7_setup (void);
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#if defined(CPU_ARM1176)
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void arm11_drain_writebuf (void);
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void arm11x6_setttb (u_int);
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void arm11x6_setup (void);
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void arm11x6_sleep (int); /* no ref. for errata */
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#endif
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