to poll succesfully even if we are sharing the interrupt.
Register the interrupt handler before the attach.
This commit makes the 294x PCI shared interrupt compliant. This has
been tested with an aic7870 motherboard controller and a 294x in the
same machine shareing an irq.
include <pci/pcivar.h> without including <sys/devconf.h> and other
drivers include <pci/pcivar.h> before including <sys/devconf.h> if
certain identifiers are defined.
The devconf headers have convoluted interdependencies. <sys/devconf.h>
includes <machine/devconf.h> which includes <pci/pcivar.h>. Most
drivers include <sys/devconf.h> so even isa drivers depend on
<pci/pcivar.h>. For similar reasons, most drivers depend on another
pci header, on an isa header and on two scsi headers.
1) Supports PCI to PCI bridge devices (and tries to initialise them,
even if the BIOS is brain dead).
2) Supports shared PCI interrupts. Interrupt handlers now MUST return
'0' if they found nothing to do, '1' otherwise.
New features tested with i486 systems based on the Intel Saturn and
a DEC 4channel Ethernet card only, but expected to work on most systems.
The option PCI_REMAP has been removed !
Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
a device specific shutdown routine for devconf. Assign the value of this
to the kern_devconf struct. Implement a device shutdown routine for if_de
that disables the device. This will stop the device from corrupting memory
after a reboot.
be 486 chip sets that can't tolerate bursts > cache line size.
This should really made dependent on the particular buggy
chip sets, but for now we'll play safe ...
Try to deduce maximum number of PCI buses in system (working around
chip set bugs).
Better check for devices at multiple addresses (aliases).
Reviewed by: se
Submitted by: <wolf@kintaro.cologne.de> Wolfgang Stanglmeier
DEC 21050 chip in particular, don't have specs of other such chips).
This should add support for Multiple-Ethernet PCI cards (e.g. Znyx 314).
Reviewed by: se
Submitted by: <wolf@kintaro.cologne.de> Wolfgang Stanglmeier
PCI BIOS mappings are retained, except if option PCI_REMAP
is specified in the kernel config file.
There is now a list of attach addresses, and the first
address that seems to make some device registers appear
is chosen.
Reviewed by: se
Submitted by: wolf
Test for correct execution of cache test script by NCR,
and give meaningful error description if it fails.
(A cache problem was reported before.)
Don't wait forever for cache test to complete (to protect
against faulty hardware).
Submitted by: wolf
New config option "NCR_IOMAPPED" makes the driver use port I/O.
Put back in 53c815 defines, submitted by Mikael Hybsch <micke@dynas.se>.
These had got lost between cvs rev. 1.14 and now ...
pci.c:
Really write config space register.
Assign ports starting at 0xbc00.
Submitted by: wolf
Reviewed by: se
so that the interface won't have the effect of blocking other senders
during bulk transfers (i.e. hogging the ethernet). It improves performance
in all of my tests by reducing collisions and I believe it to be a Good
Thing.
definitions taken from the PCI specs. Part of them were typed
in by Wolfgang Stanglmeier, the (at that time unneeded) rest
by Charles Hannum (thanks !).
may be the result of reselect following too fast for
the driver to notice. Not the final solution, but the
problem has been seen only with very few devices.
Reviewed by: se
Submitted by: wolf (Wolfgang Stanglmeier)
