3 Commits

Author	SHA1	Message	Date
Olivier Houchard	f4c01f1508	Instead of using sysarch() to store-retrieve the tp, add a magic address, ... ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu	2005-02-26 18:59:01 +00:00
Olivier Houchard	0e425b6c47	Move KERNPHYSADDR and KERNVIRTADDR from std.i80321 to std.iq31244. ... Use the correct KERNPHYSADDR.	2004-11-18 00:05:09 +00:00
Olivier Houchard	6052fa47a9	Import partial support for the IQ31244 eval board (i80321 CPU). IQ80321 might ... work out of the box too, but I have no hardware to test. It works well enough to go multiuser. Network works, SATA does not, as I have no drive to test. Thanks to Intel for sending such a board. Obtained from: NetBSD	2004-09-23 22:45:36 +00:00