Commit Graph

14 Commits

Author SHA1 Message Date
Pyun YongHyeon
5effa1598a FreeBSD driver does not require arpcom structure in softc. 2011-12-09 23:37:55 +00:00
Pyun YongHyeon
6f61c82844 Consistently use a tab character instead of using either a space or
tab after #define.
While I'm here consistently use capital letters when it uses
hexadecimal notation.

No functional changes.
2011-12-07 22:04:57 +00:00
Pyun YongHyeon
e0b5ac0220 Implement hardware MAC statistics counter. Counters could be
queried with dev.et.%d.stats sysctl node where %d is an instance of
device.
2011-12-07 21:46:09 +00:00
Pyun YongHyeon
1f009e2f39 Rework link state tracking and TX/RX MAC configuration.
o Do not report link status if driver is not running.
 o TX/RX MAC configuration should be done with resolved speed,
   duplex and flow control after establishing a link so it can't
   be done in driver initialization routine.
   Move the configuration to miibus_statchg callback which will be
   called whenever any link state change is detected.
   At this moment, flow-control is not enabled yet mainly because
   I was not able to set correct flow control parameters to
   generate TX pause frames.
 o Now TX/RX MAC is enabled only when a valid link is detected.
   Rearragnge hardware initialization routine a bit to leave
   enabling MAC to miibus_statchg callback.  In order to that,
   TX/RX DMA engine is enabled in et_init_locked().
 o Introduce ET_FLAG_LINK flag to track current link state.
 o Introduce ET_FLAG_FASTETHER flag to mark whether controller is
   fast ethernet.  This flag is checked in miibus_statchg callback
   to know whether PHY established a valid link.
 o In et_stop(), TX/RX MAC is explicitly disabled instead of
   relying on et_reset().  And move et_reset() from et_stop() to
   controller initialization.  Controler reset is not required here
   and it would also clear critial registers(i.e station address,
   RX filter configuration, WOL etc) that are required to make WOL
   work.
 o Switching to current media is done in et_init_locked() after
   setting IFF_DRV_RUNNING flag.  This should ensure reliable
   auto-negotiation/manual link establishment.
 o In et_start_locked(), check whether driver got a valid link
   before trying to send frames.
 o Remove checking a link in et_tick() as this is done by
   miibus_statchg callback.
2011-12-07 21:29:51 +00:00
Pyun YongHyeon
244fd28bde Controller does not require TX start command for every frame. So
send a single TX command after setting up all TX frames.  This
removes unnecessary register accesses and bus_dmamap_sync(9) calls.
et(4) uses TX interrupt moderation so it's possible to have TX
buffers that were already transmitted but waiting for TX completion
interrupt.  If the number of available TX descriptor is less then
1/3 of total TX descriptor, try reclaiming first to get enough free
TX descriptors before setting up TX descriptors.
After r228325, et_txeof() no longer tries to send frames after
reclaiming TX buffers.  That change was made to give more chance
to transmit frames in main interrupt handler since we can still
send frames in interrupt handler with RX interrupt.  So right
before exiting interrupt hander, after enabling interrupt, try to
send more frames.  This gives slightly better performance numbers.

While I'm here reduce number of spare TX descriptors from 8 to 4.
Controller does not require reserved TX descriptors, it was just to
reduce TX overhead.  After r228325, driver has much lower TX
overhead so it does not make sense to reserve 8 TX descriptors.
2011-12-07 19:08:54 +00:00
Pyun YongHyeon
05884511b0 Overhaul bus_dma(9) usage in et(4) and clean up TX/RX path. This
change should make et(4) work on any architectures.
 o Remove m_getl inline function and replace it with stanard mbuf
   interfaces.  Previous code tried to minimize code duplication
   but this came from incorrect use of common DMA tag.
   Driver may be still use a common RX allocation handler with
   additional structure changes but I don't see much point to do
   that it would make it hard to understand the code.
 o Remove DragonflyBSD specific constant EVL_ENCAPLEN, use
   ETHER_VLAN_ENCAP_LEN instead.
 o Add bunch of new RX status definition.  It seems controller
   supports RX checksum offloading but I was not able to make the
   feature work yet.  Currently driver checks whether recevied
   frame is good one or not.
 o Avoid a typedef ending in '_t' as style(9) says.
 o Controller has no restriction on DMA address space, so there
   is no reason to limit the DMA address to 32bit.  Descriptor
   rings,  status blocks and TX/RX buffers now use full 64bit DMA
   addressing.
 o Allocate DMA memory shared between host and controller as
   coherent.
 o Create 3 separate DMA tags to be used as TX, mini RX ring and
   stanard RX ring.  Previously it created a single DMA tag and it
   was used to all three rings.
 o et(4) does not support jumbo frame at this moment and I still
   don't quite understand how jumbo frame works on this controller
   so use two RX rings to handle small sized frame and normal sized
   frame respectively.  The mini RX ring will be used to receive
   frames that are less than or equal to 127 bytes.  The second RX
   ring is used to receive frames that are not handled by the first
   RX ring.
   If jumbo frame support is implemented, driver may have to choose
   better RX scheme by letting the second RX ring handle jumbo
   frames.  This scheme will mimic Broadcom's efficient jumbo frame
   handling feature.  However RAM buffer size(16KB) of the
   controller is too small to hold 2 jumbo frames, if 9KB
   jumbo frame is used, I'm not sure how good performance would it
   have.
 o In et_rxeof(), make sure to check whether controller received
   good frame or not.  Passing corrupted frame to upper layer is
   bad idea.
 o If driver receives a bad frame or driver fails to allocate RX
   buffer due to resource shortage condition, reuse previously
   loaded DMA map for RX buffer instead of unloading/loading RX
   buffer again.
 o et_init_tx_ring() never fails so change return type to void.
 o In watchdog handler, show TX DMA write back status of errored
   frame which could be used as a clue to debug watchdog timeout.
 o Add missing bus_dmamap_sync() in various places such that et(4)
   should work with bounce buffers(e.g. PAE).
 o TX side bus_dmamap_load_mbuf_sg(9) support.
 o RX side bus_dmamap_load_mbuf_sg(9) support.
 o Controller has no DMA alignment limit in RX buffer so use
   m_adj(9) in RX buffer allocation to make IP header align on 2
   bytes boundary.  Otherwise it would trigger unaligned access
   error in upper layer on strict alignment architectures.
   One of down side of controller is it provides limited set of RX
   buffer length like most Intel controllers.  This is not problem
   at this moment because driver does not support jumbo frame yet
   but it may require alignment fixup code to support jumbo frame
   on strict alignment architectures.
 o In et_txeof(), don't zero TX descriptors for transmitted frames.
   TX descriptors don't need write access after transmission.
   Driver sets IFF_DRV_OACTIVE when the number of available TX
   descriptors are less than or equal to ET_NSEG_SPARE.  Make sure
   to clear IFF_DRV_OACTIVE only when the number of available TX
   descriptor is greater than ET_NSEG_SPARE.
2011-12-07 18:17:09 +00:00
Xin LI
e5fdd9de2c Change copyright holder to author. We prefer using a real legal
entity for copyright holders.

Approved by:	sephe
MFC after:	3 days
2010-07-30 17:51:22 +00:00
Pyun YongHyeon
9955274c64 Add IPv4/TCP/UDP Tx checksum offloading support. It seems the
controller also has support for IP/TCP checksum offloading for Rx
path. But I failed to find to way to enable Rx MAC to compute the
checksum of received frames.
2009-11-20 20:33:59 +00:00
Pyun YongHyeon
bbd5260f13 Remove unnecessary structure packing. 2009-11-20 20:12:37 +00:00
Pyun YongHyeon
d95121b427 Use bus_{read,write}_4 rather than bus_space_{read,write}_4. 2009-11-19 22:06:19 +00:00
Pyun YongHyeon
73e338b028 Remove extra spce at the EOL. 2009-11-19 21:46:58 +00:00
Pyun YongHyeon
cc3c3b4ec4 Add MSI support. 2009-11-19 21:45:06 +00:00
Pyun YongHyeon
23263665d5 Remove complex macros that were used to compute bits values.
Although these macros may have its own strength, its complex
definition make hard to read the code.

Approved by:	delphij
2009-11-19 20:57:35 +00:00
Xin LI
4d52a57549 Add et(4), a port of DragonFly's Agere ET1310 10/100/Gigabit
Ethernet device driver, written by sephe@

Obtained from:	DragonFly
Sponsored by:	iXsystems
MFC after:	2 weeks
2008-06-20 19:28:33 +00:00