Commit Graph

415 Commits

Author SHA1 Message Date
Warner Losh
1248f2322b Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC
is a ARM920T based CPU with a bunch of built-in peripherals.  The
inital import supports the SPI bus, the TWI bus (although iicbus
integration is not complete), the uarts, the system timer and the
onboard ethernet.  Support for the Kwikbyte KB9202
(http://www.kwikbyte.com) board is also included, although there's no
reason why the 9200 and the 9201 wouldn't also work.  Primitive
support for running under the skyeye emulator is also provided
(although skyeye's support for the AT91RM9200 is a little weak).

The code has been structured so that other members of Atmel's arm family can
be supported in the future.  The AT91SAM9260 is not presently supported
due to lack of hardware.  The arm7tdmi families are also not supported
becasue they lack an MMU.

Many thanks to cognet@ for his help and assistance in bringing up this
board.  He did much of the vm work and wrote parts of the uart and
system timer code as well as the bus space implementation.

The system boots to single user w/o problem, although the serial
console is a little slow and the ethernet driver is still in flux.

This work was sponsored by Timing Solutions, Corporation.  I am
grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
Olivier Houchard
0cc56a19e1 Don't forget to set the address of the next descriptor to 0 when we're
zeroing a physical page, or we could end up re-zeroing portions of
memory we have zeroed before, which is clearly not wanted.
2006-02-04 18:01:15 +00:00
Olivier Houchard
19d5d0da40 MFi386:
revision 1.288
date: 2006/02/04 14:11:33;  author: wsalamon;  state: Exp;  lines: +4 -1
Hook up the audit system to system call entry and exit. System calls will
now be audited.

Obtained from:  TrustedBSD Project
Approved by: rwatson (mentor)
2006-02-04 17:01:19 +00:00
Warner Losh
d0e50224e8 MFp4: Small cleanup of cpu messages at boot. 2006-02-03 06:39:57 +00:00
Warner Losh
f037afb7ea Merge from p4: minor formatting nits. 2006-02-03 06:27:51 +00:00
Olivier Houchard
eeac0e83b3 Try harder not to recurse. 2006-01-27 21:07:04 +00:00
Olivier Houchard
2eff8c6814 Donc recompute the io port address if it's already the good one. 2006-01-23 14:03:14 +00:00
Olivier Houchard
0e187240e1 Build a minimal pagetables, with only section mappings, mapped write through,
to speed up the decompression.
2006-01-20 00:46:44 +00:00
Warner Losh
d5e61c97a6 By popular demand, move __HAVE_ACPI and __PCI_REROUTE_INTERRUPT into
param.h.  Per request, I've placed these just after the
_NO_NAMESPACE_POLLUTION ifndef.  I've not renamed anything yet, but
may since we don't need the __.

Submitted by: bde, jhb, scottl, many others.
2006-01-09 06:05:57 +00:00
John Baldwin
360c3c2d1a Fix various places that were testing td_critnest to see if interrupts
should remain disabled during a trap or not to check
td_md.md_spinlock_count instead.
2006-01-06 18:02:12 +00:00
Warner Losh
501755f4f6 Define __HAVE_ACPI and/or __PCI_REROUTE_INTERRUPT, as appropriate for
each platform.  These will be used in the pci code in preference to
the complicated #ifdefs we have there now.
2006-01-01 20:59:28 +00:00
Alexander Leidinger
ef39c05baa MI changes:
- provide an interface (macros) to the page coloring part of the VM system,
   this allows to try different coloring algorithms without the need to
   touch every file [1]
 - make the page queue tuning values readable: sysctl vm.stats.pagequeue
 - autotuning of the page coloring values based upon the cache size instead
   of options in the kernel config (disabling of the page coloring as a
   kernel option is still possible)

MD changes:
 - detection of the cache size: only IA32 and AMD64 (untested) contains
   cache size detection code, every other arch just comes with a dummy
   function (this results in the use of default values like it was the
   case without the autotuning of the page coloring)
 - print some more info on Intel CPU's (like we do on AMD and Transmeta
   CPU's)

Note to AMD owners (IA32 and AMD64): please run "sysctl vm.stats.pagequeue"
and report if the cache* values are zero (= bug in the cache detection code)
or not.

Based upon work by:	Chad David <davidc@acns.ab.ca> [1]
Reviewed by:		alc, arch (in 2004)
Discussed with:		alc, Chad David, arch (in 2004)
2005-12-31 14:39:20 +00:00
Maxim Sobolev
900b28f9f6 Remove kern.elf32.can_exec_dyn sysctl. Instead extend Brandinfo structure
with flags bitfield and set BI_CAN_EXEC_DYN flag for all brands that usually
allow executing elf dynamic binaries (aka shared libraries). When it is
requested to execute ET_DYN elf image check if this flag is on after we
know the elf brand allowing execution if so.

PR:		kern/87615
Submitted by:	Marcin Koziej <creep@desk.pl>
2005-12-26 21:23:57 +00:00
John Baldwin
b439e431bf Tweak how the MD code calls the fooclock() methods some. Instead of
passing a pointer to an opaque clockframe structure and requiring the
MD code to supply CLKF_FOO() macros to extract needed values out of the
opaque structure, just pass the needed values directly.  In practice this
means passing the pair (usermode, pc) to hardclock() and profclock() and
passing the boolean (usermode) to hardclock_cpu() and hardclock_process().
Other details:
- Axe clockframe and CLKF_FOO() macros on all architectures.  Basically,
  all the archs were taking a trapframe and converting it into a clockframe
  one way or another.  Now they can just extract the PC and usermode values
  directly out of the trapframe and pass it to fooclock().
- Renamed hardclock_process() to hardclock_cpu() as the latter is more
  accurate.
- On Alpha, we now run profclock() at hz (profhz == hz) rather than at
  the slower stathz.
- On Alpha, for the TurboLaser machines that don't have an 8254
  timecounter, call hardclock() directly.  This removes an extra
  conditional check from every clock interrupt on Alpha on the BSP.
  There is probably room for even further pruning here by changing Alpha
  to use the simplified timecounter we use on x86 with the lapic timer
  since we don't get interrupts from the 8254 on Alpha anyway.
- On x86, clkintr() shouldn't ever be called now unless using_lapic_timer
  is false, so add a KASSERT() to that affect and remove a condition
  to slightly optimize the non-lapic case.
- Change prototypeof  arm_handler_execute() so that it's first arg is a
  trapframe pointer rather than a void pointer for clarity.
- Use KCOUNT macro in profclock() to lookup the kernel profiling bucket.

Tested on:	alpha, amd64, arm, i386, ia64, sparc64
Reviewed by:	bde (mostly)
2005-12-22 22:16:09 +00:00
Olivier Houchard
3ff539810b Ooops, I removed the wrong bits.
This unbreak boot from a VA which is different from the PA.
2005-12-21 15:02:31 +00:00
Olivier Houchard
e279681cb5 Remove #undef DDB I shouldn't have committed. 2005-12-21 15:01:49 +00:00
Olivier Houchard
796baad9e6 - Disable the instruction cache very early, until it's time to enable it again.
- Revamp the code that jumps from physical to virtual address.
2005-12-20 01:29:17 +00:00
Olivier Houchard
fe516e3c17 Make the elf trampoline disable the MMU, and link it at physical address,
to avoid bad surprises.
2005-12-20 01:28:17 +00:00
Olivier Houchard
ac28e95795 - Better use of the busdma API.
- Use spin locks instead of sleep locks.
2005-12-09 23:55:41 +00:00
Olivier Houchard
e89ab9292f Fix a harmless bug in the way we allocate the early PTEs. 2005-12-09 23:54:50 +00:00
Olivier Houchard
527962c8c7 The IQ80321 clock is 200MHz, but the IQ80321 is 198MHz, so add a kernel option
to override the frequency
2005-12-09 23:52:51 +00:00
Olivier Houchard
b34658e8a9 A #define is not enough, we need to cast from u_long * to uint32_t *. 2005-12-09 22:58:07 +00:00
Olivier Houchard
858b811f34 Define atomic_whatever_long 2005-12-09 22:33:20 +00:00
Olivier Houchard
3e1e996645 In copyout(), quad-align the source buffer, and use ldrd if possible. 2005-12-09 15:31:02 +00:00
Ruslan Ermilov
224d140293 Drop _MACHINE_ARCH and _MACHINE defines (not to be confused with
MACHINE_ARCH and MACHINE).  Their purpose was to be able to test
in cpp(1), but cpp(1) only understands integer type expressions.
Using such unsupported expressions introduced a number of subtle
bugs, which were discovered by compiling with -Wundef.
2005-12-06 13:27:21 +00:00
Olivier Houchard
5b6aaee426 Try to use contigmalloc() even if M_NOWAIT has been specified. 2005-12-05 12:58:44 +00:00
Olivier Houchard
d0cd9702ef Teach the elf trampoline how to deal with gzipped kernels. 2005-12-05 12:55:46 +00:00
Ruslan Ermilov
1a581012df Add missing "struct" in i386/i386/machdep.c,v 1.497 by deischen@. 2005-11-24 08:16:18 +00:00
Olivier Houchard
ce4210d673 Use a magic number to know we were started from the elf wrapper.
Add a dummy _start function to make the non-elf version of the wrapper work.
2005-11-24 02:27:55 +00:00
Olivier Houchard
2ec9d05328 MFP4: Bring in arm9 cache-related functions
Obtained from:	NetBSD
2005-11-23 18:02:40 +00:00
Olivier Houchard
94d8cf9916 Force pmap to write-back the pte cacheline after each pte modification,
even if the pte is supposed to be cached in write through mode (might be a
skyeye bug, I'll have to check).
2005-11-21 19:10:44 +00:00
Olivier Houchard
f9126cfb8f Add an alternate ID for the arm920t (the real solution is to have
per-cpu class masks, but oh well).
2005-11-21 19:06:25 +00:00
Alan Cox
97a0c226d6 Eliminate pmap_init2(). It's no longer used. 2005-11-20 06:09:49 +00:00
Olivier Houchard
9e581686a3 There's no need to include <machine/asmacros.h> here. 2005-11-08 13:01:29 +00:00
Olivier Houchard
812779897c MFi386 rev 1.536 (sort of)
Move what can be moved (UMA zones creation, pv_entry_* initialization) from
pmap_init2() to pmap_init().
Create a new function, pmap_postinit(), called from cpu_startup(), to do the
L1 tables allocation.
pmap_init2() is now empty for arm as well.
2005-11-06 16:10:28 +00:00
Robert Watson
5bb84bc84b Normalize a significant number of kernel malloc type names:
- Prefer '_' to ' ', as it results in more easily parsed results in
  memory monitoring tools such as vmstat.

- Remove punctuation that is incompatible with using memory type names
  as file names, such as '/' characters.

- Disambiguate some collisions by adding subsystem prefixes to some
  memory types.

- Generally prefer lower case to upper case.

- If the same type is defined in multiple architecture directories,
  attempt to use the same name in additional cases.

Not all instances were caught in this change, so more work is required to
finish this conversion.  Similar changes are required for UMA zone names.
2005-10-31 15:41:29 +00:00
John Baldwin
e0f66ef861 Reorganize the interrupt handling code a bit to make a few things cleaner
and increase flexibility to allow various different approaches to be tried
in the future.
- Split struct ithd up into two pieces.  struct intr_event holds the list
  of interrupt handlers associated with interrupt sources.
  struct intr_thread contains the data relative to an interrupt thread.
  Currently we still provide a 1:1 relationship of events to threads
  with the exception that events only have an associated thread if there
  is at least one threaded interrupt handler attached to the event.  This
  means that on x86 we no longer have 4 bazillion interrupt threads with
  no handlers.  It also means that interrupt events with only INTR_FAST
  handlers no longer have an associated thread either.
- Renamed struct intrhand to struct intr_handler to follow the struct
  intr_foo naming convention.  This did require renaming the powerpc
  MD struct intr_handler to struct ppc_intr_handler.
- INTR_FAST no longer implies INTR_EXCL on all architectures except for
  powerpc.  This means that multiple INTR_FAST handlers can attach to the
  same interrupt and that INTR_FAST and non-INTR_FAST handlers can attach
  to the same interrupt.  Sharing INTR_FAST handlers may not always be
  desirable, but having sio(4) and uhci(4) fight over an IRQ isn't fun
  either.  Drivers can always still use INTR_EXCL to ask for an interrupt
  exclusively.  The way this sharing works is that when an interrupt
  comes in, all the INTR_FAST handlers are executed first, and if any
  threaded handlers exist, the interrupt thread is scheduled afterwards.
  This type of layout also makes it possible to investigate using interrupt
  filters ala OS X where the filter determines whether or not its companion
  threaded handler should run.
- Aside from the INTR_FAST changes above, the impact on MD interrupt code
  is mostly just 's/ithread/intr_event/'.
- A new MI ddb command 'show intrs' walks the list of interrupt events
  dumping their state.  It also has a '/v' verbose switch which dumps
  info about all of the handlers attached to each event.
- We currently don't destroy an interrupt thread when the last threaded
  handler is removed because it would suck for things like ppbus(8)'s
  braindead behavior.  The code is present, though, it is just under
  #if 0 for now.
- Move the code to actually execute the threaded handlers for an interrrupt
  event into a separate function so that ithread_loop() becomes more
  readable.  Previously this code was all in the middle of ithread_loop()
  and indented halfway across the screen.
- Made struct intr_thread private to kern_intr.c and replaced td_ithd
  with a thread private flag TDP_ITHREAD.
- In statclock, check curthread against idlethread directly rather than
  curthread's proc against idlethread's proc. (Not really related to intr
  changes)

Tested on:	alpha, amd64, i386, sparc64
Tested on:	arm, ia64 (older version of patch by cognet and marcel)
2005-10-25 19:48:48 +00:00
Olivier Houchard
4bc6c6dc6c Unbreak for !__XSCALE__. 2005-10-23 23:09:14 +00:00
Olivier Houchard
b1e157f0e6 Cleanup. 2005-10-20 20:30:51 +00:00
Olivier Houchard
3de553a473 Use the clock count register as a timecounter, as it's more accurate. 2005-10-17 14:51:01 +00:00
John Baldwin
21aa010bb5 Whitespace. 2005-10-14 18:36:49 +00:00
John Baldwin
43e2ef2bb6 Change the userland atomic operations on arm to use memory operands for
the modified memory rather than using register operands that held a pointer
to the memory.  The biggest effect is that we now correctly tell the
compiler that these functions change the memory that these functions
modify.

Reviewed by:	cognet
2005-10-14 18:07:45 +00:00
David Xu
9104847f21 1. Change prototype of trapsignal and sendsig to use ksiginfo_t *, most
changes in MD code are trivial, before this change, trapsignal and
   sendsig use discrete parameters, now they uses member fields of
   ksiginfo_t structure. For sendsig, this change allows us to pass
   POSIX realtime signal value to user code.

2. Remove cpu_thread_siginfo, it is no longer needed because we now always
   generate ksiginfo_t data and feed it to libpthread.

3. Add p_sigqueue to proc structure to hold shared signals which were
   blocked by all threads in the proc.

4. Add td_sigqueue to thread structure to hold all signals delivered to
   thread.

5. i386 and amd64 now return POSIX standard si_code, other arches will
   be fixed.

6. In this sigqueue implementation, pending signal set is kept as before,
   an extra siginfo list holds additional siginfo_t data for signals.
   kernel code uses psignal() still behavior as before, it won't be failed
   even under memory pressure, only exception is when deleting a signal,
   we should call sigqueue_delete to remove signal from sigqueue but
   not SIGDELSET. Current there is no kernel code will deliver a signal
   with additional data, so kernel should be as stable as before,
   a ksiginfo can carry more information, for example, allow signal to
   be delivered but throw away siginfo data if memory is not enough.
   SIGKILL and SIGSTOP have fast path in sigqueue_add, because they can
   not be caught or masked.
   The sigqueue() syscall allows user code to queue a signal to target
   process, if resource is unavailable, EAGAIN will be returned as
   specification said.
   Just before thread exits, signal queue memory will be freed by
   sigqueue_flush.
   Current, all signals are allowed to be queued, not only realtime signals.

Earlier patch reviewed by: jhb, deischen
Tested on: i386, amd64
2005-10-14 12:43:47 +00:00
Olivier Houchard
2dfc7d008b Export PAGE_SIZE from genassym.c, and include assym.s in bcopy_page.S,
instead of <machine/param.h>.
2005-10-06 11:26:37 +00:00
Olivier Houchard
4d71248bc3 Remove a never reached RET. 2005-10-04 20:47:27 +00:00
Olivier Houchard
7bfacf3dc6 strd needs the destination to be double-word aligned, but the pointer passed
to savectx isn't always, so always use stmia, savectx isn't called enough
to need that kind of optimization.
2005-10-04 20:42:42 +00:00
Olivier Houchard
db7db23dd8 dump_avail has nothing to do with ARM_USE_SMALL_ALLOC, so move its
declaration out of the #ifdef.
2005-10-04 16:29:31 +00:00
Olivier Houchard
6270a55ec3 Remove duplicate entry for DDB. 2005-10-04 14:39:33 +00:00
Olivier Houchard
7c616799dc Fix build when DDB isn't defined. 2005-10-04 14:37:03 +00:00
Olivier Houchard
70359cf526 Bring in the good version of this file. 2005-10-03 22:44:54 +00:00