Commit Graph

18 Commits

Author SHA1 Message Date
Rafal Jaworowski
bc26e2e38f Adjust Marvell Discovery (MV78xxx) support to recognize newest chip revisions,
handle Z0 revision (early silicon) explicitly due to its quirks.

Obtained from:	Marvell, Semihalf
2009-04-16 11:20:18 +00:00
Andrew Thompson
68e3d00d68 Fix path and config name for ehci_mbus.c 2009-02-24 23:30:52 +00:00
Marcel Moolenaar
78c0a9c9e2 Include Marvell EHCI HC driver for USB2. 2009-02-16 21:42:41 +00:00
Rafal Jaworowski
4e883c81d0 Check PCIE link status before accessing the bus.
Some 88F5182-based systems (Linkstation) have problems when PCIE is
accessed without any peripherals present.
2009-01-09 12:38:41 +00:00
Rafal Jaworowski
bc54686d20 Rename Marvell ARM CPU specific file according to r186933. 2009-01-09 10:55:33 +00:00
Rafal Jaworowski
e7be09420c Improve Marvell SOCs PCI/PCIE driver.
- Provide dedicated rmans for MEM and IO resources.

- Convert PCI IRQ routing info into a table (from callback approach), provide
  config data for alternative DB- boards.

- Fix a wrong boundary check error in pcib_mbus_init_bar()

Obtained from:	Semihalf
2009-01-09 10:20:51 +00:00
Rafal Jaworowski
673c4fe419 Improve and extend Marvell SOCs platform code.
- Allow for setting per platform MPP/GPIO configuration in the kernel, so
  that we can override all settings firmware might set.

- Set decode windows for the remaining on-chip peripherals: CESA, SATA and XOR.

- Improve handling of USB controllers so that all port are available on the
  given SOC/platform (e.g. up to three on DB-78xxx), this includes rework of
  USB decode windows set-up.

- Other minor fixes and cosmetics.

Obtained from:	Semihalf
2009-01-08 18:31:43 +00:00
Rafal Jaworowski
aba47c3f81 Minor style(9) corrections. 2009-01-08 13:25:22 +00:00
Rafal Jaworowski
4a0180a3b2 Adjust Marvell SOC support for A0 chip revision.
- Clean up TCLK handling so that it's dynamically recognized depending on
  registers settings or chip version/revision. Update registers definitions.

- Teach SOC ident routine about A0 (initial silicon version for general
  audience)

Obtained from:	Marvell, Semihalf
2009-01-08 13:20:28 +00:00
Rafal Jaworowski
b09d6bf325 Avoid confusion and adjust link address range of Marvell Orion kernel so it is
the same as for Kirkwood and Discovery.
2008-12-05 15:31:51 +00:00
Rafal Jaworowski
fe3ea17045 Fix configuration of the PCI bridge. This got omitted in the initial import of
this code.
2008-12-05 15:27:28 +00:00
Stanislav Sedov
129c518d68 - Fix spelling error in comments.
PR:		arm/128891
Submitted by:	Pavel Pankov <pankov_p@mail.ru>
Approved by:	kib (mentor)
2008-12-01 10:16:25 +00:00
Rafal Jaworowski
a715909b3e Improve error handling in pcib_mbus_identify(). 2008-11-19 17:07:01 +00:00
Rafal Jaworowski
e33d259975 Improve style(9) and other cosmetics in Marvell SOCs code. 2008-11-19 11:57:16 +00:00
Rafal Jaworowski
b4ef1cb7e8 Fix off-by-one error in mbus_attach(). 2008-11-19 11:49:35 +00:00
Rafal Jaworowski
6975124c23 PCI/PCI-Express support for Marvell systems.
Obtained from:	Marvell, Semihalf
2008-11-19 11:30:44 +00:00
Rafal Jaworowski
71f00bea66 Auto-size kernel page tables allocation on Marvell systems.
This allows mini dumps to fully work for these platforms.

Obtained from:	Juniper Networks, Semihalf
2008-11-06 16:25:12 +00:00
Rafal Jaworowski
373bbe25ff Introduce basic support for Marvell families of system-on-chip ARM devices:
*  Orion
     - 88F5181
     - 88F5182
     - 88F5281

  * Kirkwood
     - 88F6281

  * Discovery
     - MV78100

The above families of SOCs are built around CPU cores compliant with ARMv5TE
instruction set architecture definition. They share a number of integrated
peripherals. This commit brings support for the following basic elements:

  * GPIO
  * Interrupt controller
  * L1, L2 cache
  * Timers, watchdog, RTC
  * TWSI (I2C)
  * UART

Other peripherals drivers will be introduced separately.

Reviewed by:	imp, marcel, stass (Thanks guys!)
Obtained from:	Marvell, Semihalf
2008-10-13 20:07:13 +00:00