revision 1.124
date: 2002/05/26 03:10:02; author: minoura; state: Exp; lines: +3 -3
Clear done_head in the HCCA *before* acknoledging the interrupt.
Driver lost some completed transfers under heavy loads.
date: 2002/05/19 06:24:31; author: augustss; state: Exp;
Update dma memory access API a little.
NetBSD have adopted our way of using the KERNADDR macro. Update
the revision tags to show that we're in sync, and remove the casts
that they did in their adaptation.
remove the need for a contiguous array with pointers to all the sectors.
Try to make failure to malloc(9) memory a non-hang situation.
Eventually this will allow us to test the 64bit cleanness of the disk
I/O patch, but more work is outstanding here and elsewhere.
Sponsored by: DARPA & NAI Labs.
instead of %llx when %j is available).
Changed nearby output formats from %x to %#x so that it is obvious that the
numbers are in hex (vinum mostly uses 0x%x elsewhere).
Didn't fix nearby format printf errors (long lines).
Printing daddr_t's using %d format was always an error, but gcc's
warning about it was ignored for supported 64-bit arches and not printed
for supported 32-bit arches. Hundreds if not thousands thousands of
previously "fixed" daddr_t printings are now broken on 32-bit machines
by casting daddr_t's to longs. daddr_t's should be printed using %jd
format, but this fix uses %lld since %j is not implemented in the
kernel yet.
Fixed some nearby format printf errors (style bugs).
make_dev() to create device nodes for each of the serial port channels
(ttym%d and cuam%d respectively, as borrowed from MAKEDEV). This allows
the rc driver to work in 5.0. I've tested it with only one card, but
will try sticking in a second card tomorrow and see what happens.
the former blocks software interrupts, while the latter blocks
hardware interrupts.
Avoid one place where I'm at splnet across a call to copyout. Leave
one in place to give bde something to complain about :-). Actaully,
I'll fix it in a subsequent commit.
Reviewed by: bde
spl conical hat to: imp
allow recovery from transmission lockups which occur in the middle
of the descriptor list, rather than just at the beginning.
For some unknown reason, Rhine II chips have a tendency to stop
transmitting while under heavy load, possibly due to collisions.
Whether this behavior is due to a hardware bug or a driver glitch
is unknown as of now.
In either case, this change allows the driver to gracefully recover
from such situations.
Special thanks go to The Anarcat <anarcat@anarcat.dyndns.org>, who
bugged me into looking at this and to
Dominic Marks <dominic_marks@btinternet.com>, who performed a great
deal of testing to help characterize this problem.
MFC after: 3 days
previously used "micro-optimization" (count-down loop) into a
pessimization. Now the loops are written in the more natural count-up
form.
Also, while being there, i made the logic in out_fdc() similar to the
logic in in_fdc(). The old implementation was a bit bogus anyway
since it first tested the DIO bit and only afterwards the RQM bit.
However, according to the description of the i82077, the DIO bit is
only guaranteed to be valid once the RQM bit is set. Thus, the old
implementatoin would have had the chance to misbehave on a controller
that is implemented in accordance with the i82077 description (but is
not bug-for-bug compatible).
MFC after: 3 days
-current, since offsetof() is defined a header under /sys so that
system sources don't need to have this wrong include.
This bug was only detected because my version of <stddef.h> has some
spelling fixes (s/field/member/g) and gcc is now sensitive to the spelling
of arg names in macros as required by standards (ISO C90 6.8.3...).
before rev 1.229 (~ 100 ms). According to bde, some (old) broken
hardware could require it. In order to make timing more accurate than
what could be achieved with a loop around DELAY(1), increase loop
timing after the initial ~ 1 ms.
Also, move the declaration of FDSTS_TIMEOUT out from fdreg.h into fd.c
where it actually belongs to.
MFC after: 2 days
in each cycle, with a tunable max cycle count defined in fdreg.h.
This is said to fix the problem on some Compaq hardware (and perhaps
on other machines using the Natsemi PC87317 chip) where the fdc(4)
driver failed to operate at all.
PR: kern/21397
Submitted by: Jung-uk Kim <jkim@niksun.com>
MFC after: 3 days
