be unions with enough padding to make sure they always end up being
a multiple of 8 bytes in size, since the 83820/83821 chips require
descriptors to be aligned on 64-bit boundaries. I happened to get it
right for the 32-bit descriptor/x86 case, but botched everything else.
Things should work properle on 32-bit/64-bit platforms now.
Note that the 64-bit descriptor format isn't being used currently.
ahc_pci.c:
Prepare for making ahc a module by adding module dependency
and version info.
aic7770.c:
Remove linux header ifdefs. The headers are handled differently
in Linux where local includes (those using "'s instead of <>'s)
are allowed.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
aic7xxx.c:
Remove linux header ifdefs.
current->curr to avoid Linux's use of current as a
#define for the current task on some architectures.
Add a helper function, ahc_assert_atn(), for use in
message phases we handle manually. This hides the fact
that U160 chips with the expected phase matching disabled
need to have SCSISIGO updated differently.
if (ahc_check_residual(scb) != 0)
ahc_calc_residual(scb);
else
ahc_set_residual(scb, 0);
becomes:
ahc_update_residual(scb);
Modify scsi parity error (or CRC error) handling to
reflect expected phase being disabled on U160 chips.
Move SELTO handling above BUSFREE handling so we can
use the new busfree interrupt behavior on U160 chips.
In ahc_build_transfer_msg() filter the period and ppr_options
prior to deciding whether a PPR message is required.
ppr_options may be forced to zero which will effect our
decision.
Correct a long standing but latent bug in ahc_find_syncrate().
We could choose a DT only rate even though DT transfers were
disabled. In the CAM environment this was unlikely as CAM
filters our rate to a non-DT value if the device does not
support such rates.
When displaing controller characteristics, include the
speed of the chip. This way we can modify the transfer
speed based on optional features that are enabled/disabled
in a particular application.
Add support for switching from fully blown tagged queing
to just using simple queue tags should the device reject
an ordered tag.
Remove per-target "current" disconnect and tag queuing
enable flags. These should be per-device and are not
referenced internally be the driver, so we let the OSM
track this state if it needs to.
Use SCSI-3 message terminology.
aic7xxx.h:
The real 7850 does not support Ultra modes, but there are
several cards that use the generic 7850 PCI ID even though
they are using an Ultra capable chip (7859/7860). We start
out with the AHC_ULTRA feature set and then check the
DEVSTATUS register to determine if the capability is really
present.
current -> curr
ahc_calc_residual() is no longer static allowing it to
be called from ahc_update_residual() in aic7xxx_inline.h.
Update some serial eeprom definitions for the latest
BIOS versions.
aic7xxx.reg:
Add a combined DATA_PHASE mask to the SCSIPHASE register
definition to simplify some sequencer code.
aic7xxx.seq:
Take advantage of some performance features available only
on the U160 chips. The auto-ack feature allows us to ack
data-in phases up to the data-fifo size while the sequencer
is still setting up the DMA engine. This greatly reduces
read transfer latency and simplifies testing for transfer
complete (check SCSIEN only). We also disable the expected
phase feature, and enable the new bus free interrupt behavior,
to avoid a few instructions.
Re-arrange the Ultra2+ data phase handling to allow us to
do more work in parallel with the data fifo flushing on a
read.
On an SDTR, ack the message immediately so the target can
prepare the next phase or message byte in parallel with
our work to honor the message.
aic7xxx_93cx6.c:
Remove linux header ifdefs.
aic7xxx_freebsd.c:
current -> curr
Add a module event handler.
Handle tag downgrades in our ahc_send_async() handler.
We won't be able to downgrade to "basic queuing" until
CAM is made aware of this queuing type.
aic7xxx_freebsd.h:
Include cleanups.
Define offsetof if required.
Correct a few comments.
Update prototype of ahc_send_async().
aic7xxx_inline.h:
Implement ahc_update_residual().
aic7xxx_pci.c:
Remove linux header ifdefs.
Correct a few product strings.
Enable several U160 performance enhancing features.
Modify Ultra capability determination so we will enable
Ultra speeds on devices with a 7850 PCI id that happen
to really be a 7859 or 7860.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
of " &= ". Also change the MII PHY device mask to check the correct bits.
Cookie to: Andre Albsmeier <andre.albsmeier@mchp.siemens.de>
Pointy hat to: me
. FD_CLRERR clears the error counter, thus re-enables kernel error
printf()s,
. FD_GSTAT obtains the last FDC operation state, if any,
. FDOPT_NOERRLOG (temporarily) turns off kernel printf() floppy
error logging,
. FDOPT_NOERROR makes the kernel ignore an FDC error, thus can
enable the transfer of an erroneous sector to the user application
All options are being cleared on (last) close.
Prime consumer of the last features will be fdread(1), to be committed
shortly.
(FD_CLRERR should be wired into fdcontrol(8), but then fdcontrol(8)
needs a major rewrite anyway.)
and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000
copper PHY. There are a whole bunch of very low cost cards available with
this chipset selling for $150USD or less. This includes the SMC9462TX,
D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards
from Addtron.
This chip supports TCP/IP checksum offload, VLAN tagging/insertion.
2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs.
I have not done serious performance testing with this driver. I know
it works, and I want it under CVS control so I can keep tabs on it.
Note that there's no serious mutex stuff in here yet either: I need
to talk more with jhb to figure out the right way to do this. That
said, I don't think there will be any problems.
This driver should also work on the alpha. It's not turned on in
GENERIC.
a LinkSys card here in the office where reading the station address
fails the first time, but works find afterwards. Without this, the
probe fails. I don't think this will negatively impact any existing
cards, but I want to confirm this before MFC'ing.
we need to delete the info from the list as well as zero out the res
pointer we saved in the code.
Also made a few style(9) changes while I was at it. Don't use if
(ptr) or if (!ptr), but compare against NULL. Compare against NULL
rather than 0. Don't have useless blocks.
There are likely other problems as well, but at least the wi based
wireless card with memory listed in its cis doesn't panic the system
when the card is inserted.
use TAILQ macros. The sk_attach_xmac() routine calls sk_init_xmac()
before doing the transceiver probe, but *before* ether_ifattach()
is called. This causes sk_init_xmac() to call sk_setmulti(), which
tries to do a TAILQ_FOREACH(), which it can't do because ether_ifattach()
hasn't done a TAILQ_INIT() yet. This causes a NULL pointer dereference
and panic in sk_setmulti() at driver load/initialization time.
Fixed by calling ether_ifattach() before the MII probe.
The code in RELENG_4 still uses the old way of enumerating the
multicast list and doesn't have this problem. Yet.
Reduce the verbose memory map setup reports and work with pccardd to
set the common memory map up.
Use enumeration values for CARD_SET_RES_FLAGS.
Use DELAY when spinning waiting for the card to come free instead of a loop.
MFC: after 1 week
Tidy up includes, credit Slawa Olhovchenkov, John Prince and Eric Hernes
for their efforts and add a couple of missing parenthesis around return
expressions.
- Rework of twe_report_request to use the command status value rather
than the flags register. (Joel Jacobson @ 3ware)
- Update to match some changes in -current vs. stable.
MFC in: 1 week
This driver supports PCI Xr-based and ISA Xem Digiboard cards.
dgm will go away soon if there are no problems reported. For now,
configuring dgm into your kernel warns that you should be using
digi. This driver is probably close to supporting Xi, Xe and Xeve
cards, but I wouldn't expect them to work properly (hardware
donations welcome).
The digi_* pseudo-drivers are not drivers themselves but contain
the BIOS and FEP/OS binaries for various digiboard cards and are
auto-loaded and auto-unloaded by the digi driver at initialisation
time. They *may* be configured into the kernel, but waste a lot
of space if they are. They're intended to be left as modules.
The digictl program is (mainly) used to re-initialise cards that
have external port modules attached such as the PC/Xem.
other "system" header files.
Also help the deprecation of lockmgr.h by making it a sub-include of
sys/lock.h and removing sys/lockmgr.h form kernel .c files.
Sort sys/*.h includes where possible in affected files.
OK'ed by: bde (with reservations)
