If bus_dma will give us addresses > 32 bits, setup our dma tag
to accept up to 39bit addresses.
aic7770.c:
Update the softc directly rather than use an intermediate
"probe_config" structure.
aic7xxx.c:
Complete core work to support 39bit addresses for bulk data
dma operations. Controller data structures still must reside
under the 4GB boundary to reduce code/data size in the sequencer
and related data structures. This has been tested under Linux
IA64 and will be tested on IA64 for FreeBSD as soon as our port
can run there.
Add bus dmamap synchronization calls around manipulation of
all controller/kernel shared host data structures.
Implement data pointer reinitialation for a second data phase
in a single connection in the kernel rather than bloat the
sequencer. This is an extremely rare operation (does it ever
happen?) and the sequencer implementation was flawed for some
of the newest chips.
Don't ever allow our target role to initiate a PPR. This
is forbidden by the SCSI spec.
Add a few missing endian conversions in the ignore wide pointers
code. The core has been tested on the PPC under Linux and should
work for FreeBSD PPC. As soon as I can test the OSM layer for
FreeBSD PPC, I will.
Move some of ahc_softc_init() into ahc_alloc() now that the
probe_config structure is gone.
Add a 4GB boundary condition on all of our dma tags. 32bit
DAC under PCI only works on a single 4GB "page". Although
we can cross 4GB on a true 64bit bus, the card won't always
be installed in one and we can save code space and cost in
implementing high address support by assuming the high DWORD
address will never change.
Add diagnostics to ahc_search_qinfifo().
Correct a target mode issue with bus resets. To avoid an
interrupt storm from a malicious third party holding the
reset line, the sequencer would defer re-enabling the reset
interrupt until either a select-out or select-in. Unfortunately,
the select-in enable bit is cleared by a bus reset, so a second
reset will render the card deaf to an initiator's attempts to
contact it. We now re-enable bus reset interrupts immediately
if the target role is enabled.
aic7xxx.h:
Remove struct ahc_probe_config.
SCB's now contain a pointer to the sg_map_node so we can perfrom
bus dma sync operations on the SG list prior to queuing a command.
aic7xxx.reg:
Register the Perforce ID for this file with the VERSION keyword
so it is printed in generated files.
Add the DSCOMMAND1 register which is used to access the high
DWORD of address bits.
Add the data pointer reinitialize sequencer interrupt code.
aic7xxx.seq:
Register the Perforce ID for this file with the VERSION keyword
so it is printed in generated files.
Remove code to re-enable the bus reset interrupt after a select-in.
In target mode we cannot defer this operation as ENSELI is cleared
by a bus reset.
Complete 39bit support.
Generate a sequencer inteerrupt rather than handle the data
pointers re-initialitation in the sequencer.
Inline the "seen identify" assertion to save a few cycles.
Short circuit the update of our residual data if we have
fully completed a transfer. The residual is correct from
our last S/G load operation.
Short circuit full SDPTR processing if the residual is 0.
Just mark the transfer as complete.
aic7xxx_93cx6.c:
Synchronize perforce IDs.
aic7xxx_freebsd.c:
Complete untested 39bit support.
Add missing endia conversions.
Clear our residuals prior to starting a command. The
update residual code in the core only sets the residual
if there is one.
aic7xxx_freebsd.h:
Modeify ahc_dmamap_sync() macros to take an offset and a length.
This is how sync operations are performed in NetBSD, and we should
update our bus dma implementation to match.
aic7xxx_inline.h:
Add data structure synchronization helper functions.
Fix a bug in ahc_intr() where we would not clear our unsolicited
interrupt counter after running our PCI interrupt handler. This
may have been the cause of the spurious PCI interrupt messages.
aic7xxx_pci.c:
Adjust for loss of probe_config structure.
Guard against bogus 9005 subdevice information as seen on some
IBM MB configurations.
Add 39bit address support.
MFC after: 10 days
and outputing them in generated files.
Fixed a few other scanner bugs that for some reason didn't show up until
these modifications were made.
MFC after: 10 days
when we get an RX_ERR interrupt rather than the nge_rxeoc() handler. The
rxeoc (end of channel) handler attempts to reinitialize the whole NIC,
which we don't want to do if we only received a bad packet.
. Integrate fdc.h into fd.c, with the removal of ft(4) there's no longer
a reason to scatter things across two files.
. Sanitize comments. Convert them into the style(9)-recommended
multi-line form, make them sentences where apprpriate, etc.
. Declare all functions on top, and declare them in the order they
appear in the file. This order is totally chaotic, but Bruce
convinced me that reordering the file wouldn't make it better either.
. Kill a `possibly uninitialized' warning (only seen with -O2) in
fd_read_status().
. Make the comments at return (0|1) statements in fdstate() consistent.
. Nuke a ``keep the compiler happy'' dummy return at the end of fdstate(),
gcc is smart enough to detect that it would never be reached anyway.
o Much cleanly separate NetBSD(XS) / FreeBSD(CAM) codes.
o Improve tagged queing support (full QTAG).
o Improve quirk support.
o Improve parity error retry.
o Impliment wide negotheation.
o Cmd link support.
o Add copyright of CAM part.
o Change for CAM_NEW_TRAN_CODE.
o Work around for buggy KME UJDCD450.
o stg: add disconnet condition.
o nsp: use suspend I/O.
and more. I thank Honda-san.
conf/options.pc98: add CT_USE_RELOCATE_OFFSET and CT_BUS_WEIGHT
dev/{ct,ncv,nsp,stg}/*_{pccard,isa}.c: add splcam() before calling
attach/detach functions.
Tested by: bsd-nomads
Obtained from: NetBSD/pc98
- All sources are built in a single object, reducing namespace pollution.
- Kill the ready queue, and handle a busy response to mly_start in callers
rather than deferring the command.
- Improve our interaction with CAM:
- Don't advertise physical channels as SCSI busses by default.
- use the SIM queue freeze capability rather than queueing CDBs internally.
- force bus reprobe at module load time.
- Clean up more resources in mly_free.
- Tidy up debugging levels.
- Tidy up handling of events (mostly just code cleanliness).
- Use explanatory macros for operations on bus/target/channel numbers.
a bunch of frames. In this case, the dc_link flag is cleared, and dc_start()
stops draining the if_snd send queue, which results in lots of 'no buffers
available' errors being reported to applications. The whole idea behind
not draining the send queue until the link comes up was to avoid having
the gratuitous ARP being lost while we're waiting for autoneg to complete
after the interface is first brought up. As an optimization, change the
test in dc_start() so that we only bail if dc_link is not set _and_ there
are less than 10 packets in the send queue. If the queue has many frames
in it, we need to drain them. If the queue has a small number of frames
in it, we can hold off on sending them until the link comes up.
MFC after: 1 week
We originally had it such that if the connection topology was FL-loop
(public loop), we never looked at any local loop addresses. The reason
for not doing that was fear or concern that we'd see the same local
loop disks reflected from the name server and we'd attach them twice.
However, when I recently hooked up a JBOD and a system to an ANCOR SA-8
switch, the disks did *not* show up on the fabric. So at least the
ANCOR is screening those disks from appearing on the fabric. Now, it's
possible this is a 'feature' of the ANCOR. When I get a chance, I'll
check the Brocade (it's hard to do this on a low budget).
In any case, if they *do* also show up on the fabric, we should
simply elect to not log into them because we already have an
entry for the local loop. There is relatively unexercised code
just for this case.
MFC after: 2 weeks
1) Bite the bullet, and allow unaligned accesses without buffer copies
on the i386 platform. According to some tests run by Andrew Gallatin,
the buffer copy performance hit is greater than the unaligned access
performance hit (especially with jumbo frames). We still need to copy
everywhere else.
2) Enable interrupt moderation with a 100us timeout.
Submitted by: Andrew Gallatin <no longer at duke.edu>
MFC after: 1 week
- When both SC_PIXEL_MODE and SC_NO_FONT_LOADING are defined,
quietly drop SC_NO_FONT_LOADING, because the pixel(raster)
console requires font.
- When SC_NO_FONT_LOADING is defined, force SC_ALT_MOUSE_IMAGE.
Without font, the arrow-shaped mouse cursor cannot be drawn.
- Fiddle and simplify some internal macros.
MFC after: 2 weeks
haven't been probed successfully. It's a known bug that ISA hints
processing instantiates those devices, and prematurely killing them
has other unwanted side-effects.
where they will never succeed. Add a stop-gap measure that will at
least eventually timeout the operation instead of retrying it
indefinately.
MFC after: 1 month
Despite of a few cosmetic things like adding ``irritating silly
parentheses'' around all return values, this mainly improves FDC reset
handling by no longer gratuitously resetting the FDC all the time
(which causes it to lose the notion of the current track) but only in
case of errors, and it sanitizes the block and offset calculations in
fdstrategy() and fdstate(). Some additional cleanup added by me, in
particular the large switch in fdstate() now always uses return to
break out, and no branch falls off the end of the switch statement
anymore. Per Bruce's suggestion, removed M_NOWAIT from the malloc()s
to simplify things.
Submitted by: bde (mostly)
Previously, I had the MODE_1000 bit in the global config register set
unconditionally, which was wrong: we have to turn it off if we have
a 10/100 link. This is now handled in the nge_miibus_statchg() routine.
Discovered by: Nathan Binkert <binkertn@eecs.umich.edu>
(Note: this commit is being done from JFK airport. :P )
Monitor the system power profile, and use _SCP to adjust thermal zones
accordingly.
Simplify the behaviour of the timeout routine, and add some temporary
debugging.